2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
33 * \author Keith Whitwell <keith@tungstengraphics.com>
35 * \todo Enable R300 texture tiling code?
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
47 #include "r600_context.h"
48 #include "radeon_mipmap_tree.h"
50 #include "r700_fragprog.h"
51 #include "r700_vertprog.h"
53 #include "evergreen_tex.h"
55 void r600UpdateTextureState(struct gl_context
* ctx
);
57 void r600UpdateTextureState(struct gl_context
* ctx
)
59 context_t
*context
= R700_CONTEXT(ctx
);
60 R700_CHIP_CONTEXT
*r700
= (R700_CHIP_CONTEXT
*)(&context
->hw
);
61 struct gl_texture_unit
*texUnit
;
62 struct radeon_tex_obj
*t
;
65 R600_STATECHANGE(context
, tx
);
66 R600_STATECHANGE(context
, tx_smplr
);
67 R600_STATECHANGE(context
, tx_brdr_clr
);
69 for (unit
= 0; unit
< R700_MAX_TEXTURE_UNITS
; unit
++) {
70 texUnit
= &ctx
->Texture
.Unit
[unit
];
71 t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
72 r700
->textures
[unit
] = NULL
;
73 if (texUnit
->_ReallyEnabled
) {
76 r700
->textures
[unit
] = t
;
81 static GLboolean
r600GetTexFormat(struct gl_texture_object
*tObj
, gl_format mesa_format
)
83 radeonTexObj
*t
= radeon_tex_obj(tObj
);
85 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
86 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
87 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
88 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
89 CLEARbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit
);
91 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
92 FORMAT_COMP_X_shift
, FORMAT_COMP_X_mask
);
93 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
94 FORMAT_COMP_Y_shift
, FORMAT_COMP_Y_mask
);
95 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
96 FORMAT_COMP_Z_shift
, FORMAT_COMP_Z_mask
);
97 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
98 FORMAT_COMP_W_shift
, FORMAT_COMP_W_mask
);
100 CLEARbit(t
->SQ_TEX_RESOURCE0
, TILE_TYPE_bit
);
101 SETfield(t
->SQ_TEX_RESOURCE0
, ARRAY_LINEAR_GENERAL
,
102 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift
,
103 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask
);
105 switch (mesa_format
) /* This is mesa format. */
107 case MESA_FORMAT_RGBA8888
:
108 case MESA_FORMAT_SIGNED_RGBA8888
:
109 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
110 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
112 #ifdef MESA_BIG_ENDIAN
113 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
114 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
115 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
116 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
117 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
118 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
119 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
120 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
122 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
123 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
124 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
125 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
126 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
127 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
128 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
129 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
131 if (mesa_format
== MESA_FORMAT_SIGNED_RGBA8888
) {
132 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
133 FORMAT_COMP_X_shift
, FORMAT_COMP_X_mask
);
134 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
135 FORMAT_COMP_Y_shift
, FORMAT_COMP_Y_mask
);
136 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
137 FORMAT_COMP_Z_shift
, FORMAT_COMP_Z_mask
);
138 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
139 FORMAT_COMP_W_shift
, FORMAT_COMP_W_mask
);
142 case MESA_FORMAT_RGBA8888_REV
:
143 case MESA_FORMAT_SIGNED_RGBA8888_REV
:
144 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
145 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
147 #ifdef MESA_BIG_ENDIAN
148 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
149 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
150 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
151 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
152 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
153 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
154 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
155 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
157 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
158 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
159 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
161 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
163 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
164 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
166 if (mesa_format
== MESA_FORMAT_SIGNED_RGBA8888_REV
) {
167 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
168 FORMAT_COMP_X_shift
, FORMAT_COMP_X_mask
);
169 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
170 FORMAT_COMP_Y_shift
, FORMAT_COMP_Y_mask
);
171 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
172 FORMAT_COMP_Z_shift
, FORMAT_COMP_Z_mask
);
173 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_SIGNED
,
174 FORMAT_COMP_W_shift
, FORMAT_COMP_W_mask
);
177 case MESA_FORMAT_ARGB8888
:
178 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
179 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
181 #ifdef MESA_BIG_ENDIAN
182 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
183 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
184 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
185 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
186 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
187 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
188 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
189 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
191 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
192 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
193 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
194 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
195 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
196 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
197 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
198 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
201 case MESA_FORMAT_XRGB8888
:
202 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
203 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
205 #ifdef MESA_BIG_ENDIAN
206 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
207 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
208 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
209 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
210 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
211 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
212 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
213 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
215 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
217 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
219 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
220 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
221 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
222 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
225 case MESA_FORMAT_XRGB8888_REV
:
226 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
227 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
229 #ifdef MESA_BIG_ENDIAN
230 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
232 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
233 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
234 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
235 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
236 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
239 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
240 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
241 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
242 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
243 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
244 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
245 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
246 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
249 case MESA_FORMAT_ARGB8888_REV
:
250 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
251 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
253 #ifdef MESA_BIG_ENDIAN
254 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
255 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
256 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
257 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
258 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
259 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
260 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
261 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
263 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
264 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
265 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
266 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
267 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
268 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
269 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
270 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
273 case MESA_FORMAT_RGB888
:
274 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8
,
275 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
277 #ifdef MESA_BIG_ENDIAN
278 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
279 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
280 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
281 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
282 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
283 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
284 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
285 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
287 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
288 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
289 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
291 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
293 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
297 case MESA_FORMAT_RGB565
:
298 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
299 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
301 #ifdef MESA_BIG_ENDIAN
302 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
303 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
304 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
305 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
306 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
307 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
308 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
309 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
311 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
312 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
313 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
314 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
315 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
316 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
317 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
318 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
322 case MESA_FORMAT_RGB565_REV
:
323 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
324 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
326 #ifdef MESA_BIG_ENDIAN
327 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
328 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
329 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
331 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
332 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
333 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
334 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
336 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
337 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
338 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
339 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
340 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
341 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
342 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
343 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
346 case MESA_FORMAT_ARGB4444
:
347 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
348 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
350 #ifdef MESA_BIG_ENDIAN
351 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
352 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
353 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
354 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
355 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
356 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
357 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
358 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
360 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
362 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
363 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
364 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
365 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
366 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
367 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
370 case MESA_FORMAT_ARGB4444_REV
:
371 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
372 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
373 #ifdef MESA_BIG_ENDIAN
374 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
375 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
376 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
377 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
378 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
379 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
380 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
381 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
383 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
384 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
385 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
386 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
387 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
388 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
389 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
390 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
393 case MESA_FORMAT_ARGB1555
:
394 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
395 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
396 #ifdef MESA_BIG_ENDIAN
397 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
398 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
399 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
400 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
401 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
402 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
403 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
404 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
406 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
407 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
408 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
409 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
410 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
411 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
412 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
413 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
416 case MESA_FORMAT_ARGB1555_REV
:
417 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
418 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
419 #ifdef MESA_BIG_ENDIAN
420 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
421 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
422 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
423 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
424 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
425 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
426 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
427 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
429 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
430 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
431 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
432 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
433 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
434 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
435 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
436 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
439 case MESA_FORMAT_AL88
:
440 case MESA_FORMAT_AL88_REV
: /* TODO : Check this. */
441 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8
,
442 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
444 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
445 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
446 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
447 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
448 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
449 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
450 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
451 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
453 case MESA_FORMAT_RGB332
:
454 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_3_3_2
,
455 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
457 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
458 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
459 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
460 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
461 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
462 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
463 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
464 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
466 case MESA_FORMAT_A8
: /* ZERO, ZERO, ZERO, X */
467 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
468 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
470 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
471 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
472 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
473 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
474 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
475 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
476 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
477 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
479 case MESA_FORMAT_L8
: /* X, X, X, ONE */
480 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
481 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
483 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
484 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
485 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
486 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
487 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
488 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
489 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
490 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
492 case MESA_FORMAT_I8
: /* X, X, X, X */
493 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
494 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
496 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
497 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
498 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
499 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
500 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
501 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
502 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
503 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
505 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
507 case MESA_FORMAT_YCBCR:
508 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
511 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
513 case MESA_FORMAT_YCBCR_REV:
514 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
517 case MESA_FORMAT_RGB_DXT1
: /* not supported yet */
518 case MESA_FORMAT_RGBA_DXT1
: /* not supported yet */
519 case MESA_FORMAT_RGBA_DXT3
: /* not supported yet */
520 case MESA_FORMAT_RGBA_DXT5
: /* not supported yet */
523 case MESA_FORMAT_RGBA_FLOAT32
:
524 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_32_FLOAT
,
525 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
527 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
528 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
529 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
530 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
531 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
532 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
533 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
534 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
536 case MESA_FORMAT_RGBA_FLOAT16
:
537 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_16_FLOAT
,
538 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
540 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
541 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
542 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
543 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
544 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
545 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
546 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
547 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
549 case MESA_FORMAT_RGB_FLOAT32
: /* X, Y, Z, ONE */
550 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_FLOAT
,
551 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
553 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
554 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
555 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
556 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
557 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
558 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
559 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
560 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
562 case MESA_FORMAT_RGB_FLOAT16
:
563 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_FLOAT
,
564 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
566 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
567 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
568 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
569 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
570 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
571 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
572 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
573 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
575 case MESA_FORMAT_ALPHA_FLOAT32
: /* ZERO, ZERO, ZERO, X */
576 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
577 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
579 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
580 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
581 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
582 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
583 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
584 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
585 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
586 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
588 case MESA_FORMAT_ALPHA_FLOAT16
: /* ZERO, ZERO, ZERO, X */
589 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
590 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
592 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
593 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
594 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
595 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
596 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
597 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
598 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
599 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
601 case MESA_FORMAT_LUMINANCE_FLOAT32
: /* X, X, X, ONE */
602 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
603 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
605 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
606 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
607 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
608 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
609 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
610 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
611 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
612 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
614 case MESA_FORMAT_LUMINANCE_FLOAT16
: /* X, X, X, ONE */
615 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
616 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
618 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
619 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
620 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
621 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
622 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
623 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
624 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
625 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
627 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
:
628 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_FLOAT
,
629 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
631 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
632 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
633 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
634 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
635 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
636 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
637 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
638 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
640 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
:
641 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_FLOAT
,
642 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
644 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
645 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
646 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
647 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
648 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
649 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
650 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
651 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
653 case MESA_FORMAT_INTENSITY_FLOAT32
: /* X, X, X, X */
654 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
655 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
657 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
658 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
659 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
660 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
661 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
662 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
663 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
664 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
666 case MESA_FORMAT_INTENSITY_FLOAT16
: /* X, X, X, X */
667 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
668 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
670 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
671 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
672 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
673 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
674 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
675 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
676 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
677 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
679 case MESA_FORMAT_Z16
:
680 case MESA_FORMAT_X8_Z24
:
681 case MESA_FORMAT_S8_Z24
:
682 case MESA_FORMAT_Z24_S8
:
683 case MESA_FORMAT_Z32
:
685 SETbit(t
->SQ_TEX_RESOURCE0
, TILE_TYPE_bit
);
686 SETfield(t
->SQ_TEX_RESOURCE0
, ARRAY_1D_TILED_THIN1
,
687 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift
,
688 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask
);
689 switch (mesa_format
) {
690 case MESA_FORMAT_Z16
:
691 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16
,
692 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
694 case MESA_FORMAT_X8_Z24
:
695 case MESA_FORMAT_S8_Z24
:
696 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_24
,
697 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
699 case MESA_FORMAT_Z24_S8
:
700 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_24_8
,
701 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
703 case MESA_FORMAT_Z32
:
704 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32
,
705 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
708 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
709 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
714 switch (tObj
->Sampler
.DepthMode
) {
715 case GL_LUMINANCE
: /* X, X, X, ONE */
716 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
717 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
718 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
719 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
720 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
721 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
722 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
723 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
725 case GL_INTENSITY
: /* X, X, X, X */
726 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
727 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
728 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
729 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
730 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
731 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
732 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
733 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
735 case GL_ALPHA
: /* ZERO, ZERO, ZERO, X */
736 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
737 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
738 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
739 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
740 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
741 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
742 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
743 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
749 /* EXT_texture_sRGB */
750 case MESA_FORMAT_SARGB8
:
751 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
752 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
754 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
755 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
756 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
757 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
758 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
759 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
760 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
761 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
762 SETbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit
);
764 case MESA_FORMAT_SLA8
:
765 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8
,
766 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
768 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
769 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
770 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
771 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
772 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
773 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
774 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
775 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
776 SETbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit
);
778 case MESA_FORMAT_SL8
: /* X, X, X, ONE */
779 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
780 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
782 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
783 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
784 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
785 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
786 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
787 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
788 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
789 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
790 SETbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit
);
793 /* Not supported format */
800 static GLuint
r600_translate_shadow_func(GLenum func
)
804 return SQ_TEX_DEPTH_COMPARE_NEVER
;
806 return SQ_TEX_DEPTH_COMPARE_LESS
;
808 return SQ_TEX_DEPTH_COMPARE_LESSEQUAL
;
810 return SQ_TEX_DEPTH_COMPARE_GREATER
;
812 return SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
;
814 return SQ_TEX_DEPTH_COMPARE_NOTEQUAL
;
816 return SQ_TEX_DEPTH_COMPARE_EQUAL
;
818 return SQ_TEX_DEPTH_COMPARE_ALWAYS
;
820 WARN_ONCE("Unknown shadow compare function! %d", func
);
825 static INLINE
uint32_t
826 S_FIXED(float value
, uint32_t frac_bits
)
828 return value
* (1 << frac_bits
);
831 void r600SetDepthTexMode(struct gl_texture_object
*tObj
)
838 t
= radeon_tex_obj(tObj
);
840 if(!r600GetTexFormat(tObj
, tObj
->Image
[0][tObj
->BaseLevel
]->TexFormat
))
841 t
->validated
= GL_FALSE
;
845 * Compute the cached hardware register values for the given texture object.
847 * \param rmesa Context pointer
848 * \param t the r300 texture object
850 static GLboolean
setup_hardware_state(struct gl_context
* ctx
, struct gl_texture_object
*texObj
, int unit
)
852 context_t
*rmesa
= R700_CONTEXT(ctx
);
853 radeonTexObj
*t
= radeon_tex_obj(texObj
);
854 const struct gl_texture_image
*firstImage
;
855 GLuint uTexelPitch
, row_align
;
857 if (rmesa
->radeon
.radeonScreen
->driScreen
->dri2
.enabled
&&
862 firstImage
= t
->base
.Image
[0][t
->minLod
];
864 if (!t
->image_override
) {
865 if (!r600GetTexFormat(texObj
, firstImage
->TexFormat
)) {
866 radeon_warning("unsupported texture format in %s\n",
872 switch (texObj
->Target
) {
874 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_1D
, DIM_shift
, DIM_mask
);
875 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
878 case GL_TEXTURE_RECTANGLE_NV
:
879 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_2D
, DIM_shift
, DIM_mask
);
880 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
883 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_3D
, DIM_shift
, DIM_mask
);
884 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Depth
- 1, // ???
885 TEX_DEPTH_shift
, TEX_DEPTH_mask
);
887 case GL_TEXTURE_CUBE_MAP
:
888 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_CUBEMAP
, DIM_shift
, DIM_mask
);
889 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
892 radeon_error("unexpected texture target type in %s\n", __FUNCTION__
);
896 row_align
= rmesa
->radeon
.texture_row_align
- 1;
897 uTexelPitch
= (_mesa_format_row_stride(firstImage
->TexFormat
, firstImage
->Width
) + row_align
) & ~row_align
;
898 uTexelPitch
= uTexelPitch
/ _mesa_get_format_bytes(firstImage
->TexFormat
);
899 uTexelPitch
= (uTexelPitch
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
900 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
906 SETfield(t
->SQ_TEX_RESOURCE0
, (uTexelPitch
/8)-1, PITCH_shift
, PITCH_mask
);
907 SETfield(t
->SQ_TEX_RESOURCE0
, firstImage
->Width
- 1,
908 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
909 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Height
- 1,
910 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
912 t
->SQ_TEX_RESOURCE2
= get_base_teximage_offset(t
) / 256;
914 t
->SQ_TEX_RESOURCE3
= radeon_miptree_image_offset(t
->mt
, 0, t
->minLod
+ 1) / 256;
916 SETfield(t
->SQ_TEX_RESOURCE4
, 0, BASE_LEVEL_shift
, BASE_LEVEL_mask
);
917 SETfield(t
->SQ_TEX_RESOURCE5
, t
->maxLod
- t
->minLod
, LAST_LEVEL_shift
, LAST_LEVEL_mask
);
919 SETfield(t
->SQ_TEX_SAMPLER1
,
920 S_FIXED(CLAMP(t
->base
.Sampler
.MinLod
- t
->minLod
, 0, 15), 6),
921 MIN_LOD_shift
, MIN_LOD_mask
);
922 SETfield(t
->SQ_TEX_SAMPLER1
,
923 S_FIXED(CLAMP(t
->base
.Sampler
.MaxLod
- t
->minLod
, 0, 15), 6),
924 MAX_LOD_shift
, MAX_LOD_mask
);
925 SETfield(t
->SQ_TEX_SAMPLER1
,
926 S_FIXED(CLAMP(ctx
->Texture
.Unit
[unit
].LodBias
+ t
->base
.Sampler
.LodBias
, -16, 16), 6),
927 SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift
, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask
);
929 if(texObj
->Sampler
.CompareMode
== GL_COMPARE_R_TO_TEXTURE_ARB
)
931 SETfield(t
->SQ_TEX_SAMPLER0
, r600_translate_shadow_func(texObj
->Sampler
.CompareFunc
), DEPTH_COMPARE_FUNCTION_shift
, DEPTH_COMPARE_FUNCTION_mask
);
935 CLEARfield(t
->SQ_TEX_SAMPLER0
, DEPTH_COMPARE_FUNCTION_mask
);
942 * Ensure the given texture is ready for rendering.
944 * Mostly this means populating the texture object's mipmap tree.
946 static GLboolean
r600_validate_texture(struct gl_context
* ctx
, struct gl_texture_object
*texObj
, int unit
)
948 radeonTexObj
*t
= radeon_tex_obj(texObj
);
950 if (!radeon_validate_texture_miptree(ctx
, texObj
))
953 /* Configure the hardware registers (more precisely, the cached version
954 * of the hardware registers). */
955 if (!setup_hardware_state(ctx
, texObj
, unit
))
958 t
->validated
= GL_TRUE
;
963 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
965 GLboolean
r600ValidateBuffers(struct gl_context
* ctx
)
967 context_t
*rmesa
= R700_CONTEXT(ctx
);
968 struct radeon_renderbuffer
*rrb
;
969 struct radeon_bo
*pbo
;
973 radeon_cs_space_reset_bos(rmesa
->radeon
.cmdbuf
.cs
);
975 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
977 if (rrb
&& rrb
->bo
) {
978 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
980 RADEON_GEM_DOMAIN_VRAM
);
984 rrb
= radeon_get_depthbuffer(&rmesa
->radeon
);
985 if (rrb
&& rrb
->bo
) {
986 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
988 RADEON_GEM_DOMAIN_VRAM
);
991 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; ++i
) {
994 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
997 if (!r600_validate_texture(ctx
, ctx
->Texture
.Unit
[i
]._Current
, i
)) {
998 radeon_warning("failed to validate texture for unit %d.\n", i
);
1000 t
= radeon_tex_obj(ctx
->Texture
.Unit
[i
]._Current
);
1001 if (t
->image_override
&& t
->bo
)
1002 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
1004 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
1006 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
1008 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
1011 pbo
= (struct radeon_bo
*)r700GetActiveFpShaderBo(ctx
);
1013 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, pbo
,
1014 RADEON_GEM_DOMAIN_GTT
, 0);
1017 pbo
= (struct radeon_bo
*)r700GetActiveVpShaderBo(ctx
);
1019 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, pbo
,
1020 RADEON_GEM_DOMAIN_GTT
, 0);
1023 pbo
= (struct radeon_bo
*)r700GetActiveFpShaderConstBo(ctx
);
1025 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, pbo
,
1026 RADEON_GEM_DOMAIN_GTT
, 0);
1029 pbo
= (struct radeon_bo
*)r700GetActiveVpShaderConstBo(ctx
);
1031 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, pbo
,
1032 RADEON_GEM_DOMAIN_GTT
, 0);
1035 ret
= radeon_cs_space_check_with_bo(rmesa
->radeon
.cmdbuf
.cs
, first_elem(&rmesa
->radeon
.dma
.reserved
)->bo
, RADEON_GEM_DOMAIN_GTT
, 0);
1041 void r600SetTexOffset(__DRIcontext
* pDRICtx
, GLint texname
,
1042 unsigned long long offset
, GLint depth
, GLuint pitch
)
1044 context_t
*rmesa
= pDRICtx
->driverPrivate
;
1045 struct gl_texture_object
*tObj
=
1046 _mesa_lookup_texture(rmesa
->radeon
.glCtx
, texname
);
1047 radeonTexObjPtr t
= radeon_tex_obj(tObj
);
1048 const struct gl_texture_image
*firstImage
;
1049 uint32_t pitch_val
, size
, row_align
;
1054 if(rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_CEDAR
)
1056 evergreenSetTexOffset(pDRICtx
, texname
, offset
, depth
, pitch
);
1060 t
->image_override
= GL_TRUE
;
1065 firstImage
= t
->base
.Image
[0][t
->minLod
];
1066 row_align
= rmesa
->radeon
.texture_row_align
- 1;
1067 size
= ((_mesa_format_row_stride(firstImage
->TexFormat
, firstImage
->Width
) + row_align
) & ~row_align
) * firstImage
->Height
;
1069 radeon_bo_unref(t
->bo
);
1072 t
->bo
= radeon_legacy_bo_alloc_fake(rmesa
->radeon
.radeonScreen
->bom
, size
, offset
);
1073 t
->override_offset
= offset
;
1077 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
1078 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1080 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1081 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1082 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1083 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1084 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1085 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1086 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
1087 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1092 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
1093 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1095 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1096 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1097 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1098 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1099 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1100 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1101 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
1102 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1106 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
1107 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1109 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1110 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1111 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1112 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1113 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1114 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1115 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
1116 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1121 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
1122 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
1124 /* min pitch is 8 */
1128 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
1131 void r600SetTexBuffer2(__DRIcontext
*pDRICtx
, GLint target
, GLint glx_texture_format
, __DRIdrawable
*dPriv
)
1133 struct gl_texture_unit
*texUnit
;
1134 struct gl_texture_object
*texObj
;
1135 struct gl_texture_image
*texImage
;
1136 struct radeon_renderbuffer
*rb
;
1137 radeon_texture_image
*rImage
;
1138 radeonContextPtr radeon
;
1140 struct radeon_framebuffer
*rfb
;
1143 gl_format texFormat
;
1145 radeon
= pDRICtx
->driverPrivate
;
1146 rmesa
= pDRICtx
->driverPrivate
;
1148 if(rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_CEDAR
)
1150 evergreenSetTexBuffer(pDRICtx
, target
, glx_texture_format
, dPriv
);
1154 rfb
= dPriv
->driverPrivate
;
1155 texUnit
= &radeon
->glCtx
->Texture
.Unit
[radeon
->glCtx
->Texture
.CurrentUnit
];
1156 texObj
= _mesa_select_tex_object(radeon
->glCtx
, texUnit
, target
);
1157 texImage
= _mesa_get_tex_image(radeon
->glCtx
, texObj
, target
, 0);
1159 rImage
= get_radeon_texture_image(texImage
);
1160 t
= radeon_tex_obj(texObj
);
1165 radeon_update_renderbuffers(pDRICtx
, dPriv
, GL_TRUE
);
1166 rb
= rfb
->color_rb
[0];
1167 if (rb
->bo
== NULL
) {
1168 /* Failed to BO for the buffer */
1172 _mesa_lock_texture(radeon
->glCtx
, texObj
);
1174 radeon_bo_unref(t
->bo
);
1178 radeon_bo_unref(rImage
->bo
);
1182 radeon_miptree_unreference(&t
->mt
);
1183 radeon_miptree_unreference(&rImage
->mt
);
1185 rImage
->bo
= rb
->bo
;
1186 radeon_bo_ref(rImage
->bo
);
1188 radeon_bo_ref(t
->bo
);
1189 t
->image_override
= GL_TRUE
;
1190 t
->override_offset
= 0;
1191 pitch_val
= rb
->pitch
;
1194 if (glx_texture_format
== __DRI_TEXTURE_FORMAT_RGB
) {
1195 texFormat
= MESA_FORMAT_RGB888
;
1196 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
1197 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1199 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1200 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1201 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1202 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1203 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1204 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1205 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
1206 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1208 texFormat
= MESA_FORMAT_ARGB8888
;
1209 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
1210 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1212 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1213 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1214 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1215 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1216 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1217 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1218 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
1219 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1226 texFormat
= MESA_FORMAT_RGB888
;
1227 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
1228 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1230 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
1231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1232 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1233 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1234 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1235 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1236 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
1237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1241 texFormat
= MESA_FORMAT_RGB565
;
1242 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
1243 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
1245 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
1246 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
1247 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
1248 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
1249 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
1250 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
1251 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
1252 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
1257 _mesa_init_teximage_fields(radeon
->glCtx
, target
, texImage
,
1258 rb
->base
.Width
, rb
->base
.Height
, 1, 0,
1259 rb
->cpp
, texFormat
);
1260 texImage
->RowStride
= rb
->pitch
/ rb
->cpp
;
1262 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
1263 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
1265 /* min pitch is 8 */
1269 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
1270 SETfield(t
->SQ_TEX_RESOURCE0
, rb
->base
.Width
- 1,
1271 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
1272 SETfield(t
->SQ_TEX_RESOURCE1
, rb
->base
.Height
- 1,
1273 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
1275 t
->validated
= GL_TRUE
;
1276 _mesa_unlock_texture(radeon
->glCtx
, texObj
);
1280 void r600SetTexBuffer(__DRIcontext
*pDRICtx
, GLint target
, __DRIdrawable
*dPriv
)
1282 r600SetTexBuffer2(pDRICtx
, target
, __DRI_TEXTURE_FORMAT_RGBA
, dPriv
);