2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
33 * \author Keith Whitwell <keith@tungstengraphics.com>
35 * \todo Enable R300 texture tiling code?
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/texformat.h"
43 #include "main/teximage.h"
44 #include "main/texobj.h"
45 #include "main/enums.h"
47 #include "r600_context.h"
48 #include "r700_state.h"
49 #include "radeon_mipmap_tree.h"
52 void r600UpdateTextureState(GLcontext
* ctx
);
54 void r600UpdateTextureState(GLcontext
* ctx
)
56 context_t
*context
= R700_CONTEXT(ctx
);
57 R700_CHIP_CONTEXT
*r700
= (R700_CHIP_CONTEXT
*)(&context
->hw
);
58 struct gl_texture_unit
*texUnit
;
59 struct radeon_tex_obj
*t
;
62 for (unit
= 0; unit
< R700_MAX_TEXTURE_UNITS
; unit
++) {
63 texUnit
= &ctx
->Texture
.Unit
[unit
];
64 t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
66 if (texUnit
->_ReallyEnabled
) {
69 r700
->textures
[unit
] = t
;
74 static GLboolean
r600GetTexFormat(struct gl_texture_object
*tObj
, GLuint mesa_format
)
76 radeonTexObj
*t
= radeon_tex_obj(tObj
);
78 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
79 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
80 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
81 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
83 switch (mesa_format
) /* This is mesa format. */
85 case MESA_FORMAT_RGBA8888
:
86 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
87 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
89 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
90 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
91 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
92 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
93 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
94 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
95 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
96 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
98 case MESA_FORMAT_RGBA8888_REV
:
99 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
100 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
102 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
103 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
104 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
105 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
106 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
107 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
108 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
109 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
111 case MESA_FORMAT_ARGB8888
:
112 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
113 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
115 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
116 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
117 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
118 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
119 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
120 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
121 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
122 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
124 case MESA_FORMAT_ARGB8888_REV
:
125 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
126 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
128 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
129 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
130 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
131 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
132 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
133 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
134 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
135 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
137 case MESA_FORMAT_RGB888
:
138 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8
,
139 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
141 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
142 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
143 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
144 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
145 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
146 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
147 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
148 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
150 case MESA_FORMAT_RGB565
:
151 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
152 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
154 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
155 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
156 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
157 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
158 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
159 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
160 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
161 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
163 case MESA_FORMAT_RGB565_REV
:
164 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
165 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
167 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
168 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
169 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
170 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
171 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
172 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
173 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
174 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
176 case MESA_FORMAT_ARGB4444
:
177 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
178 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
180 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
181 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
182 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
183 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
184 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
185 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
186 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
187 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
189 case MESA_FORMAT_ARGB4444_REV
:
190 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
191 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
193 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
194 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
195 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
196 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
197 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
198 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
199 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
200 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
202 case MESA_FORMAT_ARGB1555
:
203 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
204 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
206 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
207 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
208 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
209 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
210 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
211 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
212 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
213 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
215 case MESA_FORMAT_ARGB1555_REV
:
216 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
217 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
219 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
220 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
221 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
222 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
223 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
224 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
225 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
226 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
228 case MESA_FORMAT_AL88
:
229 case MESA_FORMAT_AL88_REV
: /* TODO : Check this. */
230 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8
,
231 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
233 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
234 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
235 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
236 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
237 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
238 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
239 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
240 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
242 case MESA_FORMAT_RGB332
:
243 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_3_3_2
,
244 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
246 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
247 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
248 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
249 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
250 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
251 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
252 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
253 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
255 case MESA_FORMAT_A8
: /* ZERO, ZERO, ZERO, X */
256 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
257 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
259 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
260 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
261 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
262 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
263 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
264 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
265 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
266 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
268 case MESA_FORMAT_L8
: /* X, X, X, ONE */
269 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
270 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
272 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
273 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
274 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
275 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
276 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
277 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
278 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
279 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
281 case MESA_FORMAT_I8
: /* X, X, X, X */
282 case MESA_FORMAT_CI8
:
283 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
284 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
286 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
287 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
288 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
289 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
290 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
291 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
292 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
293 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
295 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
297 case MESA_FORMAT_YCBCR:
298 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
301 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
303 case MESA_FORMAT_YCBCR_REV:
304 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
307 case MESA_FORMAT_RGB_DXT1
: /* not supported yet */
310 case MESA_FORMAT_RGBA_DXT1
: /* not supported yet */
313 case MESA_FORMAT_RGBA_DXT3
: /* not supported yet */
316 case MESA_FORMAT_RGBA_DXT5
: /* not supported yet */
319 case MESA_FORMAT_RGBA_FLOAT32
:
320 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_32_FLOAT
,
321 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
323 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
324 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
325 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
326 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
327 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
328 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
329 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
332 case MESA_FORMAT_RGBA_FLOAT16
:
333 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_16_FLOAT
,
334 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
336 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
337 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
338 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
339 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
340 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
341 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
342 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
343 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
345 case MESA_FORMAT_RGB_FLOAT32
: /* X, Y, Z, ONE */
346 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_FLOAT
,
347 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
349 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
350 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
351 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
352 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
353 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
354 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
355 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
356 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
358 case MESA_FORMAT_RGB_FLOAT16
:
359 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_FLOAT
,
360 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
362 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
363 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
364 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
365 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
366 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
367 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
368 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
369 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
371 case MESA_FORMAT_ALPHA_FLOAT32
: /* ZERO, ZERO, ZERO, X */
372 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
373 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
375 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
376 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
377 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
378 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
379 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
380 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
381 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
382 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
384 case MESA_FORMAT_ALPHA_FLOAT16
: /* ZERO, ZERO, ZERO, X */
385 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
386 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
388 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
389 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
390 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
391 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
392 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
393 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
394 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
395 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
397 case MESA_FORMAT_LUMINANCE_FLOAT32
: /* X, X, X, ONE */
398 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
399 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
401 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
402 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
403 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
404 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
405 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
406 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
407 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
408 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
410 case MESA_FORMAT_LUMINANCE_FLOAT16
: /* X, X, X, ONE */
411 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
412 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
414 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
415 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
416 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
417 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
418 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
419 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
420 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
421 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
423 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
:
424 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_FLOAT
,
425 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
427 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
428 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
429 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
430 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
431 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
432 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
433 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
434 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
436 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
:
437 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_FLOAT
,
438 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
440 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
441 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
442 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
443 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
444 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
445 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
446 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
447 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
449 case MESA_FORMAT_INTENSITY_FLOAT32
: /* X, X, X, X */
450 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
451 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
453 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
454 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
455 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
456 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
457 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
458 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
459 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
460 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
462 case MESA_FORMAT_INTENSITY_FLOAT16
: /* X, X, X, X */
463 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
464 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
466 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
467 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
468 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
469 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
470 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
471 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
472 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
473 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
475 case MESA_FORMAT_Z16
:
476 case MESA_FORMAT_Z24_S8
:
477 case MESA_FORMAT_Z32
:
478 switch (mesa_format
) {
479 case MESA_FORMAT_Z16
:
480 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16
,
481 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
483 case MESA_FORMAT_Z24_S8
:
484 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_24_8
,
485 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
487 case MESA_FORMAT_Z32
:
488 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32
,
489 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
492 switch (tObj
->DepthMode
) {
493 case GL_LUMINANCE
: /* X, X, X, ONE */
494 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
495 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
496 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
497 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
498 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
499 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
500 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
501 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
503 case GL_INTENSITY
: /* X, X, X, X */
504 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
505 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
506 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
507 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
508 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
509 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
510 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
511 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
513 case GL_ALPHA
: /* ZERO, ZERO, ZERO, X */
514 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
515 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
516 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
517 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
518 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
519 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
520 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
521 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
528 /* Not supported format */
535 void r600SetDepthTexMode(struct gl_texture_object
*tObj
)
542 t
= radeon_tex_obj(tObj
);
544 r600GetTexFormat(tObj
, tObj
->Image
[0][tObj
->BaseLevel
]->TexFormat
->MesaFormat
);
549 * Compute the cached hardware register values for the given texture object.
551 * \param rmesa Context pointer
552 * \param t the r300 texture object
554 static void setup_hardware_state(context_t
*rmesa
, struct gl_texture_object
*texObj
)
556 radeonTexObj
*t
= radeon_tex_obj(texObj
);
557 const struct gl_texture_image
*firstImage
;
558 int firstlevel
= t
->mt
? t
->mt
->firstLevel
: 0;
559 GLuint uTexelPitch
, row_align
;
561 firstImage
= t
->base
.Image
[0][firstlevel
];
563 if (!t
->image_override
) {
564 if (!r600GetTexFormat(texObj
, firstImage
->TexFormat
->MesaFormat
)) {
565 _mesa_problem(NULL
, "unexpected texture format in %s",
571 switch (texObj
->Target
) {
573 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_1D
, DIM_shift
, DIM_mask
);
574 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
577 case GL_TEXTURE_RECTANGLE_NV
:
578 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_2D
, DIM_shift
, DIM_mask
);
579 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
582 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_3D
, DIM_shift
, DIM_mask
);
583 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Depth
- 1, // ???
584 TEX_DEPTH_shift
, TEX_DEPTH_mask
);
586 case GL_TEXTURE_CUBE_MAP
:
587 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_CUBEMAP
, DIM_shift
, DIM_mask
);
588 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
591 _mesa_problem(NULL
, "unexpected texture target type in %s", __FUNCTION__
);
595 row_align
= rmesa
->radeon
.texture_row_align
- 1;
596 uTexelPitch
= ((firstImage
->Width
* t
->mt
->bpp
+ row_align
) & ~row_align
) / t
->mt
->bpp
;
597 uTexelPitch
= (uTexelPitch
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
598 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
604 SETfield(t
->SQ_TEX_RESOURCE0
, (uTexelPitch
/8)-1, PITCH_shift
, PITCH_mask
);
605 SETfield(t
->SQ_TEX_RESOURCE0
, firstImage
->Width
- 1,
606 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
607 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Height
- 1,
608 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
610 if ((t
->mt
->lastLevel
- t
->mt
->firstLevel
) > 0) {
611 t
->SQ_TEX_RESOURCE3
= t
->mt
->levels
[0].size
/ 256;
612 SETfield(t
->SQ_TEX_RESOURCE4
, t
->mt
->firstLevel
, BASE_LEVEL_shift
, BASE_LEVEL_mask
);
613 SETfield(t
->SQ_TEX_RESOURCE5
, t
->mt
->lastLevel
, LAST_LEVEL_shift
, LAST_LEVEL_mask
);
618 * Ensure the given texture is ready for rendering.
620 * Mostly this means populating the texture object's mipmap tree.
622 static GLboolean
r600_validate_texture(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
624 context_t
*rmesa
= R700_CONTEXT(ctx
);
625 radeonTexObj
*t
= radeon_tex_obj(texObj
);
627 if (!radeon_validate_texture_miptree(ctx
, texObj
))
630 /* Configure the hardware registers (more precisely, the cached version
631 * of the hardware registers). */
632 setup_hardware_state(rmesa
, texObj
);
634 t
->validated
= GL_TRUE
;
639 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
641 GLboolean
r600ValidateBuffers(GLcontext
* ctx
)
643 context_t
*rmesa
= R700_CONTEXT(ctx
);
644 struct radeon_renderbuffer
*rrb
;
648 radeon_cs_space_reset_bos(rmesa
->radeon
.cmdbuf
.cs
);
650 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
652 if (rrb
&& rrb
->bo
) {
653 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
655 RADEON_GEM_DOMAIN_VRAM
);
659 rrb
= radeon_get_depthbuffer(&rmesa
->radeon
);
660 if (rrb
&& rrb
->bo
) {
661 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
663 RADEON_GEM_DOMAIN_VRAM
);
666 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; ++i
) {
669 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
672 if (!r600_validate_texture(ctx
, ctx
->Texture
.Unit
[i
]._Current
)) {
674 "failed to validate texture for unit %d.\n",
677 t
= radeon_tex_obj(ctx
->Texture
.Unit
[i
]._Current
);
678 if (t
->image_override
&& t
->bo
)
679 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
681 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
683 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
685 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
688 ret
= radeon_cs_space_check_with_bo(rmesa
->radeon
.cmdbuf
.cs
, rmesa
->radeon
.dma
.current
, RADEON_GEM_DOMAIN_GTT
, 0);
694 void r600SetTexOffset(__DRIcontext
* pDRICtx
, GLint texname
,
695 unsigned long long offset
, GLint depth
, GLuint pitch
)
697 context_t
*rmesa
= pDRICtx
->driverPrivate
;
698 struct gl_texture_object
*tObj
=
699 _mesa_lookup_texture(rmesa
->radeon
.glCtx
, texname
);
700 radeonTexObjPtr t
= radeon_tex_obj(tObj
);
701 uint32_t pitch_val
, size
;
706 t
->image_override
= GL_TRUE
;
711 size
= pitch
;//h * w * (depth / 8);
713 radeon_bo_unref(t
->bo
);
716 t
->bo
= radeon_legacy_bo_alloc_fake(rmesa
->radeon
.radeonScreen
->bom
, size
, offset
);
717 t
->override_offset
= offset
;
721 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
722 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
724 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
725 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
726 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
727 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
728 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
729 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
730 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
731 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
736 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
737 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
739 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
740 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
741 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
742 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
743 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
744 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
745 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
746 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
750 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
751 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
753 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
754 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
755 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
756 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
757 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
758 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
759 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
760 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
765 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
766 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
772 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
775 void r600SetTexBuffer2(__DRIcontext
*pDRICtx
, GLint target
, GLint glx_texture_format
, __DRIdrawable
*dPriv
)
777 struct gl_texture_unit
*texUnit
;
778 struct gl_texture_object
*texObj
;
779 struct gl_texture_image
*texImage
;
780 struct radeon_renderbuffer
*rb
;
781 radeon_texture_image
*rImage
;
782 radeonContextPtr radeon
;
784 struct radeon_framebuffer
*rfb
;
787 uint32_t internalFormat
, type
, format
;
790 format
= GL_UNSIGNED_BYTE
;
791 internalFormat
= (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
? 3 : 4);
793 radeon
= pDRICtx
->driverPrivate
;
794 rmesa
= pDRICtx
->driverPrivate
;
796 rfb
= dPriv
->driverPrivate
;
797 texUnit
= &radeon
->glCtx
->Texture
.Unit
[radeon
->glCtx
->Texture
.CurrentUnit
];
798 texObj
= _mesa_select_tex_object(radeon
->glCtx
, texUnit
, target
);
799 texImage
= _mesa_get_tex_image(radeon
->glCtx
, texObj
, target
, 0);
801 rImage
= get_radeon_texture_image(texImage
);
802 t
= radeon_tex_obj(texObj
);
807 radeon_update_renderbuffers(pDRICtx
, dPriv
);
808 /* back & depth buffer are useless free them right away */
809 rb
= (void*)rfb
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
;
811 radeon_bo_unref(rb
->bo
);
814 rb
= (void*)rfb
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
;
816 radeon_bo_unref(rb
->bo
);
819 rb
= rfb
->color_rb
[0];
820 if (rb
->bo
== NULL
) {
821 /* Failed to BO for the buffer */
825 _mesa_lock_texture(radeon
->glCtx
, texObj
);
827 radeon_bo_unref(t
->bo
);
831 radeon_bo_unref(rImage
->bo
);
835 radeon_miptree_unreference(t
->mt
);
839 radeon_miptree_unreference(rImage
->mt
);
842 _mesa_init_teximage_fields(radeon
->glCtx
, target
, texImage
,
843 rb
->base
.Width
, rb
->base
.Height
, 1, 0, rb
->cpp
);
844 texImage
->RowStride
= rb
->pitch
/ rb
->cpp
;
845 texImage
->TexFormat
= radeonChooseTextureFormat(radeon
->glCtx
,
849 radeon_bo_ref(rImage
->bo
);
851 radeon_bo_ref(t
->bo
);
852 t
->image_override
= GL_TRUE
;
853 t
->override_offset
= 0;
854 pitch_val
= rb
->pitch
;
857 if (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
) {
858 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
859 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
861 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
862 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
863 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
864 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
865 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
866 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
867 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
868 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
870 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
871 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
873 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
874 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
875 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
876 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
877 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
878 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
879 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
880 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
887 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
888 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
890 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
891 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
892 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
893 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
894 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
895 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
896 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
897 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
901 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
902 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
904 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
905 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
906 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
907 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
908 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
909 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
910 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
911 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
916 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
917 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
923 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
924 SETfield(t
->SQ_TEX_RESOURCE0
, rb
->base
.Width
- 1,
925 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
926 SETfield(t
->SQ_TEX_RESOURCE1
, rb
->base
.Height
- 1,
927 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
929 t
->validated
= GL_TRUE
;
930 _mesa_unlock_texture(radeon
->glCtx
, texObj
);
934 void r600SetTexBuffer(__DRIcontext
*pDRICtx
, GLint target
, __DRIdrawable
*dPriv
)
936 r600SetTexBuffer2(pDRICtx
, target
, GLX_TEXTURE_FORMAT_RGBA_EXT
, dPriv
);