radeon: Remove set-but-unused variables in radeonSetTexBuffer2() variants.
[mesa.git] / src / mesa / drivers / dri / r600 / r700_assembler.h
1 /*
2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21
22 /*
23 * Authors:
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
25 */
26
27 #ifndef _R700_ASSEMBLER_H_
28 #define _R700_ASSEMBLER_H_
29
30 #include "main/mtypes.h"
31 #include "program/prog_instruction.h"
32
33 #include "r700_chip.h"
34 #include "r700_shaderinst.h"
35 #include "r700_shader.h"
36
37 typedef enum LOADABLE_SCRIPT_SIGNITURE
38 {
39 GLSL_NOISE1 = 0x10000001,
40 GLSL_NOISE2 = 0x10000002,
41 GLSL_NOISE3 = 0x10000003,
42 GLSL_NOISE4 = 0x10000004
43 }LOADABLE_SCRIPT_SIGNITURE;
44
45 typedef struct COMPILED_SUB
46 {
47 struct prog_instruction *Instructions;
48 GLuint NumInstructions;
49 GLuint NumTemporaries;
50 GLuint NumParameters;
51 GLuint MinRegIndex;
52 GLfloat (*ParameterValues)[4];
53 GLbyte outputSwizzleX;
54 GLbyte outputSwizzleY;
55 GLbyte outputSwizzleZ;
56 GLbyte outputSwizzleW;
57 GLshort srcRegIndex[3];
58 GLushort dstRegIndex;
59 }COMPILED_SUB;
60
61 typedef struct PRESUB_DESCtag
62 {
63 LOADABLE_SCRIPT_SIGNITURE sptSigniture;
64 GLint subIL_Shift;
65 struct prog_src_register InReg[3];
66 struct prog_dst_register OutReg;
67
68 GLushort maxStartReg;
69 GLushort number_used_registers;
70
71 GLuint unConstantsStart;
72
73 COMPILED_SUB * pCompiledSub;
74 } PRESUB_DESC;
75
76 typedef enum SHADER_PIPE_TYPE
77 {
78 SPT_VP = 0,
79 SPT_FP = 1
80 } SHADER_PIPE_TYPE;
81
82 typedef enum ConstantCycles
83 {
84 NUMBER_OF_CYCLES = 3,
85 NUMBER_OF_COMPONENTS = 4
86 } ConstantCycles;
87
88 typedef enum HARDWARE_LIMIT_VALUES
89 {
90 TEMPORARY_REGISTER_OFFSET = SQ_ALU_SRC_GPR_BASE,
91 MAX_TEMPORARY_REGISTERS = SQ_ALU_SRC_GPR_SIZE,
92 MAX_CONSTANT_REGISTERS = SQ_ALU_SRC_CFILE_SIZE,
93 CFILE_REGISTER_OFFSET = SQ_ALU_SRC_CFILE_BASE,
94 NUMBER_OF_INPUT_COLORS = 2,
95 NUMBER_OF_OUTPUT_COLORS = 8,
96 NUMBER_OF_TEXTURE_UNITS = 16,
97 MEGA_FETCH_BYTES = 32
98 } HARDWARE_LIMIT_VALUES;
99
100 typedef enum AddressMode
101 {
102 ADDR_ABSOLUTE = 0,
103 ADDR_RELATIVE_A0 = 1,
104 ADDR_RELATIVE_FLI_0 = 2,
105 NUMBER_OF_ADDR_MOD = 3
106 } AddressMode;
107
108 typedef enum SrcRegisterType
109 {
110 SRC_REG_TEMPORARY = 0,
111 SRC_REG_GPR = 1,
112 SRC_REG_CONSTANT = 2,
113 SRC_REG_ALT_TEMPORARY = 3,
114 SRC_REC_LITERAL = 4,
115 NUMBER_OF_SRC_REG_TYPE = 5
116 } SrcRegisterType;
117
118 typedef enum DstRegisterType
119 {
120 DST_REG_TEMPORARY = 0,
121 DST_REG_A0 = 1,
122 DST_REG_OUT = 2,
123 DST_REG_OUT_X_REPL = 3,
124 DST_REG_ALT_TEMPORARY = 4,
125 DST_REG_INPUT = 5,
126 NUMBER_OF_DST_REG_TYPE = 6
127 } DstRegisterType;
128
129 typedef unsigned int BITS;
130
131 typedef struct PVSDSTtag
132 {
133 #ifdef MESA_BIG_ENDIAN
134 BITS addrmode1:1; //32
135 BITS addrmode0:1; //31 //29
136
137 BITS dualop:1; // 30 //26
138
139 BITS op3:1; // 29 Represents *_OP3_* ALU opcode
140
141 BITS writew:1; //28
142 BITS writez:1;
143 BITS writey:1;
144 BITS writex:1;
145
146 BITS reg:10; //24 //20
147 BITS rtype:3;
148
149 BITS pred_inv :1; //11 //8
150 BITS predicated:1; //10 //8
151 BITS math:1;
152 BITS opcode:8; //(:6) //@@@ really should be 10 bits for OP2
153 #else
154 BITS opcode:8; //(:6) //@@@ really should be 10 bits for OP2
155 BITS math:1;
156 BITS predicated:1; //10 //8
157 BITS pred_inv :1; //11 //8
158
159 BITS rtype:3;
160 BITS reg:10; //24 //20
161
162 BITS writex:1;
163 BITS writey:1;
164 BITS writez:1;
165 BITS writew:1; //28
166
167 BITS op3:1; // 29 Represents *_OP3_* ALU opcode
168
169 BITS dualop:1; // 30 //26
170
171 BITS addrmode0:1; //31 //29
172 BITS addrmode1:1; //32
173 #endif
174 } PVSDST;
175
176 typedef struct PVSINSTtag
177 {
178 #ifdef MESA_BIG_ENDIAN
179 BITS index_mode :3;
180 BITS SaturateMode :2;
181 BITS literal_slots :2;
182 #else
183 BITS literal_slots :2;
184 BITS SaturateMode :2;
185 BITS index_mode :3;
186 #endif
187 } PVSINST;
188
189 typedef struct PVSSRCtag
190 {
191 #ifdef MESA_BIG_ENDIAN
192 BITS addrmode1:1; //32
193 //BITS addrsel:2;
194 BITS negw:1; //31
195 BITS negz:1;
196 BITS negy:1;
197 BITS negx:1;
198 BITS abs:1;
199
200 BITS swizzlew:3; //26
201 BITS swizzlez:3;
202 BITS swizzley:3;
203 BITS swizzlex:3;
204 BITS reg:10; //14 (8)
205 BITS addrmode0:1;
206 BITS rtype:3;
207 #else
208 BITS rtype:3;
209 BITS addrmode0:1;
210 BITS reg:10; //14 (8)
211 BITS swizzlex:3;
212 BITS swizzley:3;
213 BITS swizzlez:3;
214 BITS swizzlew:3; //26
215
216 BITS abs:1;
217 BITS negx:1;
218 BITS negy:1;
219 BITS negz:1;
220 BITS negw:1; //31
221 //BITS addrsel:2;
222 BITS addrmode1:1; //32
223 #endif
224 } PVSSRC;
225
226 typedef struct PVSMATHtag
227 {
228 #ifdef MESA_BIG_ENDIAN
229 BITS spare2:3;
230 BITS dstcomp:2; // select dest component
231 BITS negy:1;
232 BITS negx:1;
233 BITS opcode:4;
234 BITS dstoff:2; // 2 bits of dest offset into alt ram
235 BITS swizzley:3;
236 BITS swizzlex:3;
237 BITS reg:8;
238 BITS spare:1;
239 BITS rtype:4;
240 #else
241 BITS rtype:4;
242 BITS spare:1;
243 BITS reg:8;
244 BITS swizzlex:3;
245 BITS swizzley:3;
246 BITS dstoff:2; // 2 bits of dest offset into alt ram
247 BITS opcode:4;
248 BITS negx:1;
249 BITS negy:1;
250 BITS dstcomp:2; // select dest component
251 BITS spare2:3;
252 #endif
253 } PVSMATH;
254
255 typedef union PVSDWORDtag
256 {
257 BITS bits;
258 PVSDST dst;
259 PVSINST dst2;
260 PVSSRC src;
261 PVSMATH math;
262 float f;
263 } PVSDWORD;
264
265 typedef struct VAP_OUT_VTX_FMT_0tag
266 {
267 #ifdef MESA_BIG_ENDIAN
268 BITS resvd1:12; // 20
269
270 BITS viewport_index:1; // 19
271 BITS kill_flag:1;
272 BITS rta_index:1; // shares same channel as kill_flag
273 BITS edge_flag:1;
274 BITS point_size:1; // 15
275
276 BITS depth:1; // 14
277
278 BITS normal:1;
279
280 BITS color7:1;
281 BITS color6:1;
282 BITS color5:1;
283 BITS color4:1;
284 BITS color3:1;
285 BITS color2:1;
286 BITS color1:1;
287 BITS color0:1;
288
289 BITS pos_param:1; // 4
290 BITS clip_dist1:1;
291 BITS clip_dist0:1;
292 BITS misc:1;
293 BITS pos:1; // 0
294 #else
295 BITS pos:1; // 0
296 BITS misc:1;
297 BITS clip_dist0:1;
298 BITS clip_dist1:1;
299 BITS pos_param:1; // 4
300
301 BITS color0:1; // 5
302 BITS color1:1;
303 BITS color2:1;
304 BITS color3:1;
305 BITS color4:1;
306 BITS color5:1;
307 BITS color6:1;
308 BITS color7:1;
309
310 BITS normal:1;
311
312 BITS depth:1; // 14
313
314 BITS point_size:1; // 15
315 BITS edge_flag:1;
316 BITS rta_index:1; // shares same channel as kill_flag
317 BITS kill_flag:1;
318 BITS viewport_index:1; // 19
319
320 BITS resvd1:12; // 20
321 #endif
322 } VAP_OUT_VTX_FMT_0;
323
324 typedef struct VAP_OUT_VTX_FMT_1tag
325 {
326 #ifdef MESA_BIG_ENDIAN
327 BITS resvd:8;
328
329 BITS tex7comp:3;
330 BITS tex6comp:3;
331 BITS tex5comp:3;
332 BITS tex4comp:3;
333 BITS tex3comp:3;
334 BITS tex2comp:3;
335 BITS tex1comp:3;
336 BITS tex0comp:3;
337 #else
338 BITS tex0comp:3;
339 BITS tex1comp:3;
340 BITS tex2comp:3;
341 BITS tex3comp:3;
342 BITS tex4comp:3;
343 BITS tex5comp:3;
344 BITS tex6comp:3;
345 BITS tex7comp:3;
346
347 BITS resvd:8;
348 #endif
349 } VAP_OUT_VTX_FMT_1;
350
351 typedef struct VAP_OUT_VTX_FMT_2tag
352 {
353 #ifdef MESA_BIG_ENDIAN
354 BITS resvd:8;
355
356 BITS tex15comp:3;
357 BITS tex14comp:3;
358 BITS tex13comp:3;
359 BITS tex12comp:3;
360 BITS tex11comp:3;
361 BITS tex10comp:3;
362 BITS tex9comp:3;
363 BITS tex8comp:3;
364 #else
365 BITS tex8comp :3;
366 BITS tex9comp :3;
367 BITS tex10comp:3;
368 BITS tex11comp:3;
369 BITS tex12comp:3;
370 BITS tex13comp:3;
371 BITS tex14comp:3;
372 BITS tex15comp:3;
373
374 BITS resvd:8;
375 #endif
376 } VAP_OUT_VTX_FMT_2;
377
378 typedef struct OUT_FRAGMENT_FMT_0tag
379 {
380 #ifdef MESA_BIG_ENDIAN
381 BITS resvd1:20;
382
383 BITS mask:1;
384 BITS coverage_to_mask:1;
385 BITS stencil_ref:1;
386 BITS depth:1;
387
388 BITS color7:1;
389 BITS color6:1;
390 BITS color5:1;
391 BITS color4:1;
392 BITS color3:1;
393 BITS color2:1;
394 BITS color1:1;
395 BITS color0:1;
396 #else
397 BITS color0:1;
398 BITS color1:1;
399 BITS color2:1;
400 BITS color3:1;
401 BITS color4:1;
402 BITS color5:1;
403 BITS color6:1;
404 BITS color7:1;
405
406 BITS depth:1;
407 BITS stencil_ref:1;
408 BITS coverage_to_mask:1;
409 BITS mask:1;
410
411 BITS resvd1:20;
412 #endif
413 } OUT_FRAGMENT_FMT_0;
414
415 typedef enum CF_CLAUSE_TYPE
416 {
417 CF_EXPORT_CLAUSE,
418 CF_ALU_CLAUSE,
419 CF_TEX_CLAUSE,
420 CF_VTX_CLAUSE,
421 CF_OTHER_CLAUSE,
422 CF_EMPTY_CLAUSE,
423 NUMBER_CF_CLAUSE_TYPES
424 } CF_CLAUSE_TYPE;
425
426 enum
427 {
428 MAX_BOOL_CONSTANTS = 32,
429 MAX_INT_CONSTANTS = 32,
430 MAX_FLOAT_CONSTANTS = 256,
431
432 FC_NONE = 0,
433 FC_IF = 1,
434 FC_LOOP = 2,
435 FC_REP = 3,
436 FC_PUSH_VPM = 4,
437 FC_PUSH_WQM = 5,
438
439 COND_NONE = 0,
440 COND_BOOL = 1,
441 COND_PRED = 2,
442 COND_ALU = 3,
443
444 SAFEDIST_TEX = 6, ///< safe distance for using result of texture lookup in alu or another tex lookup
445 SAFEDIST_ALU = 6 ///< the same for alu->fc
446 };
447
448 typedef struct FC_LEVEL
449 {
450 R700ControlFlowGenericClause * first;
451 R700ControlFlowGenericClause ** mid;
452 unsigned int unNumMid;
453 unsigned int midLen;
454 unsigned int type;
455 unsigned int cond;
456 unsigned int inv;
457 int id; ///< id of bool or int variable
458 } FC_LEVEL;
459
460 typedef struct VTX_FETCH_METHOD
461 {
462 GLboolean bEnableMini;
463 GLuint mega_fetch_remainder;
464 } VTX_FETCH_METHOD;
465
466 typedef struct SUB_OFFSET
467 {
468 GLint subIL_Offset;
469 GLuint unCFoffset;
470 GLuint unStackDepthMax;
471 PRESUB_DESC * pPresubDesc;
472 TypedShaderList lstCFInstructions_local;
473 } SUB_OFFSET;
474
475 typedef struct CALLER_POINTER
476 {
477 GLint subIL_Offset;
478 GLint subDescIndex;
479 R700ControlFlowGenericClause* cf_ptr;
480
481 R700ControlFlowGenericClause* prelude_cf_ptr;
482 R700ControlFlowGenericClause* finale_cf_ptr;
483 } CALLER_POINTER;
484
485 #define SQ_MAX_CALL_DEPTH 0x00000020
486
487 typedef struct CALL_LEVEL
488 {
489 unsigned int FCSP_BeforeEntry;
490 GLint subDescIndex;
491 GLushort current;
492 GLushort max;
493 TypedShaderList * plstCFInstructions_local;
494 } CALL_LEVEL;
495
496 #define HAS_CURRENT_LOOPRET 0x1L
497 #define HAS_LOOPRET 0x2L
498 #define LOOPRET_FLAGS HAS_LOOPRET | HAS_CURRENT_LOOPRET
499
500 typedef struct r700_AssemblerBase
501 {
502 R700ControlFlowSXClause* cf_last_export_ptr;
503 R700ControlFlowSXClause* cf_current_export_clause_ptr;
504 R700ControlFlowALUClause* cf_current_alu_clause_ptr;
505 R700ControlFlowGenericClause* cf_current_tex_clause_ptr;
506 R700ControlFlowGenericClause* cf_current_vtx_clause_ptr;
507 R700ControlFlowGenericClause* cf_current_cf_clause_ptr;
508
509 //Result shader
510 R700_Shader * pR700Shader;
511
512 // No clause has been created yet
513 CF_CLAUSE_TYPE cf_current_clause_type;
514
515 BITS alu_x_opcode;
516
517 GLuint number_of_exports;
518 GLuint number_of_colorandz_exports;
519 GLuint number_of_export_opcodes;
520
521 PVSDWORD D;
522 PVSDWORD D2;
523 PVSDWORD S[3];
524 PVSDWORD C[4];
525
526 unsigned int uLastPosUpdate;
527 unsigned int last_cond_register;
528
529 OUT_FRAGMENT_FMT_0 fp_stOutFmt0;
530
531 unsigned int uIIns;
532 unsigned int uOIns;
533 unsigned int number_used_registers;
534 unsigned int uUsedConsts;
535
536 unsigned int flag_reg_index;
537
538 // Fragment programs
539 unsigned int uiFP_AttributeMap[FRAG_ATTRIB_MAX];
540 unsigned int uiFP_OutputMap[FRAG_RESULT_MAX];
541 unsigned int uBoolConsts;
542 unsigned int uIntConsts;
543 unsigned int uInsts;
544 unsigned int uConsts;
545
546 // Vertex programs
547 unsigned char ucVP_AttributeMap[VERT_ATTRIB_MAX];
548 unsigned char ucVP_OutputMap[VERT_RESULT_MAX];
549
550 //-----------------------------------------------------------------------------------
551 // flow control members
552 //-----------------------------------------------------------------------------------
553 unsigned int FCSP;
554 FC_LEVEL fc_stack[32];
555
556 //-----------------------------------------------------------------------------------
557 // ArgSubst used in Assemble_Source() function
558 //-----------------------------------------------------------------------------------
559 int aArgSubst[4];
560
561 GLint hw_gpr[ NUMBER_OF_CYCLES ][ NUMBER_OF_COMPONENTS ];
562 GLint hw_cfile_addr[ NUMBER_OF_COMPONENTS ];
563 GLint hw_cfile_chan[ NUMBER_OF_COMPONENTS ];
564
565 GLuint uOutputs;
566
567 GLint color_export_register_number[NUMBER_OF_OUTPUT_COLORS];
568 GLint depth_export_register_number;
569
570 GLint stencil_export_register_number;
571 GLint coverage_to_mask_export_register_number;
572 GLint mask_export_register_number;
573
574 GLuint starting_export_register_number;
575 GLuint starting_vfetch_register_number;
576 GLuint starting_temp_register_number;
577 GLuint uHelpReg;
578 GLuint uFirstHelpReg;
579
580 GLboolean input_position_is_used;
581 GLboolean input_normal_is_used;
582
583 GLboolean input_color_is_used[NUMBER_OF_INPUT_COLORS];
584
585 GLboolean input_texture_unit_is_used[NUMBER_OF_TEXTURE_UNITS];
586
587 R700VertexGenericFetch* vfetch_instruction_ptr_array[VERT_ATTRIB_MAX];
588
589 GLuint number_of_inputs;
590
591 InstDeps *pInstDeps;
592
593 SHADER_PIPE_TYPE currentShaderType;
594 struct prog_instruction * pILInst;
595 GLuint uiCurInst;
596 GLubyte SamplerUnits[MAX_SAMPLERS];
597 GLboolean bR6xx;
598
599 /* TODO : merge bR6xx */
600 GLuint unAsic;
601
602 /* helper to decide which type of instruction to assemble */
603 GLboolean is_tex;
604 /* we inserted helper intructions and need barrier on next TEX ins */
605 GLboolean need_tex_barrier;
606
607 SUB_OFFSET * subs;
608 GLuint unSubArraySize;
609 GLuint unSubArrayPointer;
610 CALLER_POINTER * callers;
611 GLuint unCallerArraySize;
612 GLuint unCallerArrayPointer;
613 unsigned int CALLSP;
614 CALL_LEVEL CALLSTACK[SQ_MAX_CALL_DEPTH];
615
616 GLuint unCFflags;
617
618 PRESUB_DESC * presubs;
619 GLuint unPresubArraySize;
620 GLuint unNumPresub;
621 GLuint unCurNumILInsts;
622
623 GLuint unVetTexBits;
624
625 GLuint shadow_regs[R700_MAX_TEXTURE_UNITS];
626
627 GLboolean bUseMemConstant;
628 GLuint kcacheUsed;
629
630 } r700_AssemblerBase;
631
632 //Internal use
633 BITS addrmode_PVSDST(PVSDST * pPVSDST);
634 void setaddrmode_PVSDST(PVSDST * pPVSDST, BITS addrmode);
635 void nomask_PVSDST(PVSDST * pPVSDST);
636 BITS addrmode_PVSSRC(PVSSRC* pPVSSRC);
637 void setaddrmode_PVSSRC(PVSSRC* pPVSSRC, BITS addrmode);
638 void setswizzle_PVSSRC(PVSSRC* pPVSSRC, BITS swz);
639 void noswizzle_PVSSRC(PVSSRC* pPVSSRC);
640 void swizzleagain_PVSSRC(PVSSRC * pPVSSRC, BITS x, BITS y, BITS z, BITS w);
641 void neg_PVSSRC(PVSSRC* pPVSSRC);
642 void noneg_PVSSRC(PVSSRC* pPVSSRC);
643 void flipneg_PVSSRC(PVSSRC* pPVSSRC);
644 void zerocomp_PVSSRC(PVSSRC* pPVSSRC, int c);
645 void onecomp_PVSSRC(PVSSRC* pPVSSRC, int c);
646 BITS is_misc_component_exported(VAP_OUT_VTX_FMT_0* pOutVTXFmt0);
647 BITS is_depth_component_exported(OUT_FRAGMENT_FMT_0* pFPOutFmt) ;
648 GLboolean is_reduction_opcode(PVSDWORD * dest);
649 GLuint GetSurfaceFormat(GLenum eType, GLuint nChannels, GLuint * pClient_size);
650
651 unsigned int r700GetNumOperands(GLuint opcode, GLuint nIsOp3);
652
653 unsigned int EG_GetNumOperands(GLuint opcode, GLuint nIsOp3);
654
655 GLboolean IsTex(gl_inst_opcode Opcode);
656 GLboolean IsAlu(gl_inst_opcode Opcode);
657 int check_current_clause(r700_AssemblerBase* pAsm,
658 CF_CLAUSE_TYPE new_clause_type);
659 GLboolean add_vfetch_instruction(r700_AssemblerBase* pAsm,
660 R700VertexInstruction* vertex_instruction_ptr);
661 GLboolean add_tex_instruction(r700_AssemblerBase* pAsm,
662 R700TextureInstruction* tex_instruction_ptr);
663 GLboolean assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
664 GLuint gl_client_id,
665 GLuint destination_register,
666 GLuint number_of_elements,
667 GLenum dataElementType,
668 VTX_FETCH_METHOD* pFetchMethod);
669 GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
670 GLuint destination_register,
671 GLenum type,
672 GLint size,
673 GLubyte element,
674 GLuint _signed,
675 GLboolean normalize,
676 GLenum format,
677 VTX_FETCH_METHOD * pFetchMethod);
678
679 GLboolean EG_assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
680 GLuint destination_register,
681 GLenum type,
682 GLint size,
683 GLubyte element,
684 GLuint _signed,
685 GLboolean normalize,
686 GLenum format,
687 VTX_FETCH_METHOD * pFetchMethod);
688 //-----------------------
689
690 GLboolean cleanup_vfetch_instructions(r700_AssemblerBase* pAsm);
691 GLuint gethelpr(r700_AssemblerBase* pAsm);
692 void resethelpr(r700_AssemblerBase* pAsm);
693 void checkop_init(r700_AssemblerBase* pAsm);
694 GLboolean mov_temp(r700_AssemblerBase* pAsm, int src);
695 GLboolean checkop1(r700_AssemblerBase* pAsm);
696 GLboolean checkop2(r700_AssemblerBase* pAsm);
697 GLboolean checkop3(r700_AssemblerBase* pAsm);
698 GLboolean assemble_src(r700_AssemblerBase *pAsm,
699 int src,
700 int fld);
701 GLboolean assemble_dst(r700_AssemblerBase *pAsm);
702 GLboolean tex_dst(r700_AssemblerBase *pAsm);
703 GLboolean tex_src(r700_AssemblerBase *pAsm);
704 GLboolean assemble_tex_instruction(r700_AssemblerBase *pAsm, GLboolean normalized);
705 void initialize(r700_AssemblerBase *pAsm);
706 GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr,
707 int source_index,
708 PVSSRC* pSource,
709 BITS scalar_channel_index,
710 r700_AssemblerBase *pAsm);
711
712 GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
713 R700ALUInstruction* alu_instruction_ptr,
714 GLuint contiguous_slots_needed);
715
716 GLboolean add_cf_instruction(r700_AssemblerBase* pAsm);
717 void add_return_inst(r700_AssemblerBase *pAsm);
718
719 void get_src_properties(R700ALUInstruction* alu_instruction_ptr,
720 int source_index,
721 BITS* psrc_sel,
722 BITS* psrc_rel,
723 BITS* psrc_chan,
724 BITS* psrc_neg);
725 int is_cfile(BITS sel);
726 int is_const(BITS sel);
727 int is_gpr(BITS sel);
728 GLboolean reserve_cfile(r700_AssemblerBase* pAsm,
729 GLuint sel,
730 GLuint chan);
731 GLboolean reserve_gpr(r700_AssemblerBase* pAsm, GLuint sel, GLuint chan, GLuint cycle);
732 GLboolean cycle_for_scalar_bank_swizzle(const int swiz, const int sel, GLuint* pCycle);
733 GLboolean cycle_for_vector_bank_swizzle(const int swiz, const int sel, GLuint* pCycle);
734 GLboolean check_scalar(r700_AssemblerBase* pAsm,
735 R700ALUInstruction* alu_instruction_ptr);
736 GLboolean check_vector(r700_AssemblerBase* pAsm,
737 R700ALUInstruction* alu_instruction_ptr);
738 GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm);
739
740 GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops);
741 GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset);
742 GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue);
743 GLboolean testFlag(r700_AssemblerBase *pAsm);
744 GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP);
745 GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF);
746
747 GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode);
748 GLboolean assemble_ABS(r700_AssemblerBase *pAsm);
749 GLboolean assemble_ADD(r700_AssemblerBase *pAsm);
750 GLboolean assemble_ARL(r700_AssemblerBase *pAsm);
751 GLboolean assemble_BAD(char *opcode_str);
752 GLboolean assemble_CMP(r700_AssemblerBase *pAsm);
753 GLboolean assemble_DOT(r700_AssemblerBase *pAsm);
754 GLboolean assemble_DST(r700_AssemblerBase *pAsm);
755 GLboolean assemble_EX2(r700_AssemblerBase *pAsm);
756 GLboolean assemble_EXP(r700_AssemblerBase *pAsm);
757 GLboolean assemble_FLR(r700_AssemblerBase *pAsm);
758 GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm);
759 GLboolean assemble_FRC(r700_AssemblerBase *pAsm);
760 GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode);
761 GLboolean assemble_LG2(r700_AssemblerBase *pAsm);
762 GLboolean assemble_LRP(r700_AssemblerBase *pAsm);
763 GLboolean assemble_LOG(r700_AssemblerBase *pAsm);
764 GLboolean assemble_MAD(r700_AssemblerBase *pAsm);
765 GLboolean assemble_LIT(r700_AssemblerBase *pAsm);
766 GLboolean assemble_MAX(r700_AssemblerBase *pAsm);
767 GLboolean assemble_MIN(r700_AssemblerBase *pAsm);
768 GLboolean assemble_MOV(r700_AssemblerBase *pAsm);
769 GLboolean assemble_MUL(r700_AssemblerBase *pAsm);
770 GLboolean assemble_POW(r700_AssemblerBase *pAsm);
771 GLboolean assemble_RCP(r700_AssemblerBase *pAsm);
772 GLboolean assemble_RSQ(r700_AssemblerBase *pAsm);
773 GLboolean assemble_SCS(r700_AssemblerBase *pAsm);
774 GLboolean assemble_SGE(r700_AssemblerBase *pAsm);
775 GLboolean assemble_CONT(r700_AssemblerBase *pAsm);
776
777 GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode);
778 GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode);
779 GLboolean assemble_TRIG(r700_AssemblerBase *pAsm, BITS opcode);
780
781 GLboolean assemble_SLT(r700_AssemblerBase *pAsm);
782 GLboolean assemble_SSG(r700_AssemblerBase *pAsm);
783 GLboolean assemble_STP(r700_AssemblerBase *pAsm);
784 GLboolean assemble_TEX(r700_AssemblerBase *pAsm);
785 GLboolean assemble_XPD(r700_AssemblerBase *pAsm);
786 GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm);
787 GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse);
788 GLboolean assemble_ELSE(r700_AssemblerBase *pAsm);
789 GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm);
790
791 GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm);
792 GLboolean assemble_BRK(r700_AssemblerBase *pAsm);
793 GLboolean assemble_COND(r700_AssemblerBase *pAsm);
794 GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm);
795
796 GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex, GLuint uiIL_Shift);
797 GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm);
798 GLboolean assemble_RET(r700_AssemblerBase *pAsm);
799 GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
800 GLint nILindex,
801 GLuint uiIL_Offest,
802 GLuint uiNumberInsts,
803 struct prog_instruction *pILInst,
804 PRESUB_DESC * pPresubDesc);
805
806 GLboolean Process_Export(r700_AssemblerBase* pAsm,
807 GLuint type,
808 GLuint export_starting_index,
809 GLuint export_count,
810 GLuint starting_register_number,
811 GLboolean is_depth_export);
812 GLboolean Move_Depth_Exports_To_Correct_Channels(r700_AssemblerBase *pAsm,
813 BITS depth_channel_select);
814
815 GLboolean callPreSub(r700_AssemblerBase* pAsm,
816 LOADABLE_SCRIPT_SIGNITURE scriptSigniture,
817 /* struct prog_instruction ** pILInstParent, */
818 COMPILED_SUB * pCompiledSub,
819 GLshort uOutReg,
820 GLshort uNumValidSrc);
821 GLboolean EG_add_ps_interp(r700_AssemblerBase* pAsm);
822
823 //Interface
824 GLboolean AssembleInstr(GLuint uiFirstInst,
825 GLuint uiIL_Shift,
826 GLuint uiNumberInsts,
827 struct prog_instruction *pILInst,
828 r700_AssemblerBase *pR700AsmCode);
829 GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
830 GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
831
832 GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg);
833 GLboolean InitShaderProgram(r700_AssemblerBase * pAsm);
834
835 int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader);
836 GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode);
837
838 #endif //_R700_ASSEMBLER_H_