src/mesa/drivers/dri/r600/r700_assembler.h

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  */
  26
  27 #ifndef _R700_ASSEMBLER_H_
  28 #define _R700_ASSEMBLER_H_
  29
  30 #include "main/mtypes.h"
  31 #include "shader/prog_instruction.h"
  32
  33 #include "r700_chip.h"
  34 #include "r700_shaderinst.h"
  35 #include "r700_shader.h"
  36
  37 typedef enum SHADER_PIPE_TYPE
  38 {
  39     SPT_VP = 0,
  40     SPT_FP = 1
  41 } SHADER_PIPE_TYPE;
  42
  43 typedef enum ConstantCycles
  44 {
  45     NUMBER_OF_CYCLES     = 3,
  46     NUMBER_OF_COMPONENTS = 4
  47 } ConstantCycles;
  48
  49 typedef enum  HARDWARE_LIMIT_VALUES
  50 {
  51    TEMPORARY_REGISTER_OFFSET = SQ_ALU_SRC_GPR_BASE,
  52    MAX_TEMPORARY_REGISTERS   = SQ_ALU_SRC_GPR_SIZE,
  53    MAX_CONSTANT_REGISTERS    = SQ_ALU_SRC_CFILE_SIZE,
  54    CFILE_REGISTER_OFFSET     = SQ_ALU_SRC_CFILE_BASE,
  55    NUMBER_OF_INPUT_COLORS    = 2,
  56    NUMBER_OF_OUTPUT_COLORS   = 8,
  57    NUMBER_OF_TEXTURE_UNITS   = 16,
  58    MEGA_FETCH_BYTES          = 32
  59 } HARDWARE_LIMIT_VALUES;
  60
  61 typedef enum AddressMode
  62 {
  63     ADDR_ABSOLUTE          = 0,
  64     ADDR_RELATIVE_A0       = 1,
  65     ADDR_RELATIVE_FLI_0    = 2,
  66     NUMBER_OF_ADDR_MOD     = 3
  67 } AddressMode;
  68
  69 typedef enum SrcRegisterType
  70 {
  71     SRC_REG_TEMPORARY      = 0,
  72     SRC_REG_INPUT          = 1,
  73     SRC_REG_CONSTANT       = 2,
  74     SRC_REG_ALT_TEMPORARY  = 3,
  75     SRC_REC_LITERAL        = 4,
  76     NUMBER_OF_SRC_REG_TYPE = 5
  77 } SrcRegisterType;
  78
  79 typedef enum DstRegisterType
  80 {
  81     DST_REG_TEMPORARY      = 0,
  82     DST_REG_A0             = 1,
  83     DST_REG_OUT            = 2,
  84     DST_REG_OUT_X_REPL     = 3,
  85     DST_REG_ALT_TEMPORARY  = 4,
  86     DST_REG_INPUT          = 5,
  87     NUMBER_OF_DST_REG_TYPE = 6
  88 } DstRegisterType;
  89
  90 typedef unsigned int BITS;
  91
  92 typedef struct PVSDSTtag
  93 {
  94         BITS opcode:8;     //(:6)  //@@@ really should be 10 bits for OP2
  95         BITS math:1;
  96         BITS predicated:1; //10   //8
  97         BITS pred_inv  :1; //11   //8
  98
  99         BITS rtype:3;
 100         BITS reg:10;       //24   //20
 101
 102         BITS writex:1;
 103         BITS writey:1;
 104         BITS writez:1;
 105         BITS writew:1;     //28
 106
 107         BITS op3:1;       // 29  Represents *_OP3_* ALU opcode
 108
 109         BITS dualop:1;    // 30  //26
 110
 111         BITS addrmode0:1; //31   //29
 112         BITS addrmode1:1; //32
 113 } PVSDST;
 114
 115 typedef struct PVSINSTtag
 116 {
 117     BITS literal      :2;
 118     BITS SaturateMode :2;
 119 } PVSINST;
 120
 121 typedef struct PVSSRCtag
 122 {
 123         BITS rtype:4;
 124         BITS addrmode0:1;
 125         BITS reg:10;      //15     (8)
 126         BITS swizzlex:3;
 127         BITS swizzley:3;
 128         BITS swizzlez:3;
 129         BITS swizzlew:3;  //27
 130
 131         BITS negx:1;
 132         BITS negy:1;
 133         BITS negz:1;
 134         BITS negw:1;      //31
 135         //BITS addrsel:2;
 136         BITS addrmode1:1; //32
 137 } PVSSRC;
 138
 139 typedef struct PVSMATHtag
 140 {
 141         BITS rtype:4;
 142         BITS spare:1;
 143         BITS reg:8;
 144         BITS swizzlex:3;
 145         BITS swizzley:3;
 146         BITS dstoff:2; // 2 bits of dest offset into alt ram
 147         BITS opcode:4;
 148         BITS negx:1;
 149         BITS negy:1;
 150         BITS dstcomp:2; // select dest component
 151         BITS spare2:3;
 152 } PVSMATH;
 153
 154 typedef union PVSDWORDtag
 155 {
 156         BITS    bits;
 157         PVSDST  dst;
 158     PVSINST dst2;
 159         PVSSRC  src;
 160         PVSMATH math;
 161         float   f;
 162 } PVSDWORD;
 163
 164 typedef struct VAP_OUT_VTX_FMT_0tag
 165 {
 166         BITS pos:1;      // 0
 167         BITS misc:1;
 168         BITS clip_dist0:1;
 169         BITS clip_dist1:1;
 170         BITS pos_param:1; // 4
 171
 172         BITS color0:1;    // 5
 173         BITS color1:1;
 174         BITS color2:1;
 175         BITS color3:1;
 176         BITS color4:1;
 177         BITS color5:1;
 178         BITS color6:1;
 179         BITS color7:1;
 180
 181         BITS normal:1;
 182
 183         BITS depth:1;          // 14
 184
 185         BITS point_size:1;     // 15
 186         BITS edge_flag:1;
 187         BITS rta_index:1;      //     shares same channel as kill_flag
 188         BITS kill_flag:1;
 189         BITS viewport_index:1; // 19
 190
 191         BITS resvd1:12;        // 20
 192 } VAP_OUT_VTX_FMT_0;
 193
 194 typedef struct VAP_OUT_VTX_FMT_1tag
 195 {
 196         BITS tex0comp:3;
 197         BITS tex1comp:3;
 198         BITS tex2comp:3;
 199         BITS tex3comp:3;
 200         BITS tex4comp:3;
 201         BITS tex5comp:3;
 202         BITS tex6comp:3;
 203         BITS tex7comp:3;
 204
 205         BITS resvd:8;
 206 } VAP_OUT_VTX_FMT_1;
 207
 208 typedef struct VAP_OUT_VTX_FMT_2tag
 209 {
 210         BITS tex8comp :3;
 211         BITS tex9comp :3;
 212         BITS tex10comp:3;
 213         BITS tex11comp:3;
 214         BITS tex12comp:3;
 215         BITS tex13comp:3;
 216         BITS tex14comp:3;
 217         BITS tex15comp:3;
 218
 219         BITS resvd:8;
 220 } VAP_OUT_VTX_FMT_2;
 221
 222 typedef struct OUT_FRAGMENT_FMT_0tag
 223 {
 224         BITS color0:1;
 225         BITS color1:1;
 226         BITS color2:1;
 227         BITS color3:1;
 228         BITS color4:1;
 229         BITS color5:1;
 230         BITS color6:1;
 231         BITS color7:1;
 232
 233         BITS depth:1;
 234         BITS stencil_ref:1;
 235         BITS coverage_to_mask:1;
 236         BITS mask:1;
 237
 238         BITS resvd1:20;
 239 } OUT_FRAGMENT_FMT_0;
 240
 241 typedef enum  CF_CLAUSE_TYPE
 242 {
 243    CF_EXPORT_CLAUSE,
 244    CF_ALU_CLAUSE,
 245    CF_TEX_CLAUSE,
 246    CF_VTX_CLAUSE,
 247    CF_OTHER_CLAUSE,
 248    CF_EMPTY_CLAUSE,
 249    NUMBER_CF_CLAUSE_TYPES
 250 } CF_CLAUSE_TYPE;
 251
 252 enum
 253 {
 254     MAX_BOOL_CONSTANTS   = 32,
 255     MAX_INT_CONSTANTS    = 32,
 256     MAX_FLOAT_CONSTANTS  = 256,
 257
 258     FC_NONE = 0,
 259     FC_IF = 1,
 260     FC_LOOP = 2,
 261     FC_REP = 3,
 262     FC_PUSH_VPM = 4,
 263     FC_PUSH_WQM = 5,
 264
 265     COND_NONE = 0,
 266     COND_BOOL = 1,
 267     COND_PRED = 2,
 268     COND_ALU = 3,
 269
 270     SAFEDIST_TEX = 6, ///< safe distance for using result of texture lookup in alu or another tex lookup
 271     SAFEDIST_ALU = 6 ///< the same for alu->fc
 272 };
 273
 274 typedef struct FC_LEVEL
 275 {
 276         R700ControlFlowGenericClause *  first;
 277     R700ControlFlowGenericClause ** mid;
 278     unsigned int unNumMid;
 279         unsigned int midLen;
 280         unsigned int type;
 281         unsigned int cond;
 282         unsigned int inv;
 283         unsigned int bpush; ///< 1 if first instruction does branch stack push
 284                          int id; ///< id of bool or int variable
 285 } FC_LEVEL;
 286
 287 typedef struct VTX_FETCH_METHOD
 288 {
 289         GLboolean bEnableMini;
 290         GLuint mega_fetch_remainder;
 291 } VTX_FETCH_METHOD;
 292
 293 typedef struct SUB_OFFSET
 294 {
 295     GLint  subIL_Offset;
 296     GLuint unCFoffset;
 297     TypedShaderList lstCFInstructions_local;
 298 } SUB_OFFSET;
 299
 300 typedef struct CALLER_POINTER
 301 {
 302     GLint  subIL_Offset;
 303     GLint  subDescIndex;
 304     R700ControlFlowGenericClause* cf_ptr;
 305 } CALLER_POINTER;
 306
 307 #define SQ_MAX_CALL_DEPTH 0x00000020
 308
 309 typedef struct STACK_USAGE
 310 {
 311         BITS pushs   :8;
 312         BITS current :8;
 313         BITS max     :8;
 314 } STACK_USAGE;
 315
 316 typedef union STACKDWORDtag
 317 {
 318         BITS        bits;
 319         STACK_USAGE su;
 320 } STACKDWORD;
 321
 322 typedef struct CALL_LEVEL
 323 {
 324     unsigned int      FCSP_BeforeEntry;
 325     STACKDWORD        stackUsage;
 326     TypedShaderList * plstCFInstructions_local;
 327 } CALL_LEVEL;
 328
 329 #define HAS_CURRENT_LOOPRET 0x1L
 330 #define HAS_LOOPRET         0x2L
 331 #define LOOPRET_FLAGS       HAS_LOOPRET | HAS_CURRENT_LOOPRET
 332
 333 typedef struct r700_AssemblerBase
 334 {
 335         R700ControlFlowSXClause*      cf_last_export_ptr;
 336         R700ControlFlowSXClause*      cf_current_export_clause_ptr;
 337         R700ControlFlowALUClause*     cf_current_alu_clause_ptr;
 338         R700ControlFlowGenericClause* cf_current_tex_clause_ptr;
 339         R700ControlFlowGenericClause* cf_current_vtx_clause_ptr;
 340         R700ControlFlowGenericClause* cf_current_cf_clause_ptr;
 341
 342     //Result shader
 343     R700_Shader * pR700Shader;
 344
 345         // No clause has been created yet
 346         CF_CLAUSE_TYPE cf_current_clause_type;
 347
 348     BITS alu_x_opcode;
 349
 350         GLuint number_of_exports;
 351         GLuint number_of_colorandz_exports;
 352         GLuint number_of_export_opcodes;
 353
 354         PVSDWORD D;
 355     PVSDWORD D2;
 356         PVSDWORD S[3];
 357
 358         unsigned int uLastPosUpdate;
 359
 360         OUT_FRAGMENT_FMT_0     fp_stOutFmt0;
 361
 362         unsigned int uIIns;
 363         unsigned int uOIns;
 364         unsigned int number_used_registers;
 365         unsigned int uUsedConsts;
 366
 367     unsigned int flag_reg_index;
 368
 369         // Fragment programs
 370         unsigned int uiFP_AttributeMap[FRAG_ATTRIB_MAX];
 371         unsigned int uiFP_OutputMap[FRAG_RESULT_MAX];
 372         unsigned int uBoolConsts;
 373         unsigned int uIntConsts;
 374         unsigned int uInsts;
 375         unsigned int uConsts;
 376
 377         // Vertex programs
 378         unsigned char ucVP_AttributeMap[VERT_ATTRIB_MAX];
 379         unsigned char ucVP_OutputMap[VERT_RESULT_MAX];
 380
 381     unsigned char * pucOutMask;
 382
 383         //-----------------------------------------------------------------------------------
 384         // flow control members
 385         //-----------------------------------------------------------------------------------
 386         unsigned int FCSP;
 387         FC_LEVEL fc_stack[32];
 388
 389         unsigned int branch_depth;
 390         unsigned int max_branch_depth;
 391
 392         //-----------------------------------------------------------------------------------
 393         // ArgSubst used in Assemble_Source() function
 394         //-----------------------------------------------------------------------------------
 395         int aArgSubst[4];
 396
 397     GLint hw_gpr[ NUMBER_OF_CYCLES ][ NUMBER_OF_COMPONENTS ];
 398     GLint hw_cfile_addr[ NUMBER_OF_COMPONENTS ];
 399     GLint hw_cfile_chan[ NUMBER_OF_COMPONENTS ];
 400
 401     GLuint uOutputs;
 402
 403     GLint color_export_register_number[NUMBER_OF_OUTPUT_COLORS];
 404         GLint depth_export_register_number;
 405
 406         GLint stencil_export_register_number;
 407         GLint coverage_to_mask_export_register_number;
 408         GLint mask_export_register_number;
 409
 410         GLuint starting_export_register_number;
 411         GLuint starting_vfetch_register_number;
 412         GLuint starting_temp_register_number;
 413         GLuint uHelpReg;
 414         GLuint uFirstHelpReg;
 415
 416         GLboolean input_position_is_used;
 417         GLboolean input_normal_is_used;
 418
 419         GLboolean input_color_is_used[NUMBER_OF_INPUT_COLORS];
 420
 421         GLboolean input_texture_unit_is_used[NUMBER_OF_TEXTURE_UNITS];
 422
 423     R700VertexGenericFetch* vfetch_instruction_ptr_array[VERT_ATTRIB_MAX];
 424
 425         GLuint number_of_inputs;
 426
 427     InstDeps *pInstDeps;
 428
 429     SHADER_PIPE_TYPE currentShaderType;
 430     struct prog_instruction * pILInst;
 431     GLuint             uiCurInst;
 432     GLboolean   bR6xx;
 433     /* helper to decide which type of instruction to assemble */
 434     GLboolean is_tex;
 435     /* we inserted helper intructions and need barrier on next TEX ins */
 436     GLboolean need_tex_barrier;
 437
 438     SUB_OFFSET     * subs;
 439     GLuint           unSubArraySize;
 440     GLuint           unSubArrayPointer;
 441     CALLER_POINTER * callers;
 442     GLuint           unCallerArraySize;
 443     GLuint           unCallerArrayPointer;
 444     unsigned int     CALLSP;
 445     CALL_LEVEL       CALLSTACK[SQ_MAX_CALL_DEPTH];
 446
 447     GLuint unCFflags;
 448
 449 } r700_AssemblerBase;
 450
 451 //Internal use
 452 inline void checkStackDepth(r700_AssemblerBase *pAsm, GLuint uReason);
 453 BITS addrmode_PVSDST(PVSDST * pPVSDST);
 454 void setaddrmode_PVSDST(PVSDST * pPVSDST, BITS addrmode);
 455 void nomask_PVSDST(PVSDST * pPVSDST);
 456 BITS addrmode_PVSSRC(PVSSRC* pPVSSRC);
 457 void setaddrmode_PVSSRC(PVSSRC* pPVSSRC, BITS addrmode);
 458 void setswizzle_PVSSRC(PVSSRC* pPVSSRC, BITS swz);
 459 void noswizzle_PVSSRC(PVSSRC* pPVSSRC);
 460 void swizzleagain_PVSSRC(PVSSRC * pPVSSRC, BITS x, BITS y, BITS z, BITS w);
 461 void neg_PVSSRC(PVSSRC* pPVSSRC);
 462 void noneg_PVSSRC(PVSSRC* pPVSSRC);
 463 void flipneg_PVSSRC(PVSSRC* pPVSSRC);
 464 void zerocomp_PVSSRC(PVSSRC* pPVSSRC, int c);
 465 void onecomp_PVSSRC(PVSSRC* pPVSSRC, int c);
 466 BITS is_misc_component_exported(VAP_OUT_VTX_FMT_0* pOutVTXFmt0);
 467 BITS is_depth_component_exported(OUT_FRAGMENT_FMT_0* pFPOutFmt) ;
 468 GLboolean is_reduction_opcode(PVSDWORD * dest);
 469 GLuint GetSurfaceFormat(GLenum eType, GLuint nChannels, GLuint * pClient_size);
 470
 471 unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm);
 472
 473 GLboolean IsTex(gl_inst_opcode Opcode);
 474 GLboolean IsAlu(gl_inst_opcode Opcode);
 475 int check_current_clause(r700_AssemblerBase* pAsm,
 476                                              CF_CLAUSE_TYPE      new_clause_type);
 477 GLboolean add_vfetch_instruction(r700_AssemblerBase*     pAsm,
 478                                                                  R700VertexInstruction*  vertex_instruction_ptr);
 479 GLboolean add_tex_instruction(r700_AssemblerBase*     pAsm,
 480                               R700TextureInstruction* tex_instruction_ptr);
 481 GLboolean assemble_vfetch_instruction(r700_AssemblerBase* pAsm,
 482                                                                 GLuint gl_client_id,
 483                                 GLuint destination_register,
 484                                                                 GLuint number_of_elements,
 485                                 GLenum dataElementType,
 486                                                                 VTX_FETCH_METHOD* pFetchMethod);
 487 GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
 488                                        GLuint              destination_register,
 489                                        GLenum              type,
 490                                        GLint               size,
 491                                        GLubyte             element,
 492                                        GLuint              _signed,
 493                                        GLboolean           normalize,
 494                                        VTX_FETCH_METHOD  * pFetchMethod);
 495 GLboolean cleanup_vfetch_instructions(r700_AssemblerBase* pAsm);
 496 GLuint gethelpr(r700_AssemblerBase* pAsm);
 497 void resethelpr(r700_AssemblerBase* pAsm);
 498 void checkop_init(r700_AssemblerBase* pAsm);
 499 GLboolean mov_temp(r700_AssemblerBase* pAsm, int src);
 500 GLboolean checkop1(r700_AssemblerBase* pAsm);
 501 GLboolean checkop2(r700_AssemblerBase* pAsm);
 502 GLboolean checkop3(r700_AssemblerBase* pAsm);
 503 GLboolean assemble_src(r700_AssemblerBase *pAsm,
 504                        int src,
 505                        int fld);
 506 GLboolean assemble_dst(r700_AssemblerBase *pAsm);
 507 GLboolean tex_dst(r700_AssemblerBase *pAsm);
 508 GLboolean tex_src(r700_AssemblerBase *pAsm);
 509 GLboolean assemble_tex_instruction(r700_AssemblerBase *pAsm, GLboolean normalized);
 510 void initialize(r700_AssemblerBase *pAsm);
 511 GLboolean assemble_alu_src(R700ALUInstruction*  alu_instruction_ptr,
 512                            int                  source_index,
 513                            PVSSRC*              pSource,
 514                            BITS                 scalar_channel_index);
 515 GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,
 516                               R700ALUInstruction* alu_instruction_ptr,
 517                               GLuint              contiguous_slots_needed);
 518
 519 GLboolean add_cf_instruction(r700_AssemblerBase* pAsm);
 520 void add_return_inst(r700_AssemblerBase *pAsm);
 521
 522 void get_src_properties(R700ALUInstruction*  alu_instruction_ptr,
 523                         int                  source_index,
 524                         BITS*                psrc_sel,
 525                         BITS*                psrc_rel,
 526                         BITS*                psrc_chan,
 527                         BITS*                psrc_neg);
 528 int is_cfile(BITS sel);
 529 int is_const(BITS sel);
 530 int is_gpr(BITS sel);
 531 GLboolean reserve_cfile(r700_AssemblerBase* pAsm,
 532                         GLuint sel,
 533                         GLuint chan);
 534 GLboolean reserve_gpr(r700_AssemblerBase* pAsm, GLuint sel, GLuint chan, GLuint cycle);
 535 GLboolean cycle_for_scalar_bank_swizzle(const int swiz, const int sel, GLuint* pCycle);
 536 GLboolean cycle_for_vector_bank_swizzle(const int swiz, const int sel, GLuint* pCycle);
 537 GLboolean check_scalar(r700_AssemblerBase* pAsm,
 538                        R700ALUInstruction* alu_instruction_ptr);
 539 GLboolean check_vector(r700_AssemblerBase* pAsm,
 540                        R700ALUInstruction* alu_instruction_ptr);
 541 GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm);
 542 GLboolean next_ins(r700_AssemblerBase *pAsm);
 543
 544 GLboolean next_ins2(r700_AssemblerBase *pAsm);
 545 GLboolean assemble_alu_instruction2(r700_AssemblerBase *pAsm);
 546
 547 /* TODO : merge next_ins/2/literal, assemble_alu_instruction/2/literal */
 548 GLboolean next_ins_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral);
 549 GLboolean assemble_alu_instruction_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral);
 550
 551 GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops);
 552 GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset);
 553 GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue);
 554 GLboolean testFlag(r700_AssemblerBase *pAsm);
 555 GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP);
 556 GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF);
 557
 558 GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode);
 559 GLboolean assemble_ABS(r700_AssemblerBase *pAsm);
 560 GLboolean assemble_ADD(r700_AssemblerBase *pAsm);
 561 GLboolean assemble_ARL(r700_AssemblerBase *pAsm);
 562 GLboolean assemble_BAD(char *opcode_str);
 563 GLboolean assemble_CMP(r700_AssemblerBase *pAsm);
 564 GLboolean assemble_COS(r700_AssemblerBase *pAsm);
 565 GLboolean assemble_DOT(r700_AssemblerBase *pAsm);
 566 GLboolean assemble_DST(r700_AssemblerBase *pAsm);
 567 GLboolean assemble_EX2(r700_AssemblerBase *pAsm);
 568 GLboolean assemble_EXP(r700_AssemblerBase *pAsm);
 569 GLboolean assemble_FLR(r700_AssemblerBase *pAsm);
 570 GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm);
 571 GLboolean assemble_FRC(r700_AssemblerBase *pAsm);
 572 GLboolean assemble_KIL(r700_AssemblerBase *pAsm);
 573 GLboolean assemble_LG2(r700_AssemblerBase *pAsm);
 574 GLboolean assemble_LRP(r700_AssemblerBase *pAsm);
 575 GLboolean assemble_LOG(r700_AssemblerBase *pAsm);
 576 GLboolean assemble_MAD(r700_AssemblerBase *pAsm);
 577 GLboolean assemble_LIT(r700_AssemblerBase *pAsm);
 578 GLboolean assemble_MAX(r700_AssemblerBase *pAsm);
 579 GLboolean assemble_MIN(r700_AssemblerBase *pAsm);
 580 GLboolean assemble_MOV(r700_AssemblerBase *pAsm);
 581 GLboolean assemble_MUL(r700_AssemblerBase *pAsm);
 582 GLboolean assemble_POW(r700_AssemblerBase *pAsm);
 583 GLboolean assemble_RCP(r700_AssemblerBase *pAsm);
 584 GLboolean assemble_RSQ(r700_AssemblerBase *pAsm);
 585 GLboolean assemble_SIN(r700_AssemblerBase *pAsm);
 586 GLboolean assemble_SCS(r700_AssemblerBase *pAsm);
 587 GLboolean assemble_SGE(r700_AssemblerBase *pAsm);
 588
 589 GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode);
 590 GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode);
 591
 592 GLboolean assemble_SLT(r700_AssemblerBase *pAsm);
 593 GLboolean assemble_STP(r700_AssemblerBase *pAsm);
 594 GLboolean assemble_TEX(r700_AssemblerBase *pAsm);
 595 GLboolean assemble_XPD(r700_AssemblerBase *pAsm);
 596 GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm);
 597 GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse);
 598 GLboolean assemble_ELSE(r700_AssemblerBase *pAsm);
 599 GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm);
 600
 601 GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm);
 602 GLboolean assemble_BRK(r700_AssemblerBase *pAsm);
 603 GLboolean assemble_COND(r700_AssemblerBase *pAsm);
 604 GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm);
 605
 606 GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex);
 607 GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm);
 608 GLboolean assemble_RET(r700_AssemblerBase *pAsm);
 609 GLboolean assemble_CAL(r700_AssemblerBase *pAsm,
 610                        GLint nILindex,
 611                        GLuint uiNumberInsts,
 612                        struct prog_instruction *pILInst);
 613
 614 GLboolean Process_Export(r700_AssemblerBase* pAsm,
 615                          GLuint type,
 616                          GLuint export_starting_index,
 617                          GLuint export_count,
 618                          GLuint starting_register_number,
 619                          GLboolean is_depth_export);
 620 GLboolean Move_Depth_Exports_To_Correct_Channels(r700_AssemblerBase *pAsm,
 621                                                  BITS depth_channel_select);
 622
 623
 624 //Interface
 625 GLboolean AssembleInstr(GLuint uiFirstInst,
 626                         GLuint uiNumberInsts,
 627                         struct prog_instruction *pILInst,
 628                                                 r700_AssemblerBase *pR700AsmCode);
 629 GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
 630 GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);
 631
 632 GLboolean RelocProgram(r700_AssemblerBase * pAsm);
 633 GLboolean InitShaderProgram(r700_AssemblerBase * pAsm);
 634
 635 int       Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader);
 636 GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode);
 637
 638 #endif //_R700_ASSEMBLER_H_