src/mesa/drivers/dri/r600/r700_fragprog.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdarg.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <math.h>
  33
  34 #include "main/imports.h"
  35 #include "shader/prog_parameter.h"
  36 #include "shader/prog_statevars.h"
  37 #include "shader/program.h"
  38
  39 #include "r600_context.h"
  40 #include "r600_cmdbuf.h"
  41
  42 #include "r700_fragprog.h"
  43
  44 #include "r700_debug.h"
  45
  46 void insert_wpos_code(GLcontext *ctx, struct gl_fragment_program *fprog)
  47 {
  48     static const gl_state_index winstate[STATE_LENGTH]
  49          = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0};
  50     struct prog_instruction *newInst, *inst;
  51     GLint  win_size;  /* state reference */
  52     GLuint wpos_temp; /* temp register */
  53     int i, j;
  54
  55     /* PARAM win_size = STATE_FB_SIZE */
  56     win_size = _mesa_add_state_reference(fprog->Base.Parameters, winstate);
  57
  58     wpos_temp = fprog->Base.NumTemporaries++;
  59
  60     /* scan program where WPOS is used and replace with wpos_temp */
  61     inst = fprog->Base.Instructions;
  62     for (i = 0; i < fprog->Base.NumInstructions; i++) {
  63         for (j=0; j < 3; j++) {
  64             if(inst->SrcReg[j].File == PROGRAM_INPUT &&
  65                inst->SrcReg[j].Index == FRAG_ATTRIB_WPOS) {
  66                 inst->SrcReg[j].File = PROGRAM_TEMPORARY;
  67                 inst->SrcReg[j].Index = wpos_temp;
  68             }
  69         }
  70         inst++;
  71     }
  72
  73     _mesa_insert_instructions(&(fprog->Base), 0, 1);
  74
  75     newInst = fprog->Base.Instructions;
  76     /* invert wpos.y
  77      * wpos_temp.xyzw = wpos.x-yzw + winsize.0y00 */
  78     newInst[0].Opcode = OPCODE_ADD;
  79     newInst[0].DstReg.File = PROGRAM_TEMPORARY;
  80     newInst[0].DstReg.Index = wpos_temp;
  81     newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
  82
  83     newInst[0].SrcReg[0].File = PROGRAM_INPUT;
  84     newInst[0].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
  85     newInst[0].SrcReg[0].Swizzle = SWIZZLE_XYZW;
  86     newInst[0].SrcReg[0].Negate = NEGATE_Y;
  87
  88     newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
  89     newInst[0].SrcReg[1].Index = win_size;
  90     newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
  91
  92 }
  93
  94 //TODO : Validate FP input with VP output.
  95 void Map_Fragment_Program(r700_AssemblerBase         *pAsm,
  96                                                   struct gl_fragment_program *mesa_fp,
  97                           GLcontext *ctx)
  98 {
  99         unsigned int unBit;
 100     unsigned int i;
 101     GLuint       ui;
 102
 103     /* match fp inputs with vp exports. */
 104     struct r700_vertex_program_cont *vpc =
 105                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 106     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 107
 108         pAsm->number_used_registers = 0;
 109
 110 //Input mapping : mesa_fp->Base.InputsRead set the flag, set in
 111         //The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
 112         //MUST match order in Map_Vertex_Output
 113         unBit = 1 << FRAG_ATTRIB_WPOS;
 114         if(mesa_fp->Base.InputsRead & unBit)
 115         {
 116                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
 117         }
 118
 119     unBit = 1 << VERT_RESULT_COL0;
 120         if(OutputsWritten & unBit)
 121         {
 122                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
 123         }
 124
 125         unBit = 1 << VERT_RESULT_COL1;
 126         if(OutputsWritten & unBit)
 127         {
 128                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
 129         }
 130
 131     unBit = 1 << VERT_RESULT_FOGC;
 132     if(OutputsWritten & unBit)
 133     {
 134         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
 135     }
 136
 137         for(i=0; i<8; i++)
 138         {
 139                 unBit = 1 << (VERT_RESULT_TEX0 + i);
 140                 if(OutputsWritten & unBit)
 141                 {
 142                         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
 143                 }
 144         }
 145
 146 /* order has been taken care of */
 147 #if 1
 148     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 149         {
 150         unBit = 1 << i;
 151         if(OutputsWritten & unBit)
 152                 {
 153             pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
 154         }
 155     }
 156 #else
 157     if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
 158     {
 159             struct r700_vertex_program_cont *vpc =
 160                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 161         struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
 162         struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
 163         struct gl_program_parameter      * pVsParam;
 164         struct gl_program_parameter      * pPsParam;
 165         GLuint j, k;
 166         GLuint unMaxVarying = 0;
 167
 168         for(i=0; i<VsVarying->NumParameters; i++)
 169         {
 170             pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
 171         }
 172
 173         for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
 174             {
 175             unBit = 1 << i;
 176             if(mesa_fp->Base.InputsRead & unBit)
 177                     {
 178                 j = i - FRAG_ATTRIB_VAR0;
 179                 pPsParam = PsVarying->Parameters + j;
 180
 181                 for(k=0; k<VsVarying->NumParameters; k++)
 182                 {
 183                     pVsParam = VsVarying->Parameters + k;
 184
 185                                 if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
 186                     {
 187                         pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
 188                         if(k > unMaxVarying)
 189                         {
 190                             unMaxVarying = k;
 191                         }
 192                         break;
 193                     }
 194                 }
 195                     }
 196         }
 197
 198         pAsm->number_used_registers += unMaxVarying + 1;
 199     }
 200 #endif
 201     unBit = 1 << FRAG_ATTRIB_FACE;
 202     if(mesa_fp->Base.InputsRead & unBit)
 203     {
 204         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE] = pAsm->number_used_registers++;
 205     }
 206
 207     unBit = 1 << FRAG_ATTRIB_PNTC;
 208     if(mesa_fp->Base.InputsRead & unBit)
 209     {
 210         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC] = pAsm->number_used_registers++;
 211     }
 212
 213 /* Map temporary registers (GPRs) */
 214     pAsm->starting_temp_register_number = pAsm->number_used_registers;
 215
 216     if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
 217     {
 218             pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
 219     }
 220     else
 221     {
 222         pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
 223     }
 224
 225 /* Output mapping */
 226         pAsm->number_of_exports = 0;
 227         pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
 228         pAsm->starting_export_register_number = pAsm->number_used_registers;
 229
 230     for (i = 0; i < FRAG_RESULT_MAX; ++i)
 231     {
 232         unBit = 1 << i;
 233         if (mesa_fp->Base.OutputsWritten & unBit)
 234         {
 235             if (i == FRAG_RESULT_DEPTH)
 236             {
 237                 pAsm->depth_export_register_number = pAsm->number_used_registers;
 238                 pAsm->pR700Shader->depthIsExported = 1;
 239             }
 240
 241             pAsm->uiFP_OutputMap[i] = pAsm->number_used_registers++;
 242             ++pAsm->number_of_exports;
 243             ++pAsm->number_of_colorandz_exports;
 244         }
 245     }
 246
 247     pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
 248     for(ui=0; ui<pAsm->number_of_exports; ui++)
 249     {
 250         pAsm->pucOutMask[ui] = 0x0;
 251     }
 252
 253     pAsm->flag_reg_index = pAsm->number_used_registers++;
 254
 255     pAsm->uFirstHelpReg = pAsm->number_used_registers;
 256 }
 257
 258 GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
 259                                                                 struct gl_fragment_program   *mesa_fp)
 260 {
 261     GLuint i, j;
 262     GLint * puiTEMPwrites;
 263     GLint * puiTEMPreads;
 264     struct prog_instruction * pILInst;
 265     InstDeps         *pInstDeps;
 266     struct prog_instruction * texcoord_DepInst;
 267     GLint              nDepInstID;
 268
 269     puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 270     puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 271
 272     for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
 273     {
 274         puiTEMPwrites[i] = -1;
 275         puiTEMPreads[i] = -1;
 276     }
 277
 278     pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
 279
 280     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 281     {
 282         pInstDeps[i].nDstDep = -1;
 283         pILInst = &(mesa_fp->Base.Instructions[i]);
 284
 285         //Dst
 286         if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
 287         {
 288             //Set lastwrite for the temp
 289             puiTEMPwrites[pILInst->DstReg.Index] = i;
 290         }
 291
 292         //Src
 293         for(j=0; j<3; j++)
 294         {
 295             if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
 296             {
 297                 //Set dep.
 298                 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
 299                 //Set first read
 300                 if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
 301                 {
 302                     puiTEMPreads[pILInst->SrcReg[j].Index] = i;
 303                 }
 304             }
 305             else
 306             {
 307                 pInstDeps[i].nSrcDeps[j] = -1;
 308             }
 309         }
 310     }
 311
 312     fp->r700AsmCode.pInstDeps = pInstDeps;
 313
 314     //Find dep for tex inst
 315     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 316     {
 317         pILInst = &(mesa_fp->Base.Instructions[i]);
 318
 319         if(GL_TRUE == IsTex(pILInst->Opcode))
 320         {   //src0 is the tex coord register, src1 is texunit, src2 is textype
 321             nDepInstID = pInstDeps[i].nSrcDeps[0];
 322             if(nDepInstID >= 0)
 323             {
 324                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 325                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 326                 {
 327                     pInstDeps[nDepInstID].nDstDep = i;
 328                     pInstDeps[i].nDstDep = i;
 329                 }
 330                 else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
 331                 {
 332                     pInstDeps[i].nDstDep = i;
 333                 }
 334                 else
 335                 {   //... other deps?
 336                 }
 337             }
 338             // make sure that we dont overwrite src used earlier
 339             nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
 340             if(nDepInstID < i)
 341             {
 342                 pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
 343                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 344                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 345                 {
 346                     pInstDeps[nDepInstID].nDstDep = i;
 347                 }
 348
 349             }
 350
 351         }
 352         }
 353
 354     FREE(puiTEMPwrites);
 355     FREE(puiTEMPreads);
 356
 357     return GL_TRUE;
 358 }
 359
 360 GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
 361                                                              struct gl_fragment_program   *mesa_fp,
 362                                  GLcontext *ctx)
 363 {
 364         GLuint    number_of_colors_exported;
 365         GLboolean z_enabled = GL_FALSE;
 366         GLuint    unBit, shadow_unit;
 367         int i;
 368         struct prog_instruction *inst;
 369         gl_state_index shadow_ambient[STATE_LENGTH]
 370             = { STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0};
 371
 372     //Init_Program
 373         Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
 374
 375     if(mesa_fp->Base.InputsRead & FRAG_BIT_WPOS)
 376     {
 377         insert_wpos_code(ctx, mesa_fp);
 378     }
 379
 380     /* add/map  consts for ARB_shadow_ambient */
 381     if(mesa_fp->Base.ShadowSamplers)
 382     {
 383         inst = mesa_fp->Base.Instructions;
 384         for (i = 0; i < mesa_fp->Base.NumInstructions; i++)
 385         {
 386             if(inst->TexShadow == 1)
 387             {
 388                 shadow_unit = inst->TexSrcUnit;
 389                 shadow_ambient[2] = shadow_unit;
 390                 fp->r700AsmCode.shadow_regs[shadow_unit] =
 391                     _mesa_add_state_reference(mesa_fp->Base.Parameters, shadow_ambient);
 392             }
 393             inst++;
 394         }
 395     }
 396
 397     Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
 398
 399     if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
 400         {
 401                 return GL_FALSE;
 402     }
 403
 404     InitShaderProgram(&(fp->r700AsmCode));
 405
 406     for(i=0; i < MAX_SAMPLERS; i++)
 407     {
 408          fp->r700AsmCode.SamplerUnits[i] = fp->mesa_program.Base.SamplerUnits[i];
 409     }
 410
 411     fp->r700AsmCode.unCurNumILInsts = mesa_fp->Base.NumInstructions;
 412
 413         if( GL_FALSE == AssembleInstr(0,
 414                                   0,
 415                                   mesa_fp->Base.NumInstructions,
 416                                   &(mesa_fp->Base.Instructions[0]),
 417                                   &(fp->r700AsmCode)) )
 418         {
 419                 return GL_FALSE;
 420         }
 421
 422     if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
 423     {
 424         return GL_FALSE;
 425     }
 426
 427     if( GL_FALSE == RelocProgram(&(fp->r700AsmCode), &(mesa_fp->Base)) )
 428     {
 429         return GL_FALSE;
 430     }
 431
 432     fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
 433                          : (fp->r700AsmCode.number_used_registers - 1);
 434
 435         fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
 436
 437         number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
 438
 439         unBit = 1 << FRAG_RESULT_DEPTH;
 440         if(mesa_fp->Base.OutputsWritten & unBit)
 441         {
 442                 z_enabled = GL_TRUE;
 443                 number_of_colors_exported--;
 444         }
 445
 446         /* illegal to set this to 0 */
 447         if(number_of_colors_exported || z_enabled)
 448         {
 449             fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
 450         }
 451         else
 452         {
 453             fp->r700Shader.exportMode = (1 << 1);
 454         }
 455
 456     fp->translated = GL_TRUE;
 457
 458         return GL_TRUE;
 459 }
 460
 461 void r700SelectFragmentShader(GLcontext *ctx)
 462 {
 463     context_t *context = R700_CONTEXT(ctx);
 464     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 465             (ctx->FragmentProgram._Current);
 466     if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
 467     {
 468             fp->r700AsmCode.bR6xx = 1;
 469     }
 470
 471     if (GL_FALSE == fp->translated)
 472             r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
 473 }
 474
 475 void * r700GetActiveFpShaderBo(GLcontext * ctx)
 476 {
 477     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 478                                            (ctx->FragmentProgram._Current);
 479
 480     return fp->shaderbo;
 481 }
 482
 483 GLboolean r700SetupFragmentProgram(GLcontext * ctx)
 484 {
 485     context_t *context = R700_CONTEXT(ctx);
 486     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 487     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 488                                            (ctx->FragmentProgram._Current);
 489     r700_AssemblerBase         *pAsm = &(fp->r700AsmCode);
 490     struct gl_fragment_program *mesa_fp = &(fp->mesa_program);
 491     struct gl_program_parameter_list *paramList;
 492     unsigned int unNumParamData;
 493     unsigned int ui, i;
 494     unsigned int unNumOfReg;
 495     unsigned int unBit;
 496     GLuint exportCount;
 497     GLboolean point_sprite = GL_FALSE;
 498
 499     if(GL_FALSE == fp->loaded)
 500     {
 501             if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
 502             {
 503                     Assemble( &(fp->r700Shader) );
 504             }
 505
 506         /* Load fp to gpu */
 507         r600EmitShader(ctx,
 508                        &(fp->shaderbo),
 509                        (GLvoid *)(fp->r700Shader.pProgram),
 510                        fp->r700Shader.uShaderBinaryDWORDSize,
 511                        "FS");
 512
 513         fp->loaded = GL_TRUE;
 514     }
 515
 516     DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
 517                  fp->r700Shader.uShaderBinaryDWORDSize);
 518
 519     /* TODO : enable this after MemUse fixed *=
 520     (context->chipobj.MemUse)(context, fp->shadercode.buf->id);
 521     */
 522
 523     R600_STATECHANGE(context, ps);
 524
 525     r700->ps.SQ_PGM_RESOURCES_PS.u32All = 0;
 526     SETbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
 527
 528     r700->ps.SQ_PGM_START_PS.u32All = 0; /* set from buffer obj */
 529
 530     R600_STATECHANGE(context, spi);
 531
 532     unNumOfReg = fp->r700Shader.nRegs + 1;
 533
 534     ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
 535
 536     /* PS uses fragment.position */
 537     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
 538     {
 539         ui += 1;
 540         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 541         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, CENTERS_ONLY, BARYC_SAMPLE_CNTL_shift, BARYC_SAMPLE_CNTL_mask);
 542         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 543         SETbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 544     }
 545     else
 546     {
 547         CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 548         CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 549     }
 550
 551     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_FACE))
 552     {
 553         ui += 1;
 554         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 555         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 556         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ALL_BITS_bit);
 557         SETfield(r700->SPI_PS_IN_CONTROL_1.u32All, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE], FRONT_FACE_ADDR_shift, FRONT_FACE_ADDR_mask);
 558     }
 559     else
 560     {
 561         CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 562     }
 563
 564     /* see if we need any point_sprite replacements, also increase num_interp
 565      * as there's no vp output for them */
 566     for (i = FRAG_ATTRIB_TEX0; i<= FRAG_ATTRIB_TEX7; i++)
 567     {
 568         if(ctx->Point.CoordReplace[i - FRAG_ATTRIB_TEX0] == GL_TRUE) {
 569             ui++;
 570             point_sprite = GL_TRUE;
 571         }
 572     }
 573
 574     if( mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC))
 575         ui++;
 576
 577     if ((mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) || point_sprite)
 578     {
 579         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 580         SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 581         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_S, PNT_SPRITE_OVRD_X_shift, PNT_SPRITE_OVRD_X_mask);
 582         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_T, PNT_SPRITE_OVRD_Y_shift, PNT_SPRITE_OVRD_Y_mask);
 583         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_0, PNT_SPRITE_OVRD_Z_shift, PNT_SPRITE_OVRD_Z_mask);
 584         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_1, PNT_SPRITE_OVRD_W_shift, PNT_SPRITE_OVRD_W_mask);
 585         if(ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
 586             SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 587         else
 588             CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 589     }
 590     else
 591     {
 592         CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 593     }
 594
 595
 596     ui = (unNumOfReg < ui) ? ui : unNumOfReg;
 597
 598     SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
 599
 600     CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
 601
 602     if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
 603         {
 604         SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
 605                  STACK_SIZE_shift, STACK_SIZE_mask);
 606     }
 607
 608     SETfield(r700->ps.SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
 609              EXPORT_MODE_shift, EXPORT_MODE_mask);
 610
 611     // emit ps input map
 612     struct r700_vertex_program_cont *vpc =
 613                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 614     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 615
 616     for(ui = 0; ui < R700_MAX_SHADER_EXPORTS; ui++)
 617         r700->SPI_PS_INPUT_CNTL[ui].u32All = 0;
 618
 619     unBit = 1 << FRAG_ATTRIB_WPOS;
 620     if(mesa_fp->Base.InputsRead & unBit)
 621     {
 622             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS];
 623             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 624             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 625                      SEMANTIC_shift, SEMANTIC_mask);
 626             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 627                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 628             else
 629                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 630     }
 631
 632     unBit = 1 << VERT_RESULT_COL0;
 633     if(OutputsWritten & unBit)
 634     {
 635             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
 636             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 637             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 638                      SEMANTIC_shift, SEMANTIC_mask);
 639             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 640                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 641             else
 642                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 643     }
 644
 645     unBit = 1 << VERT_RESULT_COL1;
 646     if(OutputsWritten & unBit)
 647     {
 648             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
 649             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 650             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 651                      SEMANTIC_shift, SEMANTIC_mask);
 652             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 653                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 654             else
 655                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 656     }
 657
 658     unBit = 1 << VERT_RESULT_FOGC;
 659     if(OutputsWritten & unBit)
 660     {
 661             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
 662             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 663             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 664                      SEMANTIC_shift, SEMANTIC_mask);
 665             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 666                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 667             else
 668                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 669     }
 670
 671     for(i=0; i<8; i++)
 672     {
 673             unBit = 1 << (VERT_RESULT_TEX0 + i);
 674             if((OutputsWritten & unBit) || (ctx->Point.CoordReplace[i] == GL_TRUE))
 675             {
 676                     ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
 677                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 678                     SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 679                              SEMANTIC_shift, SEMANTIC_mask);
 680                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 681                     /* ARB_point_sprite */
 682                     if(ctx->Point.CoordReplace[i] == GL_TRUE)
 683                     {
 684                              SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 685                     }
 686             }
 687     }
 688
 689     unBit = 1 << FRAG_ATTRIB_FACE;
 690     if(mesa_fp->Base.InputsRead & unBit)
 691     {
 692             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE];
 693             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 694             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 695                      SEMANTIC_shift, SEMANTIC_mask);
 696             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 697                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 698             else
 699                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 700     }
 701     unBit = 1 << FRAG_ATTRIB_PNTC;
 702     if(mesa_fp->Base.InputsRead & unBit)
 703     {
 704             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC];
 705             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 706             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 707                      SEMANTIC_shift, SEMANTIC_mask);
 708             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 709                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 710             else
 711                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 712             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 713     }
 714
 715
 716
 717
 718     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 719         {
 720         unBit = 1 << i;
 721         if(OutputsWritten & unBit)
 722                 {
 723             ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
 724             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 725             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 726                              SEMANTIC_shift, SEMANTIC_mask);
 727             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 728                         SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 729             else
 730                         CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 731         }
 732     }
 733
 734     exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
 735     if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
 736     {
 737             R600_STATECHANGE(context, cb);
 738             r700->CB_SHADER_CONTROL.u32All = (1 << exportCount) - 1;
 739     }
 740
 741     /* sent out shader constants. */
 742     paramList = fp->mesa_program.Base.Parameters;
 743
 744     if(NULL != paramList)
 745     {
 746             _mesa_load_state_parameters(ctx, paramList);
 747
 748             if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
 749                     return GL_FALSE;
 750
 751             R600_STATECHANGE(context, ps_consts);
 752
 753             r700->ps.num_consts = paramList->NumParameters;
 754
 755             unNumParamData = paramList->NumParameters;
 756
 757             for(ui=0; ui<unNumParamData; ui++) {
 758                         r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
 759                         r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
 760                         r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
 761                         r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
 762             }
 763     } else
 764             r700->ps.num_consts = 0;
 765
 766     COMPILED_SUB * pCompiledSub;
 767     GLuint uj;
 768     GLuint unConstOffset = r700->ps.num_consts;
 769     for(ui=0; ui<pAsm->unNumPresub; ui++)
 770     {
 771         pCompiledSub = pAsm->presubs[ui].pCompiledSub;
 772
 773         r700->ps.num_consts += pCompiledSub->NumParameters;
 774
 775         for(uj=0; uj<pCompiledSub->NumParameters; uj++)
 776         {
 777             r700->ps.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0];
 778                     r700->ps.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1];
 779                     r700->ps.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2];
 780                     r700->ps.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3];
 781         }
 782         unConstOffset += pCompiledSub->NumParameters;
 783     }
 784
 785     return GL_TRUE;
 786 }
 787