src/mesa/drivers/dri/r600/r700_fragprog.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdarg.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <math.h>
  33
  34 #include "main/imports.h"
  35 #include "shader/prog_parameter.h"
  36 #include "shader/prog_statevars.h"
  37 #include "shader/program.h"
  38
  39 #include "r600_context.h"
  40 #include "r600_cmdbuf.h"
  41
  42 #include "r700_fragprog.h"
  43
  44 #include "r700_debug.h"
  45
  46 void insert_wpos_code(GLcontext *ctx, struct gl_fragment_program *fprog)
  47 {
  48     static const gl_state_index winstate[STATE_LENGTH]
  49          = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0};
  50     struct prog_instruction *newInst, *inst;
  51     GLint  win_size;  /* state reference */
  52     GLuint wpos_temp; /* temp register */
  53     int i, j;
  54
  55     /* PARAM win_size = STATE_FB_SIZE */
  56     win_size = _mesa_add_state_reference(fprog->Base.Parameters, winstate);
  57
  58     wpos_temp = fprog->Base.NumTemporaries++;
  59
  60     /* scan program where WPOS is used and replace with wpos_temp */
  61     inst = fprog->Base.Instructions;
  62     for (i = 0; i < fprog->Base.NumInstructions; i++) {
  63         for (j=0; j < 3; j++) {
  64             if(inst->SrcReg[j].File == PROGRAM_INPUT &&
  65                inst->SrcReg[j].Index == FRAG_ATTRIB_WPOS) {
  66                 inst->SrcReg[j].File = PROGRAM_TEMPORARY;
  67                 inst->SrcReg[j].Index = wpos_temp;
  68             }
  69         }
  70         inst++;
  71     }
  72
  73     _mesa_insert_instructions(&(fprog->Base), 0, 1);
  74
  75     newInst = fprog->Base.Instructions;
  76     /* invert wpos.y
  77      * wpos_temp.xyzw = wpos.x-yzw + winsize.0y00 */
  78     newInst[0].Opcode = OPCODE_ADD;
  79     newInst[0].DstReg.File = PROGRAM_TEMPORARY;
  80     newInst[0].DstReg.Index = wpos_temp;
  81     newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
  82
  83     newInst[0].SrcReg[0].File = PROGRAM_INPUT;
  84     newInst[0].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
  85     newInst[0].SrcReg[0].Swizzle = SWIZZLE_XYZW;
  86     newInst[0].SrcReg[0].Negate = NEGATE_Y;
  87
  88     newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
  89     newInst[0].SrcReg[1].Index = win_size;
  90     newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
  91
  92 }
  93
  94 //TODO : Validate FP input with VP output.
  95 void Map_Fragment_Program(r700_AssemblerBase         *pAsm,
  96                                                   struct gl_fragment_program *mesa_fp,
  97                           GLcontext *ctx)
  98 {
  99         unsigned int unBit;
 100     unsigned int i;
 101     GLuint       ui;
 102
 103     /* match fp inputs with vp exports. */
 104     struct r700_vertex_program_cont *vpc =
 105                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 106     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 107
 108         pAsm->number_used_registers = 0;
 109
 110 //Input mapping : mesa_fp->Base.InputsRead set the flag, set in
 111         //The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
 112         //MUST match order in Map_Vertex_Output
 113         unBit = 1 << FRAG_ATTRIB_WPOS;
 114         if(mesa_fp->Base.InputsRead & unBit)
 115         {
 116                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
 117         }
 118
 119     unBit = 1 << VERT_RESULT_COL0;
 120         if(OutputsWritten & unBit)
 121         {
 122                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
 123         }
 124
 125         unBit = 1 << VERT_RESULT_COL1;
 126         if(OutputsWritten & unBit)
 127         {
 128                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
 129         }
 130
 131     unBit = 1 << VERT_RESULT_FOGC;
 132     if(OutputsWritten & unBit)
 133     {
 134         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
 135     }
 136
 137         for(i=0; i<8; i++)
 138         {
 139                 unBit = 1 << (VERT_RESULT_TEX0 + i);
 140                 if(OutputsWritten & unBit)
 141                 {
 142                         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
 143                 }
 144         }
 145
 146 /* order has been taken care of */
 147 #if 1
 148     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 149         {
 150         unBit = 1 << i;
 151         if(OutputsWritten & unBit)
 152                 {
 153             pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
 154         }
 155     }
 156 #else
 157     if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
 158     {
 159             struct r700_vertex_program_cont *vpc =
 160                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 161         struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
 162         struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
 163         struct gl_program_parameter      * pVsParam;
 164         struct gl_program_parameter      * pPsParam;
 165         GLuint j, k;
 166         GLuint unMaxVarying = 0;
 167
 168         for(i=0; i<VsVarying->NumParameters; i++)
 169         {
 170             pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
 171         }
 172
 173         for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
 174             {
 175             unBit = 1 << i;
 176             if(mesa_fp->Base.InputsRead & unBit)
 177                     {
 178                 j = i - FRAG_ATTRIB_VAR0;
 179                 pPsParam = PsVarying->Parameters + j;
 180
 181                 for(k=0; k<VsVarying->NumParameters; k++)
 182                 {
 183                     pVsParam = VsVarying->Parameters + k;
 184
 185                                 if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
 186                     {
 187                         pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
 188                         if(k > unMaxVarying)
 189                         {
 190                             unMaxVarying = k;
 191                         }
 192                         break;
 193                     }
 194                 }
 195                     }
 196         }
 197
 198         pAsm->number_used_registers += unMaxVarying + 1;
 199     }
 200 #endif
 201     unBit = 1 << FRAG_ATTRIB_FACE;
 202     if(mesa_fp->Base.InputsRead & unBit)
 203     {
 204         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE] = pAsm->number_used_registers++;
 205     }
 206
 207     unBit = 1 << FRAG_ATTRIB_PNTC;
 208     if(mesa_fp->Base.InputsRead & unBit)
 209     {
 210         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC] = pAsm->number_used_registers++;
 211     }
 212
 213 /* Map temporary registers (GPRs) */
 214     pAsm->starting_temp_register_number = pAsm->number_used_registers;
 215
 216     if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
 217     {
 218             pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
 219     }
 220     else
 221     {
 222         pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
 223     }
 224
 225 /* Output mapping */
 226         pAsm->number_of_exports = 0;
 227         pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
 228         pAsm->starting_export_register_number = pAsm->number_used_registers;
 229         unBit = 1 << FRAG_RESULT_COLOR;
 230         if(mesa_fp->Base.OutputsWritten & unBit)
 231         {
 232                 pAsm->uiFP_OutputMap[FRAG_RESULT_COLOR] = pAsm->number_used_registers++;
 233                 pAsm->number_of_exports++;
 234                 pAsm->number_of_colorandz_exports++;
 235         }
 236         unBit = 1 << FRAG_RESULT_DEPTH;
 237         if(mesa_fp->Base.OutputsWritten & unBit)
 238         {
 239         pAsm->depth_export_register_number = pAsm->number_used_registers;
 240                 pAsm->uiFP_OutputMap[FRAG_RESULT_DEPTH] = pAsm->number_used_registers++;
 241                 pAsm->number_of_exports++;
 242                 pAsm->number_of_colorandz_exports++;
 243                 pAsm->pR700Shader->depthIsExported = 1;
 244         }
 245
 246     pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
 247     for(ui=0; ui<pAsm->number_of_exports; ui++)
 248     {
 249         pAsm->pucOutMask[ui] = 0x0;
 250     }
 251
 252     pAsm->flag_reg_index = pAsm->number_used_registers++;
 253
 254     pAsm->uFirstHelpReg = pAsm->number_used_registers;
 255 }
 256
 257 GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
 258                                                                 struct gl_fragment_program   *mesa_fp)
 259 {
 260     GLuint i, j;
 261     GLint * puiTEMPwrites;
 262     GLint * puiTEMPreads;
 263     struct prog_instruction * pILInst;
 264     InstDeps         *pInstDeps;
 265     struct prog_instruction * texcoord_DepInst;
 266     GLint              nDepInstID;
 267
 268     puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 269     puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 270
 271     for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
 272     {
 273         puiTEMPwrites[i] = -1;
 274         puiTEMPreads[i] = -1;
 275     }
 276
 277     pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
 278
 279     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 280     {
 281         pInstDeps[i].nDstDep = -1;
 282         pILInst = &(mesa_fp->Base.Instructions[i]);
 283
 284         //Dst
 285         if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
 286         {
 287             //Set lastwrite for the temp
 288             puiTEMPwrites[pILInst->DstReg.Index] = i;
 289         }
 290
 291         //Src
 292         for(j=0; j<3; j++)
 293         {
 294             if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
 295             {
 296                 //Set dep.
 297                 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
 298                 //Set first read
 299                 if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
 300                 {
 301                     puiTEMPreads[pILInst->SrcReg[j].Index] = i;
 302                 }
 303             }
 304             else
 305             {
 306                 pInstDeps[i].nSrcDeps[j] = -1;
 307             }
 308         }
 309     }
 310
 311     fp->r700AsmCode.pInstDeps = pInstDeps;
 312
 313     //Find dep for tex inst
 314     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 315     {
 316         pILInst = &(mesa_fp->Base.Instructions[i]);
 317
 318         if(GL_TRUE == IsTex(pILInst->Opcode))
 319         {   //src0 is the tex coord register, src1 is texunit, src2 is textype
 320             nDepInstID = pInstDeps[i].nSrcDeps[0];
 321             if(nDepInstID >= 0)
 322             {
 323                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 324                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 325                 {
 326                     pInstDeps[nDepInstID].nDstDep = i;
 327                     pInstDeps[i].nDstDep = i;
 328                 }
 329                 else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
 330                 {
 331                     pInstDeps[i].nDstDep = i;
 332                 }
 333                 else
 334                 {   //... other deps?
 335                 }
 336             }
 337             // make sure that we dont overwrite src used earlier
 338             nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
 339             if(nDepInstID < i)
 340             {
 341                 pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
 342                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 343                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 344                 {
 345                     pInstDeps[nDepInstID].nDstDep = i;
 346                 }
 347
 348             }
 349
 350         }
 351         }
 352
 353     FREE(puiTEMPwrites);
 354     FREE(puiTEMPreads);
 355
 356     return GL_TRUE;
 357 }
 358
 359 GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
 360                                                              struct gl_fragment_program   *mesa_fp,
 361                                  GLcontext *ctx)
 362 {
 363         GLuint    number_of_colors_exported;
 364         GLboolean z_enabled = GL_FALSE;
 365         GLuint    unBit, shadow_unit;
 366         int i;
 367         struct prog_instruction *inst;
 368         gl_state_index shadow_ambient[STATE_LENGTH]
 369             = { STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0};
 370
 371     //Init_Program
 372         Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
 373
 374     if(mesa_fp->Base.InputsRead & FRAG_BIT_WPOS)
 375     {
 376         insert_wpos_code(ctx, mesa_fp);
 377     }
 378
 379     /* add/map  consts for ARB_shadow_ambient */
 380     if(mesa_fp->Base.ShadowSamplers)
 381     {
 382         inst = mesa_fp->Base.Instructions;
 383         for (i = 0; i < mesa_fp->Base.NumInstructions; i++)
 384         {
 385             if(inst->TexShadow == 1)
 386             {
 387                 shadow_unit = inst->TexSrcUnit;
 388                 shadow_ambient[2] = shadow_unit;
 389                 fp->r700AsmCode.shadow_regs[shadow_unit] =
 390                     _mesa_add_state_reference(mesa_fp->Base.Parameters, shadow_ambient);
 391             }
 392             inst++;
 393         }
 394     }
 395
 396     Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
 397
 398     if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
 399         {
 400                 return GL_FALSE;
 401     }
 402
 403     InitShaderProgram(&(fp->r700AsmCode));
 404
 405     for(i=0; i < MAX_SAMPLERS; i++)
 406     {
 407          fp->r700AsmCode.SamplerUnits[i] = fp->mesa_program.Base.SamplerUnits[i];
 408     }
 409
 410     fp->r700AsmCode.unCurNumILInsts = mesa_fp->Base.NumInstructions;
 411
 412         if( GL_FALSE == AssembleInstr(0,
 413                                   0,
 414                                   mesa_fp->Base.NumInstructions,
 415                                   &(mesa_fp->Base.Instructions[0]),
 416                                   &(fp->r700AsmCode)) )
 417         {
 418                 return GL_FALSE;
 419         }
 420
 421     if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
 422     {
 423         return GL_FALSE;
 424     }
 425
 426     if( GL_FALSE == RelocProgram(&(fp->r700AsmCode), &(mesa_fp->Base)) )
 427     {
 428         return GL_FALSE;
 429     }
 430
 431     fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
 432                          : (fp->r700AsmCode.number_used_registers - 1);
 433
 434         fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
 435
 436         number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
 437
 438         unBit = 1 << FRAG_RESULT_DEPTH;
 439         if(mesa_fp->Base.OutputsWritten & unBit)
 440         {
 441                 z_enabled = GL_TRUE;
 442                 number_of_colors_exported--;
 443         }
 444
 445         /* illegal to set this to 0 */
 446         if(number_of_colors_exported || z_enabled)
 447         {
 448             fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
 449         }
 450         else
 451         {
 452             fp->r700Shader.exportMode = (1 << 1);
 453         }
 454
 455     fp->translated = GL_TRUE;
 456
 457         return GL_TRUE;
 458 }
 459
 460 void r700SelectFragmentShader(GLcontext *ctx)
 461 {
 462     context_t *context = R700_CONTEXT(ctx);
 463     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 464             (ctx->FragmentProgram._Current);
 465     if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
 466     {
 467             fp->r700AsmCode.bR6xx = 1;
 468     }
 469
 470     if (GL_FALSE == fp->translated)
 471             r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
 472 }
 473
 474 void * r700GetActiveFpShaderBo(GLcontext * ctx)
 475 {
 476     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 477                                            (ctx->FragmentProgram._Current);
 478
 479     return fp->shaderbo;
 480 }
 481
 482 GLboolean r700SetupFragmentProgram(GLcontext * ctx)
 483 {
 484     context_t *context = R700_CONTEXT(ctx);
 485     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 486     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 487                                            (ctx->FragmentProgram._Current);
 488     r700_AssemblerBase         *pAsm = &(fp->r700AsmCode);
 489     struct gl_fragment_program *mesa_fp = &(fp->mesa_program);
 490     struct gl_program_parameter_list *paramList;
 491     unsigned int unNumParamData;
 492     unsigned int ui, i;
 493     unsigned int unNumOfReg;
 494     unsigned int unBit;
 495     GLuint exportCount;
 496     GLboolean point_sprite = GL_FALSE;
 497
 498     if(GL_FALSE == fp->loaded)
 499     {
 500             if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
 501             {
 502                     Assemble( &(fp->r700Shader) );
 503             }
 504
 505         /* Load fp to gpu */
 506         r600EmitShader(ctx,
 507                        &(fp->shaderbo),
 508                        (GLvoid *)(fp->r700Shader.pProgram),
 509                        fp->r700Shader.uShaderBinaryDWORDSize,
 510                        "FS");
 511
 512         fp->loaded = GL_TRUE;
 513     }
 514
 515     DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
 516                  fp->r700Shader.uShaderBinaryDWORDSize);
 517
 518     /* TODO : enable this after MemUse fixed *=
 519     (context->chipobj.MemUse)(context, fp->shadercode.buf->id);
 520     */
 521
 522     R600_STATECHANGE(context, ps);
 523
 524     r700->ps.SQ_PGM_RESOURCES_PS.u32All = 0;
 525     SETbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
 526
 527     r700->ps.SQ_PGM_START_PS.u32All = 0; /* set from buffer obj */
 528
 529     R600_STATECHANGE(context, spi);
 530
 531     unNumOfReg = fp->r700Shader.nRegs + 1;
 532
 533     ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
 534
 535     /* PS uses fragment.position */
 536     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
 537     {
 538         ui += 1;
 539         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 540         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, CENTERS_ONLY, BARYC_SAMPLE_CNTL_shift, BARYC_SAMPLE_CNTL_mask);
 541         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 542         SETbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 543     }
 544     else
 545     {
 546         CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 547         CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 548     }
 549
 550     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_FACE))
 551     {
 552         ui += 1;
 553         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 554         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 555         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ALL_BITS_bit);
 556         SETfield(r700->SPI_PS_IN_CONTROL_1.u32All, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE], FRONT_FACE_ADDR_shift, FRONT_FACE_ADDR_mask);
 557     }
 558     else
 559     {
 560         CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 561     }
 562
 563     /* see if we need any point_sprite replacements */
 564     for (i = VERT_RESULT_TEX0; i<= VERT_RESULT_TEX7; i++)
 565     {
 566         if(ctx->Point.CoordReplace[i - VERT_RESULT_TEX0] == GL_TRUE)
 567             point_sprite = GL_TRUE;
 568     }
 569
 570     if ((mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) || point_sprite)
 571     {
 572         /* for FRAG_ATTRIB_PNTC we need to increase num_interp */
 573         if(mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC))
 574         {
 575             ui++;
 576             SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 577         }
 578         SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 579         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_S, PNT_SPRITE_OVRD_X_shift, PNT_SPRITE_OVRD_X_mask);
 580         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_T, PNT_SPRITE_OVRD_Y_shift, PNT_SPRITE_OVRD_Y_mask);
 581         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_0, PNT_SPRITE_OVRD_Z_shift, PNT_SPRITE_OVRD_Z_mask);
 582         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_1, PNT_SPRITE_OVRD_W_shift, PNT_SPRITE_OVRD_W_mask);
 583         if(ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
 584             SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 585         else
 586             CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 587     }
 588     else
 589     {
 590         CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 591     }
 592
 593
 594     ui = (unNumOfReg < ui) ? ui : unNumOfReg;
 595
 596     SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
 597
 598     CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
 599
 600     if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
 601         {
 602         SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
 603                  STACK_SIZE_shift, STACK_SIZE_mask);
 604     }
 605
 606     SETfield(r700->ps.SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
 607              EXPORT_MODE_shift, EXPORT_MODE_mask);
 608
 609     // emit ps input map
 610     struct r700_vertex_program_cont *vpc =
 611                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 612     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 613
 614     for(ui = 0; ui < R700_MAX_SHADER_EXPORTS; ui++)
 615         r700->SPI_PS_INPUT_CNTL[ui].u32All = 0;
 616
 617     unBit = 1 << FRAG_ATTRIB_WPOS;
 618     if(mesa_fp->Base.InputsRead & unBit)
 619     {
 620             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS];
 621             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 622             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 623                      SEMANTIC_shift, SEMANTIC_mask);
 624             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 625                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 626             else
 627                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 628     }
 629
 630     unBit = 1 << VERT_RESULT_COL0;
 631     if(OutputsWritten & unBit)
 632     {
 633             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
 634             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 635             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 636                      SEMANTIC_shift, SEMANTIC_mask);
 637             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 638                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 639             else
 640                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 641     }
 642
 643     unBit = 1 << VERT_RESULT_COL1;
 644     if(OutputsWritten & unBit)
 645     {
 646             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
 647             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 648             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 649                      SEMANTIC_shift, SEMANTIC_mask);
 650             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 651                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 652             else
 653                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 654     }
 655
 656     unBit = 1 << VERT_RESULT_FOGC;
 657     if(OutputsWritten & unBit)
 658     {
 659             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
 660             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 661             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 662                      SEMANTIC_shift, SEMANTIC_mask);
 663             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 664                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 665             else
 666                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 667     }
 668
 669     for(i=0; i<8; i++)
 670     {
 671             unBit = 1 << (VERT_RESULT_TEX0 + i);
 672             if(OutputsWritten & unBit)
 673             {
 674                     ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
 675                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 676                     SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 677                              SEMANTIC_shift, SEMANTIC_mask);
 678                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 679                     /* ARB_point_sprite */
 680                     if(ctx->Point.CoordReplace[i] == GL_TRUE)
 681                     {
 682                              SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 683                     }
 684             }
 685     }
 686
 687     unBit = 1 << FRAG_ATTRIB_FACE;
 688     if(mesa_fp->Base.InputsRead & unBit)
 689     {
 690             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE];
 691             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 692             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 693                      SEMANTIC_shift, SEMANTIC_mask);
 694             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 695                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 696             else
 697                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 698     }
 699     unBit = 1 << FRAG_ATTRIB_PNTC;
 700     if(mesa_fp->Base.InputsRead & unBit)
 701     {
 702             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC];
 703             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 704             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 705                      SEMANTIC_shift, SEMANTIC_mask);
 706             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 707                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 708             else
 709                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 710             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 711     }
 712
 713
 714
 715
 716     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 717         {
 718         unBit = 1 << i;
 719         if(OutputsWritten & unBit)
 720                 {
 721             ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
 722             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 723             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 724                              SEMANTIC_shift, SEMANTIC_mask);
 725             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 726                         SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 727             else
 728                         CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 729         }
 730     }
 731
 732     exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
 733     if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
 734     {
 735             R600_STATECHANGE(context, cb);
 736             r700->CB_SHADER_CONTROL.u32All = (1 << exportCount) - 1;
 737     }
 738
 739     /* sent out shader constants. */
 740     paramList = fp->mesa_program.Base.Parameters;
 741
 742     if(NULL != paramList)
 743     {
 744             _mesa_load_state_parameters(ctx, paramList);
 745
 746             if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
 747                     return GL_FALSE;
 748
 749             R600_STATECHANGE(context, ps_consts);
 750
 751             r700->ps.num_consts = paramList->NumParameters;
 752
 753             unNumParamData = paramList->NumParameters;
 754
 755             for(ui=0; ui<unNumParamData; ui++) {
 756                         r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
 757                         r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
 758                         r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
 759                         r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
 760             }
 761     } else
 762             r700->ps.num_consts = 0;
 763
 764     COMPILED_SUB * pCompiledSub;
 765     GLuint uj;
 766     GLuint unConstOffset = r700->ps.num_consts;
 767     for(ui=0; ui<pAsm->unNumPresub; ui++)
 768     {
 769         pCompiledSub = pAsm->presubs[ui].pCompiledSub;
 770
 771         r700->ps.num_consts += pCompiledSub->NumParameters;
 772
 773         for(uj=0; uj<pCompiledSub->NumParameters; uj++)
 774         {
 775             r700->ps.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0];
 776                     r700->ps.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1];
 777                     r700->ps.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2];
 778                     r700->ps.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3];
 779         }
 780         unConstOffset += pCompiledSub->NumParameters;
 781     }
 782
 783     return GL_TRUE;
 784 }
 785