src/mesa/drivers/dri/r600/r700_fragprog.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdarg.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <math.h>
  33
  34 #include "main/imports.h"
  35 #include "shader/prog_parameter.h"
  36 #include "shader/prog_statevars.h"
  37 #include "shader/program.h"
  38
  39 #include "r600_context.h"
  40 #include "r600_cmdbuf.h"
  41
  42 #include "r700_fragprog.h"
  43
  44 #include "r700_debug.h"
  45
  46 void insert_wpos_code(GLcontext *ctx, struct gl_fragment_program *fprog)
  47 {
  48     static const gl_state_index winstate[STATE_LENGTH]
  49          = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0};
  50     struct prog_instruction *newInst, *inst;
  51     GLint  win_size;  /* state reference */
  52     GLuint wpos_temp; /* temp register */
  53     int i, j;
  54
  55     /* PARAM win_size = STATE_FB_SIZE */
  56     win_size = _mesa_add_state_reference(fprog->Base.Parameters, winstate);
  57
  58     wpos_temp = fprog->Base.NumTemporaries++;
  59
  60     /* scan program where WPOS is used and replace with wpos_temp */
  61     inst = fprog->Base.Instructions;
  62     for (i = 0; i < fprog->Base.NumInstructions; i++) {
  63         for (j=0; j < 3; j++) {
  64             if(inst->SrcReg[j].File == PROGRAM_INPUT &&
  65                inst->SrcReg[j].Index == FRAG_ATTRIB_WPOS) {
  66                 inst->SrcReg[j].File = PROGRAM_TEMPORARY;
  67                 inst->SrcReg[j].Index = wpos_temp;
  68             }
  69         }
  70         inst++;
  71     }
  72
  73     _mesa_insert_instructions(&(fprog->Base), 0, 1);
  74
  75     newInst = fprog->Base.Instructions;
  76     /* invert wpos.y
  77      * wpos_temp.xyzw = wpos.x-yzw + winsize.0y00 */
  78     newInst[0].Opcode = OPCODE_ADD;
  79     newInst[0].DstReg.File = PROGRAM_TEMPORARY;
  80     newInst[0].DstReg.Index = wpos_temp;
  81     newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
  82
  83     newInst[0].SrcReg[0].File = PROGRAM_INPUT;
  84     newInst[0].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
  85     newInst[0].SrcReg[0].Swizzle = SWIZZLE_XYZW;
  86     newInst[0].SrcReg[0].Negate = NEGATE_Y;
  87
  88     newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
  89     newInst[0].SrcReg[1].Index = win_size;
  90     newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
  91
  92 }
  93
  94 //TODO : Validate FP input with VP output.
  95 void Map_Fragment_Program(r700_AssemblerBase         *pAsm,
  96                                                   struct gl_fragment_program *mesa_fp,
  97                           GLcontext *ctx)
  98 {
  99         unsigned int unBit;
 100     unsigned int i;
 101     GLuint       ui;
 102
 103     /* match fp inputs with vp exports. */
 104     struct r700_vertex_program_cont *vpc =
 105                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 106     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 107
 108         pAsm->number_used_registers = 0;
 109
 110 //Input mapping : mesa_fp->Base.InputsRead set the flag, set in
 111         //The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
 112         //MUST match order in Map_Vertex_Output
 113         unBit = 1 << FRAG_ATTRIB_WPOS;
 114         if(mesa_fp->Base.InputsRead & unBit)
 115         {
 116                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
 117         }
 118
 119     unBit = 1 << VERT_RESULT_COL0;
 120         if(OutputsWritten & unBit)
 121         {
 122                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
 123         }
 124
 125         unBit = 1 << VERT_RESULT_COL1;
 126         if(OutputsWritten & unBit)
 127         {
 128                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
 129         }
 130
 131     unBit = 1 << VERT_RESULT_FOGC;
 132     if(OutputsWritten & unBit)
 133     {
 134         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
 135     }
 136
 137         for(i=0; i<8; i++)
 138         {
 139                 unBit = 1 << (VERT_RESULT_TEX0 + i);
 140                 if(OutputsWritten & unBit)
 141                 {
 142                         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
 143                 }
 144         }
 145
 146 /* order has been taken care of */
 147 #if 1
 148     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 149         {
 150         unBit = 1 << i;
 151         if(OutputsWritten & unBit)
 152                 {
 153             pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
 154         }
 155     }
 156 #else
 157     if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
 158     {
 159             struct r700_vertex_program_cont *vpc =
 160                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 161         struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
 162         struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
 163         struct gl_program_parameter      * pVsParam;
 164         struct gl_program_parameter      * pPsParam;
 165         GLuint j, k;
 166         GLuint unMaxVarying = 0;
 167
 168         for(i=0; i<VsVarying->NumParameters; i++)
 169         {
 170             pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
 171         }
 172
 173         for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
 174             {
 175             unBit = 1 << i;
 176             if(mesa_fp->Base.InputsRead & unBit)
 177                     {
 178                 j = i - FRAG_ATTRIB_VAR0;
 179                 pPsParam = PsVarying->Parameters + j;
 180
 181                 for(k=0; k<VsVarying->NumParameters; k++)
 182                 {
 183                     pVsParam = VsVarying->Parameters + k;
 184
 185                                 if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
 186                     {
 187                         pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
 188                         if(k > unMaxVarying)
 189                         {
 190                             unMaxVarying = k;
 191                         }
 192                         break;
 193                     }
 194                 }
 195                     }
 196         }
 197
 198         pAsm->number_used_registers += unMaxVarying + 1;
 199     }
 200 #endif
 201     unBit = 1 << FRAG_ATTRIB_FACE;
 202     if(mesa_fp->Base.InputsRead & unBit)
 203     {
 204         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE] = pAsm->number_used_registers++;
 205     }
 206
 207     unBit = 1 << FRAG_ATTRIB_PNTC;
 208     if(mesa_fp->Base.InputsRead & unBit)
 209     {
 210         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC] = pAsm->number_used_registers++;
 211     }
 212
 213 /* Map temporary registers (GPRs) */
 214     pAsm->starting_temp_register_number = pAsm->number_used_registers;
 215
 216     if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
 217     {
 218             pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
 219     }
 220     else
 221     {
 222         pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
 223     }
 224
 225 /* Output mapping */
 226         pAsm->number_of_exports = 0;
 227         pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
 228         pAsm->starting_export_register_number = pAsm->number_used_registers;
 229         unBit = 1 << FRAG_RESULT_COLOR;
 230         if(mesa_fp->Base.OutputsWritten & unBit)
 231         {
 232                 pAsm->uiFP_OutputMap[FRAG_RESULT_COLOR] = pAsm->number_used_registers++;
 233                 pAsm->number_of_exports++;
 234                 pAsm->number_of_colorandz_exports++;
 235         }
 236         unBit = 1 << FRAG_RESULT_DEPTH;
 237         if(mesa_fp->Base.OutputsWritten & unBit)
 238         {
 239         pAsm->depth_export_register_number = pAsm->number_used_registers;
 240                 pAsm->uiFP_OutputMap[FRAG_RESULT_DEPTH] = pAsm->number_used_registers++;
 241                 pAsm->number_of_exports++;
 242                 pAsm->number_of_colorandz_exports++;
 243                 pAsm->pR700Shader->depthIsExported = 1;
 244         }
 245
 246     pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
 247     for(ui=0; ui<pAsm->number_of_exports; ui++)
 248     {
 249         pAsm->pucOutMask[ui] = 0x0;
 250     }
 251
 252     pAsm->flag_reg_index = pAsm->number_used_registers++;
 253
 254     pAsm->uFirstHelpReg = pAsm->number_used_registers;
 255 }
 256
 257 GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
 258                                                                 struct gl_fragment_program   *mesa_fp)
 259 {
 260     GLuint i, j;
 261     GLint * puiTEMPwrites;
 262     GLint * puiTEMPreads;
 263     struct prog_instruction * pILInst;
 264     InstDeps         *pInstDeps;
 265     struct prog_instruction * texcoord_DepInst;
 266     GLint              nDepInstID;
 267
 268     puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 269     puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 270
 271     for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
 272     {
 273         puiTEMPwrites[i] = -1;
 274         puiTEMPreads[i] = -1;
 275     }
 276
 277     pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
 278
 279     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 280     {
 281         pInstDeps[i].nDstDep = -1;
 282         pILInst = &(mesa_fp->Base.Instructions[i]);
 283
 284         //Dst
 285         if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
 286         {
 287             //Set lastwrite for the temp
 288             puiTEMPwrites[pILInst->DstReg.Index] = i;
 289         }
 290
 291         //Src
 292         for(j=0; j<3; j++)
 293         {
 294             if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
 295             {
 296                 //Set dep.
 297                 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
 298                 //Set first read
 299                 if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
 300                 {
 301                     puiTEMPreads[pILInst->SrcReg[j].Index] = i;
 302                 }
 303             }
 304             else
 305             {
 306                 pInstDeps[i].nSrcDeps[j] = -1;
 307             }
 308         }
 309     }
 310
 311     fp->r700AsmCode.pInstDeps = pInstDeps;
 312
 313     //Find dep for tex inst
 314     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 315     {
 316         pILInst = &(mesa_fp->Base.Instructions[i]);
 317
 318         if(GL_TRUE == IsTex(pILInst->Opcode))
 319         {   //src0 is the tex coord register, src1 is texunit, src2 is textype
 320             nDepInstID = pInstDeps[i].nSrcDeps[0];
 321             if(nDepInstID >= 0)
 322             {
 323                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 324                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 325                 {
 326                     pInstDeps[nDepInstID].nDstDep = i;
 327                     pInstDeps[i].nDstDep = i;
 328                 }
 329                 else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
 330                 {
 331                     pInstDeps[i].nDstDep = i;
 332                 }
 333                 else
 334                 {   //... other deps?
 335                 }
 336             }
 337             // make sure that we dont overwrite src used earlier
 338             nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
 339             if(nDepInstID < i)
 340             {
 341                 pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
 342                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 343                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 344                 {
 345                     pInstDeps[nDepInstID].nDstDep = i;
 346                 }
 347
 348             }
 349
 350         }
 351         }
 352
 353     FREE(puiTEMPwrites);
 354     FREE(puiTEMPreads);
 355
 356     return GL_TRUE;
 357 }
 358
 359 GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
 360                                                              struct gl_fragment_program   *mesa_fp,
 361                                  GLcontext *ctx)
 362 {
 363         GLuint    number_of_colors_exported;
 364         GLboolean z_enabled = GL_FALSE;
 365         GLuint    unBit;
 366         int i;
 367
 368     //Init_Program
 369         Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
 370
 371     if(mesa_fp->Base.InputsRead & FRAG_BIT_WPOS)
 372     {
 373         insert_wpos_code(ctx, mesa_fp);
 374     }
 375
 376     Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
 377
 378     if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
 379         {
 380                 return GL_FALSE;
 381     }
 382
 383     InitShaderProgram(&(fp->r700AsmCode));
 384
 385     for(i=0; i < MAX_SAMPLERS; i++)
 386     {
 387          fp->r700AsmCode.SamplerUnits[i] = fp->mesa_program.Base.SamplerUnits[i];
 388     }
 389
 390     fp->r700AsmCode.unCurNumILInsts = mesa_fp->Base.NumInstructions;
 391
 392         if( GL_FALSE == AssembleInstr(0,
 393                                   0,
 394                                   mesa_fp->Base.NumInstructions,
 395                                   &(mesa_fp->Base.Instructions[0]),
 396                                   &(fp->r700AsmCode)) )
 397         {
 398                 return GL_FALSE;
 399         }
 400
 401     if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
 402     {
 403         return GL_FALSE;
 404     }
 405
 406     if( GL_FALSE == RelocProgram(&(fp->r700AsmCode), &(mesa_fp->Base)) )
 407     {
 408         return GL_FALSE;
 409     }
 410
 411     fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
 412                          : (fp->r700AsmCode.number_used_registers - 1);
 413
 414         fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
 415
 416         number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
 417
 418         unBit = 1 << FRAG_RESULT_DEPTH;
 419         if(mesa_fp->Base.OutputsWritten & unBit)
 420         {
 421                 z_enabled = GL_TRUE;
 422                 number_of_colors_exported--;
 423         }
 424
 425         /* illegal to set this to 0 */
 426         if(number_of_colors_exported || z_enabled)
 427         {
 428             fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
 429         }
 430         else
 431         {
 432             fp->r700Shader.exportMode = (1 << 1);
 433         }
 434
 435     fp->translated = GL_TRUE;
 436
 437         return GL_TRUE;
 438 }
 439
 440 void r700SelectFragmentShader(GLcontext *ctx)
 441 {
 442     context_t *context = R700_CONTEXT(ctx);
 443     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 444             (ctx->FragmentProgram._Current);
 445     if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
 446     {
 447             fp->r700AsmCode.bR6xx = 1;
 448     }
 449
 450     if (GL_FALSE == fp->translated)
 451             r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
 452 }
 453
 454 void * r700GetActiveFpShaderBo(GLcontext * ctx)
 455 {
 456     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 457                                            (ctx->FragmentProgram._Current);
 458
 459     return fp->shaderbo;
 460 }
 461
 462 GLboolean r700SetupFragmentProgram(GLcontext * ctx)
 463 {
 464     context_t *context = R700_CONTEXT(ctx);
 465     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 466     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 467                                            (ctx->FragmentProgram._Current);
 468     r700_AssemblerBase         *pAsm = &(fp->r700AsmCode);
 469     struct gl_fragment_program *mesa_fp = &(fp->mesa_program);
 470     struct gl_program_parameter_list *paramList;
 471     unsigned int unNumParamData;
 472     unsigned int ui, i;
 473     unsigned int unNumOfReg;
 474     unsigned int unBit;
 475     GLuint exportCount;
 476     GLboolean point_sprite = GL_FALSE;
 477
 478     if(GL_FALSE == fp->loaded)
 479     {
 480             if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
 481             {
 482                     Assemble( &(fp->r700Shader) );
 483             }
 484
 485         /* Load fp to gpu */
 486         r600EmitShader(ctx,
 487                        &(fp->shaderbo),
 488                        (GLvoid *)(fp->r700Shader.pProgram),
 489                        fp->r700Shader.uShaderBinaryDWORDSize,
 490                        "FS");
 491
 492         fp->loaded = GL_TRUE;
 493     }
 494
 495     DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
 496                  fp->r700Shader.uShaderBinaryDWORDSize);
 497
 498     /* TODO : enable this after MemUse fixed *=
 499     (context->chipobj.MemUse)(context, fp->shadercode.buf->id);
 500     */
 501
 502     R600_STATECHANGE(context, ps);
 503
 504     r700->ps.SQ_PGM_RESOURCES_PS.u32All = 0;
 505     SETbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
 506
 507     r700->ps.SQ_PGM_START_PS.u32All = 0; /* set from buffer obj */
 508
 509     R600_STATECHANGE(context, spi);
 510
 511     unNumOfReg = fp->r700Shader.nRegs + 1;
 512
 513     ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
 514
 515     /* PS uses fragment.position */
 516     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
 517     {
 518         ui += 1;
 519         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 520         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, CENTERS_ONLY, BARYC_SAMPLE_CNTL_shift, BARYC_SAMPLE_CNTL_mask);
 521         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 522         SETbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 523     }
 524     else
 525     {
 526         CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 527         CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 528     }
 529
 530     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_FACE))
 531     {
 532         ui += 1;
 533         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 534         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 535         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ALL_BITS_bit);
 536         SETfield(r700->SPI_PS_IN_CONTROL_1.u32All, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE], FRONT_FACE_ADDR_shift, FRONT_FACE_ADDR_mask);
 537     }
 538     else
 539     {
 540         CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 541     }
 542
 543     /* see if we need any point_sprite replacements */
 544     for (i = VERT_RESULT_TEX0; i<= VERT_RESULT_TEX7; i++)
 545     {
 546         if(ctx->Point.CoordReplace[i - VERT_RESULT_TEX0] == GL_TRUE)
 547             point_sprite = GL_TRUE;
 548     }
 549
 550     if ((mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) || point_sprite)
 551     {
 552         /* for FRAG_ATTRIB_PNTC we need to increase num_interp */
 553         if(mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC))
 554         {
 555             ui++;
 556             SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 557         }
 558         SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 559         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_S, PNT_SPRITE_OVRD_X_shift, PNT_SPRITE_OVRD_X_mask);
 560         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_T, PNT_SPRITE_OVRD_Y_shift, PNT_SPRITE_OVRD_Y_mask);
 561         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_0, PNT_SPRITE_OVRD_Z_shift, PNT_SPRITE_OVRD_Z_mask);
 562         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_1, PNT_SPRITE_OVRD_W_shift, PNT_SPRITE_OVRD_W_mask);
 563         if(ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
 564             SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 565         else
 566             CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 567     }
 568     else
 569     {
 570         CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 571     }
 572
 573
 574     ui = (unNumOfReg < ui) ? ui : unNumOfReg;
 575
 576     SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
 577
 578     CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
 579
 580     if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
 581         {
 582         SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
 583                  STACK_SIZE_shift, STACK_SIZE_mask);
 584     }
 585
 586     SETfield(r700->ps.SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
 587              EXPORT_MODE_shift, EXPORT_MODE_mask);
 588
 589     // emit ps input map
 590     struct r700_vertex_program_cont *vpc =
 591                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 592     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 593
 594     for(ui = 0; ui < R700_MAX_SHADER_EXPORTS; ui++)
 595         r700->SPI_PS_INPUT_CNTL[ui].u32All = 0;
 596
 597     unBit = 1 << FRAG_ATTRIB_WPOS;
 598     if(mesa_fp->Base.InputsRead & unBit)
 599     {
 600             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS];
 601             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 602             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 603                      SEMANTIC_shift, SEMANTIC_mask);
 604             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 605                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 606             else
 607                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 608     }
 609
 610     unBit = 1 << VERT_RESULT_COL0;
 611     if(OutputsWritten & unBit)
 612     {
 613             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
 614             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 615             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 616                      SEMANTIC_shift, SEMANTIC_mask);
 617             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 618                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 619             else
 620                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 621     }
 622
 623     unBit = 1 << VERT_RESULT_COL1;
 624     if(OutputsWritten & unBit)
 625     {
 626             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
 627             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 628             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 629                      SEMANTIC_shift, SEMANTIC_mask);
 630             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 631                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 632             else
 633                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 634     }
 635
 636     unBit = 1 << VERT_RESULT_FOGC;
 637     if(OutputsWritten & unBit)
 638     {
 639             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
 640             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 641             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 642                      SEMANTIC_shift, SEMANTIC_mask);
 643             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 644                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 645             else
 646                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 647     }
 648
 649     for(i=0; i<8; i++)
 650     {
 651             unBit = 1 << (VERT_RESULT_TEX0 + i);
 652             if(OutputsWritten & unBit)
 653             {
 654                     ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
 655                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 656                     SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 657                              SEMANTIC_shift, SEMANTIC_mask);
 658                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 659                     /* ARB_point_sprite */
 660                     if(ctx->Point.CoordReplace[i] == GL_TRUE)
 661                     {
 662                              SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 663                     }
 664             }
 665     }
 666
 667     unBit = 1 << FRAG_ATTRIB_FACE;
 668     if(mesa_fp->Base.InputsRead & unBit)
 669     {
 670             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE];
 671             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 672             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 673                      SEMANTIC_shift, SEMANTIC_mask);
 674             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 675                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 676             else
 677                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 678     }
 679     unBit = 1 << FRAG_ATTRIB_PNTC;
 680     if(mesa_fp->Base.InputsRead & unBit)
 681     {
 682             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC];
 683             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 684             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 685                      SEMANTIC_shift, SEMANTIC_mask);
 686             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 687                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 688             else
 689                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 690             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 691     }
 692
 693
 694
 695
 696     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 697         {
 698         unBit = 1 << i;
 699         if(OutputsWritten & unBit)
 700                 {
 701             ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
 702             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 703             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 704                              SEMANTIC_shift, SEMANTIC_mask);
 705             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 706                         SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 707             else
 708                         CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 709         }
 710     }
 711
 712     exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
 713     if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
 714     {
 715             R600_STATECHANGE(context, cb);
 716             r700->CB_SHADER_CONTROL.u32All = (1 << exportCount) - 1;
 717     }
 718
 719     /* sent out shader constants. */
 720     paramList = fp->mesa_program.Base.Parameters;
 721
 722     if(NULL != paramList)
 723     {
 724             _mesa_load_state_parameters(ctx, paramList);
 725
 726             if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
 727                     return GL_FALSE;
 728
 729             R600_STATECHANGE(context, ps_consts);
 730
 731             r700->ps.num_consts = paramList->NumParameters;
 732
 733             unNumParamData = paramList->NumParameters;
 734
 735             for(ui=0; ui<unNumParamData; ui++) {
 736                         r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
 737                         r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
 738                         r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
 739                         r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
 740             }
 741     } else
 742             r700->ps.num_consts = 0;
 743
 744     COMPILED_SUB * pCompiledSub;
 745     GLuint uj;
 746     GLuint unConstOffset = r700->ps.num_consts;
 747     for(ui=0; ui<pAsm->unNumPresub; ui++)
 748     {
 749         pCompiledSub = pAsm->presubs[ui].pCompiledSub;
 750
 751         r700->ps.num_consts += pCompiledSub->NumParameters;
 752
 753         for(uj=0; uj<pCompiledSub->NumParameters; uj++)
 754         {
 755             r700->ps.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0];
 756                     r700->ps.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1];
 757                     r700->ps.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2];
 758                     r700->ps.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3];
 759         }
 760         unConstOffset += pCompiledSub->NumParameters;
 761     }
 762
 763     return GL_TRUE;
 764 }
 765