src/mesa/drivers/dri/r600/r700_fragprog.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdarg.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <math.h>
  33
  34 #include "main/imports.h"
  35 #include "shader/prog_parameter.h"
  36 #include "shader/prog_statevars.h"
  37
  38 #include "r600_context.h"
  39 #include "r600_cmdbuf.h"
  40
  41 #include "r700_fragprog.h"
  42
  43 #include "r700_debug.h"
  44
  45 //TODO : Validate FP input with VP output.
  46 void Map_Fragment_Program(r700_AssemblerBase         *pAsm,
  47                                                   struct gl_fragment_program *mesa_fp,
  48                           GLcontext *ctx)
  49 {
  50         unsigned int unBit;
  51     unsigned int i;
  52     GLuint       ui;
  53
  54     /* match fp inputs with vp exports. */
  55     struct r700_vertex_program_cont *vpc =
  56                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
  57     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
  58
  59         pAsm->number_used_registers = 0;
  60
  61 //Input mapping : mesa_fp->Base.InputsRead set the flag, set in
  62         //The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
  63         //MUST match order in Map_Vertex_Output
  64         unBit = 1 << FRAG_ATTRIB_WPOS;
  65         if(mesa_fp->Base.InputsRead & unBit)
  66         {
  67                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
  68         }
  69
  70     unBit = 1 << VERT_RESULT_COL0;
  71         if(OutputsWritten & unBit)
  72         {
  73                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
  74         }
  75
  76         unBit = 1 << VERT_RESULT_COL1;
  77         if(OutputsWritten & unBit)
  78         {
  79                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
  80         }
  81
  82     unBit = 1 << VERT_RESULT_FOGC;
  83     if(OutputsWritten & unBit)
  84     {
  85         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
  86     }
  87
  88         for(i=0; i<8; i++)
  89         {
  90                 unBit = 1 << (VERT_RESULT_TEX0 + i);
  91                 if(OutputsWritten & unBit)
  92                 {
  93                         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
  94                 }
  95         }
  96
  97 /* order has been taken care of */
  98 #if 1
  99     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 100         {
 101         unBit = 1 << i;
 102         if(OutputsWritten & unBit)
 103                 {
 104             pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
 105         }
 106     }
 107 #else
 108     if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
 109     {
 110             struct r700_vertex_program_cont *vpc =
 111                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 112         struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
 113         struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
 114         struct gl_program_parameter      * pVsParam;
 115         struct gl_program_parameter      * pPsParam;
 116         GLuint j, k;
 117         GLuint unMaxVarying = 0;
 118
 119         for(i=0; i<VsVarying->NumParameters; i++)
 120         {
 121             pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
 122         }
 123
 124         for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
 125             {
 126             unBit = 1 << i;
 127             if(mesa_fp->Base.InputsRead & unBit)
 128                     {
 129                 j = i - FRAG_ATTRIB_VAR0;
 130                 pPsParam = PsVarying->Parameters + j;
 131
 132                 for(k=0; k<VsVarying->NumParameters; k++)
 133                 {
 134                     pVsParam = VsVarying->Parameters + k;
 135
 136                                 if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
 137                     {
 138                         pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
 139                         if(k > unMaxVarying)
 140                         {
 141                             unMaxVarying = k;
 142                         }
 143                         break;
 144                     }
 145                 }
 146                     }
 147         }
 148
 149         pAsm->number_used_registers += unMaxVarying + 1;
 150     }
 151 #endif
 152
 153 /* Map temporary registers (GPRs) */
 154     pAsm->starting_temp_register_number = pAsm->number_used_registers;
 155
 156     if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
 157     {
 158             pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
 159     }
 160     else
 161     {
 162         pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
 163     }
 164
 165 /* Output mapping */
 166         pAsm->number_of_exports = 0;
 167         pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
 168         pAsm->starting_export_register_number = pAsm->number_used_registers;
 169         unBit = 1 << FRAG_RESULT_COLOR;
 170         if(mesa_fp->Base.OutputsWritten & unBit)
 171         {
 172                 pAsm->uiFP_OutputMap[FRAG_RESULT_COLOR] = pAsm->number_used_registers++;
 173                 pAsm->number_of_exports++;
 174                 pAsm->number_of_colorandz_exports++;
 175         }
 176         unBit = 1 << FRAG_RESULT_DEPTH;
 177         if(mesa_fp->Base.OutputsWritten & unBit)
 178         {
 179         pAsm->depth_export_register_number = pAsm->number_used_registers;
 180                 pAsm->uiFP_OutputMap[FRAG_RESULT_DEPTH] = pAsm->number_used_registers++;
 181                 pAsm->number_of_exports++;
 182                 pAsm->number_of_colorandz_exports++;
 183                 pAsm->pR700Shader->depthIsExported = 1;
 184         }
 185
 186     pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
 187     for(ui=0; ui<pAsm->number_of_exports; ui++)
 188     {
 189         pAsm->pucOutMask[ui] = 0x0;
 190     }
 191
 192     pAsm->flag_reg_index = pAsm->number_used_registers++;
 193
 194     pAsm->uFirstHelpReg = pAsm->number_used_registers;
 195 }
 196
 197 GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
 198                                                                 struct gl_fragment_program   *mesa_fp)
 199 {
 200     GLuint i, j;
 201     GLint * puiTEMPwrites;
 202     GLint * puiTEMPreads;
 203     struct prog_instruction * pILInst;
 204     InstDeps         *pInstDeps;
 205     struct prog_instruction * texcoord_DepInst;
 206     GLint              nDepInstID;
 207
 208     puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 209     puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 210
 211     for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
 212     {
 213         puiTEMPwrites[i] = -1;
 214         puiTEMPreads[i] = -1;
 215     }
 216
 217     pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
 218
 219     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 220     {
 221         pInstDeps[i].nDstDep = -1;
 222         pILInst = &(mesa_fp->Base.Instructions[i]);
 223
 224         //Dst
 225         if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
 226         {
 227             //Set lastwrite for the temp
 228             puiTEMPwrites[pILInst->DstReg.Index] = i;
 229         }
 230
 231         //Src
 232         for(j=0; j<3; j++)
 233         {
 234             if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
 235             {
 236                 //Set dep.
 237                 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
 238                 //Set first read
 239                 if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
 240                 {
 241                     puiTEMPreads[pILInst->SrcReg[j].Index] = i;
 242                 }
 243             }
 244             else
 245             {
 246                 pInstDeps[i].nSrcDeps[j] = -1;
 247             }
 248         }
 249     }
 250
 251     fp->r700AsmCode.pInstDeps = pInstDeps;
 252
 253     //Find dep for tex inst
 254     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 255     {
 256         pILInst = &(mesa_fp->Base.Instructions[i]);
 257
 258         if(GL_TRUE == IsTex(pILInst->Opcode))
 259         {   //src0 is the tex coord register, src1 is texunit, src2 is textype
 260             nDepInstID = pInstDeps[i].nSrcDeps[0];
 261             if(nDepInstID >= 0)
 262             {
 263                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 264                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 265                 {
 266                     pInstDeps[nDepInstID].nDstDep = i;
 267                     pInstDeps[i].nDstDep = i;
 268                 }
 269                 else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
 270                 {
 271                     pInstDeps[i].nDstDep = i;
 272                 }
 273                 else
 274                 {   //... other deps?
 275                 }
 276             }
 277             // make sure that we dont overwrite src used earlier
 278             nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
 279             if(nDepInstID < i)
 280             {
 281                 pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
 282                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 283                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 284                 {
 285                     pInstDeps[nDepInstID].nDstDep = i;
 286                 }
 287
 288             }
 289
 290         }
 291         }
 292
 293     FREE(puiTEMPwrites);
 294     FREE(puiTEMPreads);
 295
 296     return GL_TRUE;
 297 }
 298
 299 GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
 300                                                              struct gl_fragment_program   *mesa_fp,
 301                                  GLcontext *ctx)
 302 {
 303         GLuint    number_of_colors_exported;
 304         GLboolean z_enabled = GL_FALSE;
 305         GLuint    unBit;
 306
 307     //Init_Program
 308         Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
 309         Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
 310
 311     if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
 312         {
 313                 return GL_FALSE;
 314     }
 315
 316     InitShaderProgram(&(fp->r700AsmCode));
 317
 318         if( GL_FALSE == AssembleInstr(0,
 319                                   mesa_fp->Base.NumInstructions,
 320                                   &(mesa_fp->Base.Instructions[0]),
 321                                   &(fp->r700AsmCode)) )
 322         {
 323                 return GL_FALSE;
 324         }
 325
 326     if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
 327     {
 328         return GL_FALSE;
 329     }
 330
 331     if( GL_FALSE == RelocProgram(&(fp->r700AsmCode)) )
 332     {
 333         return GL_FALSE;
 334     }
 335
 336     fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
 337                          : (fp->r700AsmCode.number_used_registers - 1);
 338
 339         fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
 340
 341         number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
 342
 343         unBit = 1 << FRAG_RESULT_DEPTH;
 344         if(mesa_fp->Base.OutputsWritten & unBit)
 345         {
 346                 z_enabled = GL_TRUE;
 347                 number_of_colors_exported--;
 348         }
 349
 350         /* illegal to set this to 0 */
 351         if(number_of_colors_exported || z_enabled)
 352         {
 353             fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
 354         }
 355         else
 356         {
 357             fp->r700Shader.exportMode = (1 << 1);
 358         }
 359
 360     fp->translated = GL_TRUE;
 361
 362         return GL_TRUE;
 363 }
 364
 365 void r700SelectFragmentShader(GLcontext *ctx)
 366 {
 367     context_t *context = R700_CONTEXT(ctx);
 368     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 369             (ctx->FragmentProgram._Current);
 370     if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
 371     {
 372             fp->r700AsmCode.bR6xx = 1;
 373     }
 374
 375     if (GL_FALSE == fp->translated)
 376             r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
 377 }
 378
 379 void * r700GetActiveFpShaderBo(GLcontext * ctx)
 380 {
 381     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 382                                            (ctx->FragmentProgram._Current);
 383
 384     return fp->shaderbo;
 385 }
 386
 387 GLboolean r700SetupFragmentProgram(GLcontext * ctx)
 388 {
 389     context_t *context = R700_CONTEXT(ctx);
 390     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 391     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 392                                            (ctx->FragmentProgram._Current);
 393     r700_AssemblerBase         *pAsm = &(fp->r700AsmCode);
 394     struct gl_fragment_program *mesa_fp = &(fp->mesa_program);
 395     struct gl_program_parameter_list *paramList;
 396     unsigned int unNumParamData;
 397     unsigned int ui, i;
 398     unsigned int unNumOfReg;
 399     unsigned int unBit;
 400     GLuint exportCount;
 401
 402     if(GL_FALSE == fp->loaded)
 403     {
 404             if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
 405             {
 406                     Assemble( &(fp->r700Shader) );
 407             }
 408
 409         /* Load fp to gpu */
 410         r600EmitShader(ctx,
 411                        &(fp->shaderbo),
 412                        (GLvoid *)(fp->r700Shader.pProgram),
 413                        fp->r700Shader.uShaderBinaryDWORDSize,
 414                        "FS");
 415
 416         fp->loaded = GL_TRUE;
 417     }
 418
 419     DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
 420                  fp->r700Shader.uShaderBinaryDWORDSize);
 421
 422     /* TODO : enable this after MemUse fixed *=
 423     (context->chipobj.MemUse)(context, fp->shadercode.buf->id);
 424     */
 425
 426     R600_STATECHANGE(context, ps);
 427
 428     r700->ps.SQ_PGM_RESOURCES_PS.u32All = 0;
 429     SETbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
 430
 431     r700->ps.SQ_PGM_START_PS.u32All = 0; /* set from buffer obj */
 432
 433     R600_STATECHANGE(context, spi);
 434
 435     unNumOfReg = fp->r700Shader.nRegs + 1;
 436
 437     ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
 438
 439     /* PS uses fragment.position */
 440     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
 441     {
 442         ui += 1;
 443         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 444         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, CENTERS_ONLY, BARYC_SAMPLE_CNTL_shift, BARYC_SAMPLE_CNTL_mask);
 445         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 446         SETbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 447     }
 448     else
 449     {
 450         CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 451         CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 452     }
 453
 454     ui = (unNumOfReg < ui) ? ui : unNumOfReg;
 455
 456     SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
 457
 458     CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
 459
 460     if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
 461         {
 462         SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
 463                  STACK_SIZE_shift, STACK_SIZE_mask);
 464     }
 465
 466     SETfield(r700->ps.SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
 467              EXPORT_MODE_shift, EXPORT_MODE_mask);
 468
 469     // emit ps input map
 470     struct r700_vertex_program_cont *vpc =
 471                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 472     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 473     unBit = 1 << FRAG_ATTRIB_WPOS;
 474     if(mesa_fp->Base.InputsRead & unBit)
 475     {
 476             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS];
 477             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 478             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 479                      SEMANTIC_shift, SEMANTIC_mask);
 480             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 481                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 482             else
 483                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 484     }
 485
 486     unBit = 1 << VERT_RESULT_COL0;
 487     if(OutputsWritten & unBit)
 488     {
 489             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
 490             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 491             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 492                      SEMANTIC_shift, SEMANTIC_mask);
 493             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 494                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 495             else
 496                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 497     }
 498
 499     unBit = 1 << VERT_RESULT_COL1;
 500     if(OutputsWritten & unBit)
 501     {
 502             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
 503             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 504             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 505                      SEMANTIC_shift, SEMANTIC_mask);
 506             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 507                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 508             else
 509                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 510     }
 511
 512     unBit = 1 << VERT_RESULT_FOGC;
 513     if(OutputsWritten & unBit)
 514     {
 515             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
 516             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 517             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 518                      SEMANTIC_shift, SEMANTIC_mask);
 519             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 520                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 521             else
 522                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 523     }
 524
 525     for(i=0; i<8; i++)
 526     {
 527             unBit = 1 << (VERT_RESULT_TEX0 + i);
 528             if(OutputsWritten & unBit)
 529             {
 530                     ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
 531                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 532                     SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 533                              SEMANTIC_shift, SEMANTIC_mask);
 534                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 535             }
 536     }
 537
 538     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 539         {
 540         unBit = 1 << i;
 541         if(OutputsWritten & unBit)
 542                 {
 543             ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
 544             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 545             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 546                              SEMANTIC_shift, SEMANTIC_mask);
 547             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 548                         SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 549             else
 550                         CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 551         }
 552     }
 553
 554     exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
 555     if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
 556     {
 557             R600_STATECHANGE(context, cb);
 558             r700->CB_SHADER_CONTROL.u32All = (1 << exportCount) - 1;
 559     }
 560
 561     /* sent out shader constants. */
 562     paramList = fp->mesa_program.Base.Parameters;
 563
 564     if(NULL != paramList)
 565     {
 566             _mesa_load_state_parameters(ctx, paramList);
 567
 568             if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
 569                     return GL_FALSE;
 570
 571             R600_STATECHANGE(context, ps_consts);
 572
 573             r700->ps.num_consts = paramList->NumParameters;
 574
 575             unNumParamData = paramList->NumParameters;
 576
 577             for(ui=0; ui<unNumParamData; ui++) {
 578                         r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
 579                         r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
 580                         r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
 581                         r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
 582             }
 583     } else
 584             r700->ps.num_consts = 0;
 585
 586     return GL_TRUE;
 587 }
 588