2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
28 #ifndef _R700_SHADERINST_H_
29 #define _R700_SHADERINST_H_
31 #include "main/glheader.h"
33 #include "defaultendian.h"
34 #include "sq_micro_reg.h"
36 #define SQ_ALU_CONSTANT_PS_OFFSET 0x00000000
37 #define SQ_ALU_CONSTANT_PS_COUNT 0x00000100
38 #define SQ_ALU_CONSTANT_VS_OFFSET 0x00000100
39 #define SQ_ALU_CONSTANT_VS_COUNT 0x00000100
40 #define SQ_FETCH_RESOURCE_PS_OFFSET 0x00000000
41 #define SQ_FETCH_RESOURCE_PS_COUNT 0x000000a0
42 #define SQ_FETCH_RESOURCE_VS_OFFSET 0x000000a0
43 #define SQ_FETCH_RESOURCE_VS_COUNT 0x000000b0
45 #define SHADERINST_TYPEMASK_CF 0x10
46 #define SHADERINST_TYPEMASK_ALU 0x20
47 #define SHADERINST_TYPEMASK_TEX 0x40
48 #define SHADERINST_TYPEMASK_VTX 0x80
50 typedef enum ShaderInstType
52 SIT_CF
= 0x10, /*SIZE = 0x2*/
53 SIT_CF_ALL_EXP
= 0x14, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
54 SIT_CF_ALL_EXP_SX
= 0x15, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
55 SIT_CF_ALL_EXP_SMX
= 0x16, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x10;*/
56 SIT_CF_GENERIC
= 0x18, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x8; //For tex and vtx*/
57 SIT_CF_ALU
= 0x19, /*SIZE = 0x2, MAX_INSTRUCTIONS = 0x80;*/
58 SIT_ALU
= 0x20, /*SIZE = 0x2,*/
59 SIT_ALU_HALF_LIT
= 0x21, /*SIZE = 0x4,*/
60 SIT_ALU_FALL_LIT
= 0x22, /*SIZE = 0x6,*/
61 SIT_TEX
= 0x40, /*SIZE = 0x4,*/
62 SIT_VTX
= 0x80, /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
63 SIT_VTX_GENERIC
= 0x81, /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
64 SIT_VTX_SEM
= 0x82 /*SIZE = 0x4, MEGA_FETCH_BYTES = 0x20*/
67 typedef struct R700ShaderInstruction
69 ShaderInstType m_ShaderInstType
;
70 struct R700ShaderInstruction
*pNextInst
;
73 } R700ShaderInstruction
;
75 // ------------------ CF insts ---------------------------
77 typedef R700ShaderInstruction R700ControlFlowInstruction
;
79 typedef struct R700ControlFlowAllocExportClause
81 ShaderInstType m_ShaderInstType
;
82 R700ShaderInstruction
* pNextInst
;
86 sq_cf_alloc_export_word0_u m_Word0
;
87 sq_cf_alloc_export_word1_u m_Word1
;
88 } R700ControlFlowAllocExportClause
;
90 typedef struct R700ControlFlowSXClause
92 ShaderInstType m_ShaderInstType
;
93 R700ShaderInstruction
* pNextInst
;
94 //R700ControlFlowAllocExportClause
95 //R700ControlFlowInstruction
96 //R700ShaderInstruction
99 //---------------------
100 //---------------------------
101 sq_cf_alloc_export_word0_u m_Word0
;
102 sq_cf_alloc_export_word1_u m_Word1
;
103 //-------------------------------------
105 sq_cf_alloc_export_word1_swiz_u m_Word1_SWIZ
;
106 } R700ControlFlowSXClause
;
108 typedef struct R700ControlFlowSMXClause
110 ShaderInstType m_ShaderInstType
;
111 R700ShaderInstruction
* pNextInst
;
112 //R700ControlFlowAllocExportClause
113 //R700ControlFlowInstruction
114 //R700ShaderInstruction
117 //---------------------
118 //---------------------------
119 sq_cf_alloc_export_word0_u m_Word0
;
120 sq_cf_alloc_export_word1_u m_Word1
;
121 //-------------------------------
123 sq_cf_alloc_export_word1_buf_u m_Word1_BUF
;
124 } R700ControlFlowSMXClause
;
126 typedef struct R700ControlFlowGenericClause
128 ShaderInstType m_ShaderInstType
;
129 R700ShaderInstruction
* pNextInst
;
130 //R700ControlFlowInstruction
131 //R700ShaderInstruction
134 //---------------------
135 //---------------------
137 sq_cf_word0_u m_Word0
;
138 sq_cf_word1_u m_Word1
;
140 struct R700VertexInstruction
*m_pLinkedVTXInstruction
;
141 struct R700TextureInstruction
*m_pLinkedTEXInstruction
;
142 } R700ControlFlowGenericClause
;
144 typedef struct R700ControlFlowALUClause
146 ShaderInstType m_ShaderInstType
;
147 R700ShaderInstruction
* pNextInst
;
148 //R700ControlFlowInstruction
149 //R700ShaderInstruction
152 //---------------------
153 //---------------------
155 sq_cf_alu_word0_u m_Word0
;
156 sq_cf_alu_word1_u m_Word1
;
158 struct R700ALUInstruction
*m_pLinkedALUInstruction
;
159 } R700ControlFlowALUClause
;
161 // ------------------- End of CF Inst ------------------------
163 // ------------------- ALU Inst ------------------------------
164 typedef struct R700ALUInstruction
166 ShaderInstType m_ShaderInstType
;
167 R700ShaderInstruction
* pNextInst
;
168 //R700ShaderInstruction
171 //---------------------
173 sq_alu_word0_u m_Word0
;
174 sq_alu_word1_u m_Word1
;
175 sq_alu_word1_op2_v2_u m_Word1_OP2
;
176 sq_alu_word1_op3_u m_Word1_OP3
;
178 struct R700ControlFlowALUClause
*m_pLinkedALUClause
;
179 } R700ALUInstruction
;
181 typedef struct R700ALUInstructionHalfLiteral
183 ShaderInstType m_ShaderInstType
;
184 R700ShaderInstruction
* pNextInst
;
186 //R700ShaderInstruction
189 //---------------------
191 sq_alu_word0_u m_Word0
;
192 sq_alu_word1_u m_Word1
;
193 sq_alu_word1_op2_v2_u m_Word1_OP2
;
194 sq_alu_word1_op3_u m_Word1_OP3
;
196 struct R700ControlFlowALUClause
*m_pLinkedALUClause
;
197 //-------------------
201 } R700ALUInstructionHalfLiteral
;
203 typedef struct R700ALUInstructionFullLiteral
205 ShaderInstType m_ShaderInstType
;
206 R700ShaderInstruction
* pNextInst
;
208 //R700ShaderInstruction
211 //---------------------
213 sq_alu_word0_u m_Word0
;
214 sq_alu_word1_u m_Word1
;
215 sq_alu_word1_op2_v2_u m_Word1_OP2
;
216 sq_alu_word1_op3_u m_Word1_OP3
;
218 struct R700ControlFlowALUClause
*m_pLinkedALUClause
;
219 //-------------------
225 } R700ALUInstructionFullLiteral
;
226 // ------------------- End of ALU Inst -----------------------
228 // ------------------- Textuer/Vertex Instruction --------------------
230 typedef struct R700TextureInstruction
232 ShaderInstType m_ShaderInstType
;
233 R700ShaderInstruction
* pNextInst
;
234 //R700ShaderInstruction
237 //---------------------
239 sq_tex_word0_u m_Word0
;
240 sq_tex_word1_u m_Word1
;
241 sq_tex_word2_u m_Word2
;
243 struct R700ControlFlowGenericClause
*m_pLinkedGenericClause
;
244 } R700TextureInstruction
;
246 typedef struct R700VertexInstruction
248 ShaderInstType m_ShaderInstType
;
249 R700ShaderInstruction
* pNextInst
;
250 //R700ShaderInstruction
253 //---------------------
255 sq_vtx_word0_u m_Word0
;
256 sq_vtx_word1_u m_Word1
;
257 sq_vtx_word2_u m_Word2
;
259 struct R700ControlFlowGenericClause
*m_pLinkedGenericClause
;
260 } R700VertexInstruction
;
262 typedef struct R700VertexSemanticFetch
264 ShaderInstType m_ShaderInstType
;
265 R700ShaderInstruction
* pNextInst
;
266 //R700VertexInstruction
267 //R700ShaderInstruction
270 //---------------------
272 sq_vtx_word0_u m_Word0
;
273 sq_vtx_word1_u m_Word1
;
274 sq_vtx_word2_u m_Word2
;
276 struct R700ControlFlowGenericClause
*m_pLinkedGenericClause
;
277 //---------------------------
279 sq_vtx_word1_sem_u m_Word1_SEM
;
280 } R700VertexSemanticFetch
;
282 typedef struct R700VertexGenericFetch
284 ShaderInstType m_ShaderInstType
;
285 R700ShaderInstruction
* pNextInst
;
286 //R700VertexInstruction
287 //R700ShaderInstruction
290 //---------------------
292 sq_vtx_word0_u m_Word0
;
293 sq_vtx_word1_u m_Word1
;
294 sq_vtx_word2_u m_Word2
;
296 struct R700ControlFlowGenericClause
*m_pLinkedGenericClause
;
297 //---------------------------
299 sq_vtx_word1_gpr_u m_Word1_GPR
;
300 } R700VertexGenericFetch
;
302 // ------------------- End of Texture Vertex Instruction --------------------
304 void Init_R700ControlFlowGenericClause(R700ControlFlowGenericClause
* pInst
);
305 void Init_R700ControlFlowALUClause(R700ControlFlowALUClause
* pInst
);
306 void Init_R700ControlFlowSXClause(R700ControlFlowSXClause
* pInst
);
307 void Init_R700ControlFlowSMXClause(R700ControlFlowSMXClause
* pInst
);
308 void Init_R700ALUInstruction(R700ALUInstruction
* pInst
);
309 void Init_R700ALUInstructionHalfLiteral(R700ALUInstructionHalfLiteral
* pInst
, GLfloat x
, GLfloat y
);
310 void Init_R700ALUInstructionFullLiteral(R700ALUInstructionFullLiteral
* pInst
, GLfloat x
, GLfloat y
, GLfloat z
, GLfloat w
);
311 void Init_R700TextureInstruction(R700TextureInstruction
* pInst
);
312 void Init_R700VertexSemanticFetch(R700VertexSemanticFetch
* pInst
);
313 void Init_R700VertexGenericFetch(R700VertexGenericFetch
* pInst
);
315 unsigned int GetInstructionSize(ShaderInstType instType
);
316 unsigned int GetCFMaxInstructions(ShaderInstType instType
);
318 GLboolean
LinkVertexInstruction(R700ControlFlowGenericClause
*pCFGeneric
,
319 R700VertexInstruction
*pVTXInstruction
);
321 #endif //_R700_SHADERINST_H_