137f3007ced30372b359c65afaf081f72cc7c66c
[mesa.git] / src / mesa / drivers / dri / r600 / r700_vertprog.c
1 /*
2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21
22 /*
23 * Authors:
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
25 */
26
27
28 #include <stdio.h>
29 #include <stdarg.h>
30 #include <stdlib.h>
31 #include <string.h>
32 #include <math.h>
33
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 #include "tnl/t_context.h"
38 #include "program/program.h"
39 #include "program/prog_parameter.h"
40 #include "program/prog_statevars.h"
41
42 #include "radeon_debug.h"
43 #include "r600_context.h"
44 #include "r600_cmdbuf.h"
45 #include "r600_emit.h"
46 #include "program/programopt.h"
47
48 #include "r700_debug.h"
49 #include "r700_vertprog.h"
50
51 unsigned int Map_Vertex_Output(r700_AssemblerBase *pAsm,
52 struct gl_vertex_program *mesa_vp,
53 unsigned int unStart)
54 {
55 unsigned int i;
56 unsigned int unBit;
57 unsigned int unTotal = unStart;
58
59 //!!!!!!! THE ORDER MATCH FS INPUT
60
61 unBit = 1 << VERT_RESULT_HPOS;
62 if(mesa_vp->Base.OutputsWritten & unBit)
63 {
64 pAsm->ucVP_OutputMap[VERT_RESULT_HPOS] = unTotal++;
65 }
66
67 unBit = 1 << VERT_RESULT_COL0;
68 if(mesa_vp->Base.OutputsWritten & unBit)
69 {
70 pAsm->ucVP_OutputMap[VERT_RESULT_COL0] = unTotal++;
71 }
72
73 unBit = 1 << VERT_RESULT_COL1;
74 if(mesa_vp->Base.OutputsWritten & unBit)
75 {
76 pAsm->ucVP_OutputMap[VERT_RESULT_COL1] = unTotal++;
77 }
78
79 //TODO : dealing back face.
80 unBit = 1 << VERT_RESULT_BFC0;
81 if(mesa_vp->Base.OutputsWritten & unBit)
82 {
83 pAsm->ucVP_OutputMap[VERT_RESULT_BFC0] = unTotal++;
84 }
85
86 unBit = 1 << VERT_RESULT_BFC1;
87 if(mesa_vp->Base.OutputsWritten & unBit)
88 {
89 pAsm->ucVP_OutputMap[VERT_RESULT_BFC1] = unTotal++;
90 }
91
92 //TODO : dealing fog.
93 unBit = 1 << VERT_RESULT_FOGC;
94 if(mesa_vp->Base.OutputsWritten & unBit)
95 {
96 pAsm->ucVP_OutputMap[VERT_RESULT_FOGC] = unTotal++;
97 }
98
99 //TODO : dealing point size.
100 unBit = 1 << VERT_RESULT_PSIZ;
101 if(mesa_vp->Base.OutputsWritten & unBit)
102 {
103 pAsm->ucVP_OutputMap[VERT_RESULT_PSIZ] = unTotal++;
104 }
105
106 for(i=0; i<8; i++)
107 {
108 unBit = 1 << (VERT_RESULT_TEX0 + i);
109 if(mesa_vp->Base.OutputsWritten & unBit)
110 {
111 pAsm->ucVP_OutputMap[VERT_RESULT_TEX0 + i] = unTotal++;
112 }
113 }
114
115 for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
116 {
117 unBit = 1 << i;
118 if(mesa_vp->Base.OutputsWritten & unBit)
119 {
120 pAsm->ucVP_OutputMap[i] = unTotal++;
121 }
122 }
123
124 return (unTotal - unStart);
125 }
126
127 unsigned int Map_Vertex_Input(r700_AssemblerBase *pAsm,
128 struct gl_vertex_program *mesa_vp,
129 unsigned int unStart)
130 {
131 int i;
132 unsigned int unBit;
133 unsigned int unTotal = unStart;
134 for(i=0; i<VERT_ATTRIB_MAX; i++)
135 {
136 unBit = 1 << i;
137 if(mesa_vp->Base.InputsRead & unBit)
138 {
139 pAsm->ucVP_AttributeMap[i] = unTotal++;
140 }
141 }
142 return (unTotal - unStart);
143 }
144
145 GLboolean Process_Vertex_Program_Vfetch_Instructions(
146 struct r700_vertex_program *vp,
147 struct gl_vertex_program *mesa_vp)
148 {
149 int i;
150 unsigned int unBit;
151 VTX_FETCH_METHOD vtxFetchMethod;
152 vtxFetchMethod.bEnableMini = GL_FALSE;
153 vtxFetchMethod.mega_fetch_remainder = 0;
154
155 for(i=0; i<VERT_ATTRIB_MAX; i++)
156 {
157 unBit = 1 << i;
158 if(mesa_vp->Base.InputsRead & unBit)
159 {
160 assemble_vfetch_instruction(&vp->r700AsmCode,
161 i,
162 vp->r700AsmCode.ucVP_AttributeMap[i],
163 vp->aos_desc[i].size,
164 vp->aos_desc[i].type,
165 &vtxFetchMethod);
166 }
167 }
168
169 return GL_TRUE;
170 }
171
172 GLboolean Process_Vertex_Program_Vfetch_Instructions2(
173 GLcontext *ctx,
174 struct r700_vertex_program *vp,
175 struct gl_vertex_program *mesa_vp)
176 {
177 int i;
178 context_t *context = R700_CONTEXT(ctx);
179
180 VTX_FETCH_METHOD vtxFetchMethod;
181 vtxFetchMethod.bEnableMini = GL_FALSE;
182 vtxFetchMethod.mega_fetch_remainder = 0;
183
184 for(i=0; i<context->nNumActiveAos; i++)
185 {
186 assemble_vfetch_instruction2(&vp->r700AsmCode,
187 vp->r700AsmCode.ucVP_AttributeMap[context->stream_desc[i].element],
188 context->stream_desc[i].type,
189 context->stream_desc[i].size,
190 context->stream_desc[i].element,
191 context->stream_desc[i]._signed,
192 context->stream_desc[i].normalize,
193 context->stream_desc[i].format,
194 &vtxFetchMethod);
195 }
196
197 return GL_TRUE;
198 }
199
200 void Map_Vertex_Program(GLcontext *ctx,
201 struct r700_vertex_program *vp,
202 struct gl_vertex_program *mesa_vp)
203 {
204 GLuint ui;
205 r700_AssemblerBase *pAsm = &(vp->r700AsmCode);
206 unsigned int num_inputs;
207
208 // R0 will always be used for index into vertex buffer
209 pAsm->number_used_registers = 1;
210 pAsm->starting_vfetch_register_number = pAsm->number_used_registers;
211
212 // Map Inputs: Add 1 to mapping since R0 is used for index
213 num_inputs = Map_Vertex_Input(pAsm, mesa_vp, pAsm->number_used_registers);
214 pAsm->number_used_registers += num_inputs;
215
216 // Create VFETCH instructions for inputs
217 if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions2(ctx, vp, mesa_vp) )
218 {
219 radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions2 return error. \n");
220 return;
221 }
222
223 // Map Outputs
224 pAsm->number_of_exports = Map_Vertex_Output(pAsm, mesa_vp, pAsm->number_used_registers);
225
226 pAsm->starting_export_register_number = pAsm->number_used_registers;
227
228 pAsm->number_used_registers += pAsm->number_of_exports;
229
230 pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
231
232 for(ui=0; ui<pAsm->number_of_exports; ui++)
233 {
234 pAsm->pucOutMask[ui] = 0x0;
235 }
236
237 /* Map temporary registers (GPRs) */
238 pAsm->starting_temp_register_number = pAsm->number_used_registers;
239
240 if(mesa_vp->Base.NumNativeTemporaries >= mesa_vp->Base.NumTemporaries)
241 { /* arb uses NumNativeTemporaries */
242 pAsm->number_used_registers += mesa_vp->Base.NumNativeTemporaries;
243 }
244 else
245 { /* fix func t_vp uses NumTemporaries */
246 pAsm->number_used_registers += mesa_vp->Base.NumTemporaries;
247 }
248
249 pAsm->flag_reg_index = pAsm->number_used_registers++;
250
251 pAsm->uFirstHelpReg = pAsm->number_used_registers;
252 }
253
254 GLboolean Find_Instruction_Dependencies_vp(struct r700_vertex_program *vp,
255 struct gl_vertex_program *mesa_vp)
256 {
257 GLuint i, j;
258 GLint * puiTEMPwrites;
259 struct prog_instruction *pILInst;
260 InstDeps *pInstDeps;
261
262 puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_vp->Base.NumTemporaries);
263 for(i=0; i<mesa_vp->Base.NumTemporaries; i++)
264 {
265 puiTEMPwrites[i] = -1;
266 }
267
268 pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_vp->Base.NumInstructions);
269
270 for(i=0; i<mesa_vp->Base.NumInstructions; i++)
271 {
272 pInstDeps[i].nDstDep = -1;
273 pILInst = &(mesa_vp->Base.Instructions[i]);
274
275 //Dst
276 if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
277 {
278 //Set lastwrite for the temp
279 puiTEMPwrites[pILInst->DstReg.Index] = i;
280 }
281
282 //Src
283 for(j=0; j<3; j++)
284 {
285 if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
286 {
287 //Set dep.
288 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
289 }
290 else
291 {
292 pInstDeps[i].nSrcDeps[j] = -1;
293 }
294 }
295 }
296
297 vp->r700AsmCode.pInstDeps = pInstDeps;
298
299 FREE(puiTEMPwrites);
300
301 return GL_TRUE;
302 }
303
304 struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
305 struct gl_vertex_program *mesa_vp)
306 {
307 context_t *context = R700_CONTEXT(ctx);
308 struct r700_vertex_program *vp;
309 unsigned int i;
310
311 vp = calloc(1, sizeof(*vp));
312 vp->mesa_program = _mesa_clone_vertex_program(ctx, mesa_vp);
313
314 if (mesa_vp->IsPositionInvariant)
315 {
316 _mesa_insert_mvp_code(ctx, vp->mesa_program);
317 }
318
319 for(i=0; i<context->nNumActiveAos; i++)
320 {
321 vp->aos_desc[i].size = context->stream_desc[i].size;
322 vp->aos_desc[i].stride = context->stream_desc[i].stride;
323 vp->aos_desc[i].type = context->stream_desc[i].type;
324 vp->aos_desc[i].format = context->stream_desc[i].format;
325 }
326
327 if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
328 {
329 vp->r700AsmCode.bR6xx = 1;
330 }
331
332 //Init_Program
333 Init_r700_AssemblerBase(SPT_VP, &(vp->r700AsmCode), &(vp->r700Shader) );
334 Map_Vertex_Program(ctx, vp, vp->mesa_program );
335
336 if(GL_FALSE == Find_Instruction_Dependencies_vp(vp, vp->mesa_program))
337 {
338 return NULL;
339 }
340
341 InitShaderProgram(&(vp->r700AsmCode));
342
343 for(i=0; i < MAX_SAMPLERS; i++)
344 {
345 vp->r700AsmCode.SamplerUnits[i] = vp->mesa_program->Base.SamplerUnits[i];
346 }
347
348 vp->r700AsmCode.unCurNumILInsts = vp->mesa_program->Base.NumInstructions;
349
350 if(GL_FALSE == AssembleInstr(0,
351 0,
352 vp->mesa_program->Base.NumInstructions,
353 &(vp->mesa_program->Base.Instructions[0]),
354 &(vp->r700AsmCode)) )
355 {
356 return NULL;
357 }
358
359 if(GL_FALSE == Process_Vertex_Exports(&(vp->r700AsmCode), vp->mesa_program->Base.OutputsWritten) )
360 {
361 return NULL;
362 }
363
364 if( GL_FALSE == RelocProgram(&(vp->r700AsmCode), &(vp->mesa_program->Base)) )
365 {
366 return GL_FALSE;
367 }
368
369 vp->r700Shader.nRegs = (vp->r700AsmCode.number_used_registers == 0) ? 0
370 : (vp->r700AsmCode.number_used_registers - 1);
371
372 vp->r700Shader.nParamExports = vp->r700AsmCode.number_of_exports;
373
374 vp->translated = GL_TRUE;
375
376 return vp;
377 }
378
379 void r700SelectVertexShader(GLcontext *ctx)
380 {
381 context_t *context = R700_CONTEXT(ctx);
382 struct r700_vertex_program_cont *vpc;
383 struct r700_vertex_program *vp;
384 unsigned int i;
385 GLboolean match;
386 GLbitfield InputsRead;
387
388 vpc = (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
389
390 InputsRead = vpc->mesa_program.Base.InputsRead;
391 if (vpc->mesa_program.IsPositionInvariant)
392 {
393 InputsRead |= VERT_BIT_POS;
394 }
395
396 for (vp = vpc->progs; vp; vp = vp->next)
397 {
398 match = GL_TRUE;
399 for(i=0; i<context->nNumActiveAos; i++)
400 {
401 if (vp->aos_desc[i].size != context->stream_desc[i].size ||
402 vp->aos_desc[i].format != context->stream_desc[i].format)
403 {
404 match = GL_FALSE;
405 break;
406 }
407 }
408 if (match)
409 {
410 context->selected_vp = vp;
411 return;
412 }
413 }
414
415 vp = r700TranslateVertexShader(ctx, &(vpc->mesa_program));
416 if(!vp)
417 {
418 radeon_error("Failed to translate vertex shader. \n");
419 return;
420 }
421 vp->next = vpc->progs;
422 vpc->progs = vp;
423 context->selected_vp = vp;
424 return;
425 }
426
427 int getTypeSize(GLenum type)
428 {
429 switch (type)
430 {
431 case GL_DOUBLE:
432 return sizeof(GLdouble);
433 case GL_FLOAT:
434 return sizeof(GLfloat);
435 case GL_INT:
436 return sizeof(GLint);
437 case GL_UNSIGNED_INT:
438 return sizeof(GLuint);
439 case GL_SHORT:
440 return sizeof(GLshort);
441 case GL_UNSIGNED_SHORT:
442 return sizeof(GLushort);
443 case GL_BYTE:
444 return sizeof(GLbyte);
445 case GL_UNSIGNED_BYTE:
446 return sizeof(GLubyte);
447 default:
448 assert(0);
449 return 0;
450 }
451 }
452
453 static void r700TranslateAttrib(GLcontext *ctx, GLuint unLoc, int count, const struct gl_client_array *input)
454 {
455 context_t *context = R700_CONTEXT(ctx);
456
457 StreamDesc * pStreamDesc = &(context->stream_desc[context->nNumActiveAos]);
458
459 GLuint stride;
460
461 stride = (input->StrideB == 0) ? getTypeSize(input->Type) * input->Size
462 : input->StrideB;
463
464 if (input->Type == GL_DOUBLE || input->Type == GL_UNSIGNED_INT || input->Type == GL_INT ||
465 #if MESA_BIG_ENDIAN
466 getTypeSize(input->Type) != 4 ||
467 #endif
468 stride < 4)
469 {
470 pStreamDesc->type = GL_FLOAT;
471
472 if (input->StrideB == 0)
473 {
474 pStreamDesc->stride = 0;
475 }
476 else
477 {
478 pStreamDesc->stride = sizeof(GLfloat) * input->Size;
479 }
480 pStreamDesc->dwords = input->Size;
481 pStreamDesc->is_named_bo = GL_FALSE;
482 }
483 else
484 {
485 pStreamDesc->type = input->Type;
486 pStreamDesc->dwords = (getTypeSize(input->Type) * input->Size + 3)/ 4;
487 if (!input->BufferObj->Name)
488 {
489 if (input->StrideB == 0)
490 {
491 pStreamDesc->stride = 0;
492 }
493 else
494 {
495 pStreamDesc->stride = (getTypeSize(pStreamDesc->type) * input->Size + 3) & ~3;
496 }
497
498 pStreamDesc->is_named_bo = GL_FALSE;
499 }
500 }
501
502 pStreamDesc->size = input->Size;
503 pStreamDesc->dst_loc = context->nNumActiveAos;
504 pStreamDesc->element = unLoc;
505 pStreamDesc->format = input->Format;
506
507 switch (pStreamDesc->type)
508 { //GetSurfaceFormat
509 case GL_FLOAT:
510 pStreamDesc->_signed = 0;
511 pStreamDesc->normalize = GL_FALSE;
512 break;
513 case GL_SHORT:
514 pStreamDesc->_signed = 1;
515 pStreamDesc->normalize = input->Normalized;
516 break;
517 case GL_BYTE:
518 pStreamDesc->_signed = 1;
519 pStreamDesc->normalize = input->Normalized;
520 break;
521 case GL_UNSIGNED_SHORT:
522 pStreamDesc->_signed = 0;
523 pStreamDesc->normalize = input->Normalized;
524 break;
525 case GL_UNSIGNED_BYTE:
526 pStreamDesc->_signed = 0;
527 pStreamDesc->normalize = input->Normalized;
528 break;
529 default:
530 case GL_INT:
531 case GL_UNSIGNED_INT:
532 case GL_DOUBLE:
533 assert(0);
534 break;
535 }
536 context->nNumActiveAos++;
537 }
538
539 void r700SetVertexFormat(GLcontext *ctx, const struct gl_client_array *arrays[], int count)
540 {
541 context_t *context = R700_CONTEXT(ctx);
542 struct r700_vertex_program *vpc
543 = (struct r700_vertex_program *)ctx->VertexProgram._Current;
544
545 struct gl_vertex_program * mesa_vp = (struct gl_vertex_program *)&(vpc->mesa_program);
546 unsigned int unLoc = 0;
547 unsigned int unBit = mesa_vp->Base.InputsRead;
548 context->nNumActiveAos = 0;
549
550 if (mesa_vp->IsPositionInvariant)
551 {
552 unBit |= VERT_BIT_POS;
553 }
554
555 while(unBit)
556 {
557 if(unBit & 1)
558 {
559 r700TranslateAttrib(ctx, unLoc, count, arrays[unLoc]);
560 }
561
562 unBit >>= 1;
563 ++unLoc;
564 }
565 context->radeon.tcl.aos_count = context->nNumActiveAos;
566 }
567
568 void * r700GetActiveVpShaderBo(GLcontext * ctx)
569 {
570 context_t *context = R700_CONTEXT(ctx);
571 struct r700_vertex_program *vp = context->selected_vp;;
572
573 if (vp)
574 return vp->shaderbo;
575 else
576 return NULL;
577 }
578
579 GLboolean r700SetupVertexProgram(GLcontext * ctx)
580 {
581 context_t *context = R700_CONTEXT(ctx);
582 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
583 struct r700_vertex_program *vp = context->selected_vp;
584
585 struct gl_program_parameter_list *paramList;
586 unsigned int unNumParamData;
587 unsigned int ui;
588
589 if(GL_FALSE == vp->loaded)
590 {
591 if(vp->r700Shader.bNeedsAssembly == GL_TRUE)
592 {
593 Assemble( &(vp->r700Shader) );
594 }
595
596 /* Load vp to gpu */
597 r600EmitShader(ctx,
598 &(vp->shaderbo),
599 (GLvoid *)(vp->r700Shader.pProgram),
600 vp->r700Shader.uShaderBinaryDWORDSize,
601 "VS");
602
603 vp->loaded = GL_TRUE;
604 }
605
606 DumpHwBinary(DUMP_VERTEX_SHADER, (GLvoid *)(vp->r700Shader.pProgram),
607 vp->r700Shader.uShaderBinaryDWORDSize);
608
609 /* TODO : enable this after MemUse fixed *=
610 (context->chipobj.MemUse)(context, vp->shadercode.buf->id);
611 */
612
613 R600_STATECHANGE(context, vs);
614 R600_STATECHANGE(context, fs); /* hack */
615
616 r700->vs.SQ_PGM_RESOURCES_VS.u32All = 0;
617 SETbit(r700->vs.SQ_PGM_RESOURCES_VS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
618
619 r700->vs.SQ_PGM_START_VS.u32All = 0; /* set from buffer object. */
620
621 SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.nRegs + 1,
622 NUM_GPRS_shift, NUM_GPRS_mask);
623
624 if(vp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
625 {
626 SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.uStackSize,
627 STACK_SIZE_shift, STACK_SIZE_mask);
628 }
629
630 R600_STATECHANGE(context, spi);
631
632 if(vp->mesa_program->Base.OutputsWritten & (1 << VERT_RESULT_PSIZ)) {
633 R600_STATECHANGE(context, cl);
634 SETbit(r700->PA_CL_VS_OUT_CNTL.u32All, USE_VTX_POINT_SIZE_bit);
635 SETbit(r700->PA_CL_VS_OUT_CNTL.u32All, VS_OUT_MISC_VEC_ENA_bit);
636 } else if (r700->PA_CL_VS_OUT_CNTL.u32All != 0) {
637 R600_STATECHANGE(context, cl);
638 CLEARbit(r700->PA_CL_VS_OUT_CNTL.u32All, USE_VTX_POINT_SIZE_bit);
639 CLEARbit(r700->PA_CL_VS_OUT_CNTL.u32All, VS_OUT_MISC_VEC_ENA_bit);
640 }
641
642 SETfield(r700->SPI_VS_OUT_CONFIG.u32All,
643 vp->r700Shader.nParamExports ? (vp->r700Shader.nParamExports - 1) : 0,
644 VS_EXPORT_COUNT_shift, VS_EXPORT_COUNT_mask);
645 SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, vp->r700Shader.nParamExports,
646 NUM_INTERP_shift, NUM_INTERP_mask);
647
648 /*
649 SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
650 CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
651 */
652
653 /* sent out shader constants. */
654 paramList = vp->mesa_program->Base.Parameters;
655
656 if(NULL != paramList) {
657 /* vp->mesa_program was cloned, not updated by glsl shader api. */
658 /* _mesa_reference_program has already checked glsl shProg is ok and set ctx->VertexProgem._Current */
659 /* so, use ctx->VertexProgem._Current */
660 struct gl_program_parameter_list *paramListOrginal =
661 ctx->VertexProgram._Current->Base.Parameters;
662
663 _mesa_load_state_parameters(ctx, paramList);
664
665 if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
666 return GL_FALSE;
667
668 R600_STATECHANGE(context, vs_consts);
669
670 r700->vs.num_consts = paramList->NumParameters;
671
672 unNumParamData = paramList->NumParameters;
673
674 for(ui=0; ui<unNumParamData; ui++) {
675 if(paramList->Parameters[ui].Type == PROGRAM_UNIFORM)
676 {
677 r700->vs.consts[ui][0].f32All = paramListOrginal->ParameterValues[ui][0];
678 r700->vs.consts[ui][1].f32All = paramListOrginal->ParameterValues[ui][1];
679 r700->vs.consts[ui][2].f32All = paramListOrginal->ParameterValues[ui][2];
680 r700->vs.consts[ui][3].f32All = paramListOrginal->ParameterValues[ui][3];
681 }
682 else
683 {
684 r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
685 r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
686 r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
687 r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
688 }
689 }
690 } else
691 r700->vs.num_consts = 0;
692
693 COMPILED_SUB * pCompiledSub;
694 GLuint uj;
695 GLuint unConstOffset = r700->vs.num_consts;
696 for(ui=0; ui<vp->r700AsmCode.unNumPresub; ui++)
697 {
698 pCompiledSub = vp->r700AsmCode.presubs[ui].pCompiledSub;
699
700 r700->vs.num_consts += pCompiledSub->NumParameters;
701
702 for(uj=0; uj<pCompiledSub->NumParameters; uj++)
703 {
704 r700->vs.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0];
705 r700->vs.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1];
706 r700->vs.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2];
707 r700->vs.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3];
708 }
709 unConstOffset += pCompiledSub->NumParameters;
710 }
711
712 return GL_TRUE;
713 }