r600: fix render size prediction
[mesa.git] / src / mesa / drivers / dri / r600 / r700_vertprog.c
1 /*
2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21
22 /*
23 * Authors:
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
25 */
26
27
28 #include <stdio.h>
29 #include <stdarg.h>
30 #include <stdlib.h>
31 #include <string.h>
32 #include <math.h>
33
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 #include "tnl/t_context.h"
38 #include "shader/program.h"
39 #include "shader/prog_parameter.h"
40 #include "shader/prog_statevars.h"
41
42 #include "radeon_debug.h"
43 #include "r600_context.h"
44 #include "r600_cmdbuf.h"
45 #include "shader/programopt.c"
46
47 #include "r700_debug.h"
48 #include "r700_vertprog.h"
49
50 unsigned int Map_Vertex_Output(r700_AssemblerBase *pAsm,
51 struct gl_vertex_program *mesa_vp,
52 unsigned int unStart)
53 {
54 unsigned int i;
55 unsigned int unBit;
56 unsigned int unTotal = unStart;
57
58 //!!!!!!! THE ORDER MATCH FS INPUT
59
60 unBit = 1 << VERT_RESULT_HPOS;
61 if(mesa_vp->Base.OutputsWritten & unBit)
62 {
63 pAsm->ucVP_OutputMap[VERT_RESULT_HPOS] = unTotal++;
64 }
65
66 unBit = 1 << VERT_RESULT_COL0;
67 if(mesa_vp->Base.OutputsWritten & unBit)
68 {
69 pAsm->ucVP_OutputMap[VERT_RESULT_COL0] = unTotal++;
70 }
71
72 unBit = 1 << VERT_RESULT_COL1;
73 if(mesa_vp->Base.OutputsWritten & unBit)
74 {
75 pAsm->ucVP_OutputMap[VERT_RESULT_COL1] = unTotal++;
76 }
77
78 //TODO : dealing back face.
79 unBit = 1 << VERT_RESULT_BFC0;
80 if(mesa_vp->Base.OutputsWritten & unBit)
81 {
82 pAsm->ucVP_OutputMap[VERT_RESULT_BFC0] = unTotal++;
83 }
84
85 unBit = 1 << VERT_RESULT_BFC1;
86 if(mesa_vp->Base.OutputsWritten & unBit)
87 {
88 pAsm->ucVP_OutputMap[VERT_RESULT_BFC1] = unTotal++;
89 }
90
91 //TODO : dealing fog.
92 unBit = 1 << VERT_RESULT_FOGC;
93 if(mesa_vp->Base.OutputsWritten & unBit)
94 {
95 pAsm->ucVP_OutputMap[VERT_RESULT_FOGC] = unTotal++;
96 }
97
98 //TODO : dealing point size.
99 unBit = 1 << VERT_RESULT_PSIZ;
100 if(mesa_vp->Base.OutputsWritten & unBit)
101 {
102 pAsm->ucVP_OutputMap[VERT_RESULT_PSIZ] = unTotal++;
103 }
104
105 for(i=0; i<8; i++)
106 {
107 unBit = 1 << (VERT_RESULT_TEX0 + i);
108 if(mesa_vp->Base.OutputsWritten & unBit)
109 {
110 pAsm->ucVP_OutputMap[VERT_RESULT_TEX0 + i] = unTotal++;
111 }
112 }
113
114 return (unTotal - unStart);
115 }
116
117 unsigned int Map_Vertex_Input(r700_AssemblerBase *pAsm,
118 struct gl_vertex_program *mesa_vp,
119 unsigned int unStart)
120 {
121 int i;
122 unsigned int unBit;
123 unsigned int unTotal = unStart;
124 for(i=0; i<VERT_ATTRIB_MAX; i++)
125 {
126 unBit = 1 << i;
127 if(mesa_vp->Base.InputsRead & unBit)
128 {
129 pAsm->ucVP_AttributeMap[i] = unTotal++;
130 }
131 }
132 return (unTotal - unStart);
133 }
134
135 GLboolean Process_Vertex_Program_Vfetch_Instructions(
136 struct r700_vertex_program *vp,
137 struct gl_vertex_program *mesa_vp)
138 {
139 int i;
140 unsigned int unBit;
141 VTX_FETCH_METHOD vtxFetchMethod;
142 vtxFetchMethod.bEnableMini = GL_FALSE;
143 vtxFetchMethod.mega_fetch_remainder = 0;
144
145 for(i=0; i<VERT_ATTRIB_MAX; i++)
146 {
147 unBit = 1 << i;
148 if(mesa_vp->Base.InputsRead & unBit)
149 {
150 assemble_vfetch_instruction(&vp->r700AsmCode,
151 i,
152 vp->r700AsmCode.ucVP_AttributeMap[i],
153 vp->aos_desc[i].size,
154 vp->aos_desc[i].type,
155 &vtxFetchMethod);
156 }
157 }
158
159 return GL_TRUE;
160 }
161
162 GLboolean Process_Vertex_Program_Vfetch_Instructions2(
163 GLcontext *ctx,
164 struct r700_vertex_program *vp,
165 struct gl_vertex_program *mesa_vp)
166 {
167 int i;
168 context_t *context = R700_CONTEXT(ctx);
169
170 VTX_FETCH_METHOD vtxFetchMethod;
171 vtxFetchMethod.bEnableMini = GL_FALSE;
172 vtxFetchMethod.mega_fetch_remainder = 0;
173
174 for(i=0; i<context->nNumActiveAos; i++)
175 {
176 assemble_vfetch_instruction2(&vp->r700AsmCode,
177 vp->r700AsmCode.ucVP_AttributeMap[context->stream_desc[i].element],
178 context->stream_desc[i].type,
179 context->stream_desc[i].size,
180 context->stream_desc[i].element,
181 context->stream_desc[i]._signed,
182 context->stream_desc[i].normalize,
183 &vtxFetchMethod);
184 }
185
186 return GL_TRUE;
187 }
188
189 void Map_Vertex_Program(GLcontext *ctx,
190 struct r700_vertex_program *vp,
191 struct gl_vertex_program *mesa_vp)
192 {
193 GLuint ui;
194 r700_AssemblerBase *pAsm = &(vp->r700AsmCode);
195 unsigned int num_inputs;
196
197 // R0 will always be used for index into vertex buffer
198 pAsm->number_used_registers = 1;
199 pAsm->starting_vfetch_register_number = pAsm->number_used_registers;
200
201 // Map Inputs: Add 1 to mapping since R0 is used for index
202 num_inputs = Map_Vertex_Input(pAsm, mesa_vp, pAsm->number_used_registers);
203 pAsm->number_used_registers += num_inputs;
204
205 // Create VFETCH instructions for inputs
206 if(1 == vp->uiVersion)
207 {
208 if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions(vp, mesa_vp) )
209 {
210 radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions return error. \n");
211 return;
212 }
213 }
214 else
215 {
216 if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions2(ctx, vp, mesa_vp) )
217 {
218 radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions2 return error. \n");
219 return;
220 }
221 }
222
223 // Map Outputs
224 pAsm->number_of_exports = Map_Vertex_Output(pAsm, mesa_vp, pAsm->number_used_registers);
225
226 pAsm->starting_export_register_number = pAsm->number_used_registers;
227
228 pAsm->number_used_registers += pAsm->number_of_exports;
229
230 pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
231
232 for(ui=0; ui<pAsm->number_of_exports; ui++)
233 {
234 pAsm->pucOutMask[ui] = 0x0;
235 }
236
237 /* Map temporary registers (GPRs) */
238 pAsm->starting_temp_register_number = pAsm->number_used_registers;
239
240 if(mesa_vp->Base.NumNativeTemporaries >= mesa_vp->Base.NumTemporaries)
241 { /* arb uses NumNativeTemporaries */
242 pAsm->number_used_registers += mesa_vp->Base.NumNativeTemporaries;
243 }
244 else
245 { /* fix func t_vp uses NumTemporaries */
246 pAsm->number_used_registers += mesa_vp->Base.NumTemporaries;
247 }
248
249 pAsm->uFirstHelpReg = pAsm->number_used_registers;
250 }
251
252 GLboolean Find_Instruction_Dependencies_vp(struct r700_vertex_program *vp,
253 struct gl_vertex_program *mesa_vp)
254 {
255 GLuint i, j;
256 GLint * puiTEMPwrites;
257 struct prog_instruction *pILInst;
258 InstDeps *pInstDeps;
259
260 puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_vp->Base.NumTemporaries);
261 for(i=0; i<mesa_vp->Base.NumTemporaries; i++)
262 {
263 puiTEMPwrites[i] = -1;
264 }
265
266 pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_vp->Base.NumInstructions);
267
268 for(i=0; i<mesa_vp->Base.NumInstructions; i++)
269 {
270 pInstDeps[i].nDstDep = -1;
271 pILInst = &(mesa_vp->Base.Instructions[i]);
272
273 //Dst
274 if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
275 {
276 //Set lastwrite for the temp
277 puiTEMPwrites[pILInst->DstReg.Index] = i;
278 }
279
280 //Src
281 for(j=0; j<3; j++)
282 {
283 if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
284 {
285 //Set dep.
286 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
287 }
288 else
289 {
290 pInstDeps[i].nSrcDeps[j] = -1;
291 }
292 }
293 }
294
295 vp->r700AsmCode.pInstDeps = pInstDeps;
296
297 FREE(puiTEMPwrites);
298
299 return GL_TRUE;
300 }
301
302 struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
303 struct gl_vertex_program *mesa_vp,
304 GLint nVer)
305 {
306 context_t *context = R700_CONTEXT(ctx);
307 struct r700_vertex_program *vp;
308 TNLcontext *tnl = TNL_CONTEXT(ctx);
309 struct vertex_buffer *vb = &tnl->vb;
310 unsigned int unBit;
311 unsigned int i;
312
313 vp = _mesa_calloc(sizeof(*vp));
314 vp->uiVersion = nVer;
315 vp->mesa_program = (struct gl_vertex_program *)_mesa_clone_program(ctx, &mesa_vp->Base);
316
317 if (mesa_vp->IsPositionInvariant)
318 {
319 _mesa_insert_mvp_code(ctx, vp->mesa_program);
320 }
321
322 if( 1 == nVer )
323 {
324 for(i=0; i<VERT_ATTRIB_MAX; i++)
325 {
326 unBit = 1 << i;
327 if(vp->mesa_program->Base.InputsRead & unBit) /* ctx->Array.ArrayObj->xxxxxxx */
328 {
329 vp->aos_desc[i].size = vb->AttribPtr[i]->size;
330 vp->aos_desc[i].stride = vb->AttribPtr[i]->size * sizeof(GL_FLOAT);/* when emit array, data is packed. vb->AttribPtr[i]->stride;*/
331 vp->aos_desc[i].type = GL_FLOAT;
332 }
333 }
334 }
335 else
336 {
337 for(i=0; i<context->nNumActiveAos; i++)
338 {
339 vp->aos_desc[i].size = context->stream_desc[i].size;
340 vp->aos_desc[i].stride = context->stream_desc[i].stride;
341 vp->aos_desc[i].type = context->stream_desc[i].type;
342 }
343 }
344
345 if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
346 {
347 vp->r700AsmCode.bR6xx = 1;
348 }
349
350 //Init_Program
351 Init_r700_AssemblerBase(SPT_VP, &(vp->r700AsmCode), &(vp->r700Shader) );
352 Map_Vertex_Program(ctx, vp, vp->mesa_program );
353
354 if(GL_FALSE == Find_Instruction_Dependencies_vp(vp, vp->mesa_program))
355 {
356 return NULL;
357 }
358
359 if(GL_FALSE == AssembleInstr(vp->mesa_program->Base.NumInstructions,
360 &(vp->mesa_program->Base.Instructions[0]),
361 &(vp->r700AsmCode)) )
362 {
363 return NULL;
364 }
365
366 if(GL_FALSE == Process_Vertex_Exports(&(vp->r700AsmCode), vp->mesa_program->Base.OutputsWritten) )
367 {
368 return NULL;
369 }
370
371 vp->r700Shader.nRegs = (vp->r700AsmCode.number_used_registers == 0) ? 0
372 : (vp->r700AsmCode.number_used_registers - 1);
373
374 vp->r700Shader.nParamExports = vp->r700AsmCode.number_of_exports;
375
376 vp->translated = GL_TRUE;
377
378 return vp;
379 }
380
381 void r700SelectVertexShader(GLcontext *ctx, GLint nVersion)
382 {
383 context_t *context = R700_CONTEXT(ctx);
384 struct r700_vertex_program_cont *vpc;
385 struct r700_vertex_program *vp;
386 TNLcontext *tnl = TNL_CONTEXT(ctx);
387 struct vertex_buffer *vb = &tnl->vb;
388 unsigned int unBit;
389 unsigned int i;
390 GLboolean match;
391 GLbitfield InputsRead;
392
393 vpc = (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
394
395 InputsRead = vpc->mesa_program.Base.InputsRead;
396 if (vpc->mesa_program.IsPositionInvariant)
397 {
398 InputsRead |= VERT_BIT_POS;
399 }
400
401 for (vp = vpc->progs; vp; vp = vp->next)
402 {
403 if (vp->uiVersion != nVersion )
404 continue;
405 match = GL_TRUE;
406 if ( 1 == nVersion )
407 {
408 for(i=0; i<VERT_ATTRIB_MAX; i++)
409 {
410 unBit = 1 << i;
411 if(InputsRead & unBit)
412 {
413 if (vp->aos_desc[i].size != vb->AttribPtr[i]->size)
414 {
415 match = GL_FALSE;
416 break;
417 }
418 }
419 }
420 }
421 else
422 {
423 for(i=0; i<context->nNumActiveAos; i++)
424 {
425 if (vp->aos_desc[i].size != context->stream_desc[i].size)
426 {
427 match = GL_FALSE;
428 break;
429 }
430 }
431 }
432 if (match)
433 {
434 context->selected_vp = vp;
435 return;
436 }
437 }
438
439 vp = r700TranslateVertexShader(ctx, &(vpc->mesa_program), nVersion);
440 if(!vp)
441 {
442 radeon_error("Failed to translate vertex shader. \n");
443 return;
444 }
445 vp->next = vpc->progs;
446 vpc->progs = vp;
447 context->selected_vp = vp;
448 return;
449 }
450
451 int getTypeSize(GLenum type)
452 {
453 switch (type)
454 {
455 case GL_DOUBLE:
456 return sizeof(GLdouble);
457 case GL_FLOAT:
458 return sizeof(GLfloat);
459 case GL_INT:
460 return sizeof(GLint);
461 case GL_UNSIGNED_INT:
462 return sizeof(GLuint);
463 case GL_SHORT:
464 return sizeof(GLshort);
465 case GL_UNSIGNED_SHORT:
466 return sizeof(GLushort);
467 case GL_BYTE:
468 return sizeof(GLbyte);
469 case GL_UNSIGNED_BYTE:
470 return sizeof(GLubyte);
471 default:
472 assert(0);
473 return 0;
474 }
475 }
476
477 static void r700TranslateAttrib(GLcontext *ctx, GLuint unLoc, int count, const struct gl_client_array *input)
478 {
479 context_t *context = R700_CONTEXT(ctx);
480
481 StreamDesc * pStreamDesc = &(context->stream_desc[context->nNumActiveAos]);
482
483 GLuint stride;
484
485 stride = (input->StrideB == 0) ? getTypeSize(input->Type) * input->Size
486 : input->StrideB;
487
488 if (input->Type == GL_DOUBLE || input->Type == GL_UNSIGNED_INT || input->Type == GL_INT ||
489 #if MESA_BIG_ENDIAN
490 getTypeSize(input->Type) != 4 ||
491 #endif
492 stride < 4)
493 {
494 pStreamDesc->type = GL_FLOAT;
495
496 if (input->StrideB == 0)
497 {
498 pStreamDesc->stride = 0;
499 }
500 else
501 {
502 pStreamDesc->stride = sizeof(GLfloat) * input->Size;
503 }
504 pStreamDesc->dwords = input->Size;
505 pStreamDesc->is_named_bo = GL_FALSE;
506 }
507 else
508 {
509 pStreamDesc->type = input->Type;
510 pStreamDesc->dwords = (getTypeSize(input->Type) * input->Size + 3)/ 4;
511 if (!input->BufferObj->Name)
512 {
513 if (input->StrideB == 0)
514 {
515 pStreamDesc->stride = 0;
516 }
517 else
518 {
519 pStreamDesc->stride = (getTypeSize(pStreamDesc->type) * input->Size + 3) & ~3;
520 }
521
522 pStreamDesc->is_named_bo = GL_FALSE;
523 }
524 }
525
526 pStreamDesc->size = input->Size;
527 pStreamDesc->dst_loc = context->nNumActiveAos;
528 pStreamDesc->element = unLoc;
529
530 switch (pStreamDesc->type)
531 { //GetSurfaceFormat
532 case GL_FLOAT:
533 pStreamDesc->_signed = 0;
534 pStreamDesc->normalize = GL_FALSE;
535 break;
536 case GL_SHORT:
537 pStreamDesc->_signed = 1;
538 pStreamDesc->normalize = input->Normalized;
539 break;
540 case GL_BYTE:
541 pStreamDesc->_signed = 1;
542 pStreamDesc->normalize = input->Normalized;
543 break;
544 case GL_UNSIGNED_SHORT:
545 pStreamDesc->_signed = 0;
546 pStreamDesc->normalize = input->Normalized;
547 break;
548 case GL_UNSIGNED_BYTE:
549 pStreamDesc->_signed = 0;
550 pStreamDesc->normalize = input->Normalized;
551 break;
552 default:
553 case GL_INT:
554 case GL_UNSIGNED_INT:
555 case GL_DOUBLE:
556 assert(0);
557 break;
558 }
559 context->nNumActiveAos++;
560 }
561
562 void r700SetVertexFormat(GLcontext *ctx, const struct gl_client_array *arrays[], int count)
563 {
564 context_t *context = R700_CONTEXT(ctx);
565 struct r700_vertex_program *vpc
566 = (struct r700_vertex_program *)ctx->VertexProgram._Current;
567
568 struct gl_vertex_program * mesa_vp = (struct gl_vertex_program *)&(vpc->mesa_program);
569 unsigned int unLoc = 0;
570 unsigned int unBit = mesa_vp->Base.InputsRead;
571 context->nNumActiveAos = 0;
572
573 while(unBit)
574 {
575 if(unBit & 1)
576 {
577 r700TranslateAttrib(ctx, unLoc, count, arrays[unLoc]);
578 }
579
580 unBit >>= 1;
581 ++unLoc;
582 }
583 context->radeon.tcl.aos_count = context->nNumActiveAos;
584 }
585
586 void * r700GetActiveVpShaderBo(GLcontext * ctx)
587 {
588 context_t *context = R700_CONTEXT(ctx);
589 struct r700_vertex_program *vp = context->selected_vp;;
590
591 if (vp)
592 return vp->shaderbo;
593 else
594 return NULL;
595 }
596
597 GLboolean r700SetupVertexProgram(GLcontext * ctx)
598 {
599 context_t *context = R700_CONTEXT(ctx);
600 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
601 struct r700_vertex_program *vp = context->selected_vp;
602
603 struct gl_program_parameter_list *paramList;
604 unsigned int unNumParamData;
605 unsigned int ui;
606
607 if(GL_FALSE == vp->loaded)
608 {
609 if(vp->r700Shader.bNeedsAssembly == GL_TRUE)
610 {
611 Assemble( &(vp->r700Shader) );
612 }
613
614 /* Load vp to gpu */
615 r600EmitShader(ctx,
616 &(vp->shaderbo),
617 (GLvoid *)(vp->r700Shader.pProgram),
618 vp->r700Shader.uShaderBinaryDWORDSize,
619 "VS");
620
621 vp->loaded = GL_TRUE;
622 }
623
624 DumpHwBinary(DUMP_VERTEX_SHADER, (GLvoid *)(vp->r700Shader.pProgram),
625 vp->r700Shader.uShaderBinaryDWORDSize);
626
627 /* TODO : enable this after MemUse fixed *=
628 (context->chipobj.MemUse)(context, vp->shadercode.buf->id);
629 */
630
631 R600_STATECHANGE(context, vs);
632 R600_STATECHANGE(context, fs); /* hack */
633
634 r700->vs.SQ_PGM_RESOURCES_VS.u32All = 0;
635 SETbit(r700->vs.SQ_PGM_RESOURCES_VS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
636
637 r700->vs.SQ_PGM_START_VS.u32All = 0; /* set from buffer object. */
638
639 SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.nRegs + 1,
640 NUM_GPRS_shift, NUM_GPRS_mask);
641
642 if(vp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
643 {
644 SETfield(r700->vs.SQ_PGM_RESOURCES_VS.u32All, vp->r700Shader.uStackSize,
645 STACK_SIZE_shift, STACK_SIZE_mask);
646 }
647
648 R600_STATECHANGE(context, spi);
649
650 SETfield(r700->SPI_VS_OUT_CONFIG.u32All,
651 vp->r700Shader.nParamExports ? (vp->r700Shader.nParamExports - 1) : 0,
652 VS_EXPORT_COUNT_shift, VS_EXPORT_COUNT_mask);
653 SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, vp->r700Shader.nParamExports,
654 NUM_INTERP_shift, NUM_INTERP_mask);
655
656 /*
657 SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
658 CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
659 */
660
661 /* sent out shader constants. */
662 paramList = vp->mesa_program->Base.Parameters;
663
664 if(NULL != paramList) {
665 _mesa_load_state_parameters(ctx, paramList);
666
667 if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
668 return GL_FALSE;
669
670 R600_STATECHANGE(context, vs_consts);
671
672 r700->vs.num_consts = paramList->NumParameters;
673
674 unNumParamData = paramList->NumParameters;
675
676 for(ui=0; ui<unNumParamData; ui++) {
677 r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
678 r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
679 r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
680 r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
681 }
682 } else
683 r700->vs.num_consts = 0;
684
685 return GL_TRUE;
686 }