55a73eab209994081d08b5f66d171a6f4b17c907
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_chipset.h
1 #ifndef _RADEON_CHIPSET_H
2 #define _RADEON_CHIPSET_H
3 /* Including xf86PciInfo.h introduces a bunch of errors...
4 */
5
6 /* General chip classes:
7 * r100 includes R100, RV100, RV200, RS100, RS200, RS250.
8 * r200 includes R200, RV250, RV280, RS300.
9 * r300 includes R300, RV350, RV370.
10 * (RS* denotes IGP)
11 */
12 #define PCI_CHIP_RV380_3150 0x3150
13 #define PCI_CHIP_RV380_3152 0x3152
14 #define PCI_CHIP_RV380_3154 0x3154
15 #define PCI_CHIP_RV380_3E50 0x3E50
16 #define PCI_CHIP_RV380_3E54 0x3E54
17 #define PCI_CHIP_RS100_4136 0x4136
18 #define PCI_CHIP_RS200_4137 0x4137
19 #define PCI_CHIP_R300_AD 0x4144
20 #define PCI_CHIP_R300_AE 0x4145
21 #define PCI_CHIP_R300_AF 0x4146
22 #define PCI_CHIP_R300_AG 0x4147
23 #define PCI_CHIP_R350_AH 0x4148
24 #define PCI_CHIP_R350_AI 0x4149
25 #define PCI_CHIP_R350_AJ 0x414A
26 #define PCI_CHIP_R350_AK 0x414B
27 #define PCI_CHIP_RV350_AP 0x4150
28 #define PCI_CHIP_RV350_AQ 0x4151
29 #define PCI_CHIP_RV350_AR 0x4152
30 #define PCI_CHIP_RV350_AS 0x4153
31 #define PCI_CHIP_RV350_AT 0x4154
32 #define PCI_CHIP_RV350_AU 0x4155
33 #define PCI_CHIP_RV350_AV 0x4156
34 #define PCI_CHIP_RS250_4237 0x4237
35 #define PCI_CHIP_R200_BB 0x4242
36 #define PCI_CHIP_R200_BC 0x4243
37 #define PCI_CHIP_RS100_4336 0x4336
38 #define PCI_CHIP_RS200_4337 0x4337
39 #define PCI_CHIP_RS250_4437 0x4437
40 #define PCI_CHIP_RV250_If 0x4966
41 #define PCI_CHIP_RV250_Ig 0x4967
42 #define PCI_CHIP_R420_JH 0x4A48
43 #define PCI_CHIP_R420_JI 0x4A49
44 #define PCI_CHIP_R420_JJ 0x4A4A
45 #define PCI_CHIP_R420_JK 0x4A4B
46 #define PCI_CHIP_R420_JL 0x4A4C
47 #define PCI_CHIP_R420_JM 0x4A4D
48 #define PCI_CHIP_R420_JN 0x4A4E
49 #define PCI_CHIP_R420_JO 0x4A4F
50 #define PCI_CHIP_R420_JP 0x4A50
51 #define PCI_CHIP_R420_JT 0x4A54
52 #define PCI_CHIP_R481_4B49 0x4B49
53 #define PCI_CHIP_R481_4B4A 0x4B4A
54 #define PCI_CHIP_R481_4B4B 0x4B4B
55 #define PCI_CHIP_R481_4B4C 0x4B4C
56 #define PCI_CHIP_RADEON_LW 0x4C57
57 #define PCI_CHIP_RADEON_LX 0x4C58
58 #define PCI_CHIP_RADEON_LY 0x4C59
59 #define PCI_CHIP_RADEON_LZ 0x4C5A
60 #define PCI_CHIP_RV250_Ld 0x4C64
61 #define PCI_CHIP_RV250_Lf 0x4C66
62 #define PCI_CHIP_RV250_Lg 0x4C67
63 #define PCI_CHIP_R300_ND 0x4E44
64 #define PCI_CHIP_R300_NE 0x4E45
65 #define PCI_CHIP_R300_NF 0x4E46
66 #define PCI_CHIP_R300_NG 0x4E47
67 #define PCI_CHIP_R350_NH 0x4E48
68 #define PCI_CHIP_R350_NI 0x4E49
69 #define PCI_CHIP_R360_NJ 0x4E4A
70 #define PCI_CHIP_R350_NK 0x4E4B
71 #define PCI_CHIP_RV350_NP 0x4E50
72 #define PCI_CHIP_RV350_NQ 0x4E51
73 #define PCI_CHIP_RV350_NR 0x4E52
74 #define PCI_CHIP_RV350_NS 0x4E53
75 #define PCI_CHIP_RV350_NT 0x4E54
76 #define PCI_CHIP_RV350_NV 0x4E56
77 #define PCI_CHIP_RADEON_QD 0x5144
78 #define PCI_CHIP_RADEON_QE 0x5145
79 #define PCI_CHIP_RADEON_QF 0x5146
80 #define PCI_CHIP_RADEON_QG 0x5147
81 #define PCI_CHIP_R200_QH 0x5148
82 #define PCI_CHIP_R200_QL 0x514C
83 #define PCI_CHIP_R200_QM 0x514D
84 #define PCI_CHIP_RV200_QW 0x5157
85 #define PCI_CHIP_RV200_QX 0x5158
86 #define PCI_CHIP_RADEON_QY 0x5159
87 #define PCI_CHIP_RADEON_QZ 0x515A
88 #define PCI_CHIP_RN50_515E 0x515E
89 #define PCI_CHIP_RV370_5460 0x5460
90 #define PCI_CHIP_RV370_5462 0x5462
91 #define PCI_CHIP_RV370_5464 0x5464
92 #define PCI_CHIP_R423_UH 0x5548
93 #define PCI_CHIP_R423_UI 0x5549
94 #define PCI_CHIP_R423_UJ 0x554A
95 #define PCI_CHIP_R423_UK 0x554B
96 #define PCI_CHIP_R430_554C 0x554C
97 #define PCI_CHIP_R430_554D 0x554D
98 #define PCI_CHIP_R430_554E 0x554E
99 #define PCI_CHIP_R430_554F 0x554F
100 #define PCI_CHIP_R423_5550 0x5550
101 #define PCI_CHIP_R423_UQ 0x5551
102 #define PCI_CHIP_R423_UR 0x5552
103 #define PCI_CHIP_R423_UT 0x5554
104 #define PCI_CHIP_RV410_564A 0x564A
105 #define PCI_CHIP_RV410_564B 0x564B
106 #define PCI_CHIP_RV410_564F 0x564F
107 #define PCI_CHIP_RV410_5652 0x5652
108 #define PCI_CHIP_RV410_5653 0x5653
109 #define PCI_CHIP_RV410_5657 0x5657
110 #define PCI_CHIP_RS300_5834 0x5834
111 #define PCI_CHIP_RS300_5835 0x5835
112 #define PCI_CHIP_RS480_5954 0x5954
113 #define PCI_CHIP_RS480_5955 0x5955
114 #define PCI_CHIP_RV280_5960 0x5960
115 #define PCI_CHIP_RV280_5961 0x5961
116 #define PCI_CHIP_RV280_5962 0x5962
117 #define PCI_CHIP_RV280_5964 0x5964
118 #define PCI_CHIP_RV280_5965 0x5965
119 #define PCI_CHIP_RN50_5969 0x5969
120 #define PCI_CHIP_RS482_5974 0x5974
121 #define PCI_CHIP_RS482_5975 0x5975
122 #define PCI_CHIP_RS400_5A41 0x5A41
123 #define PCI_CHIP_RS400_5A42 0x5A42
124 #define PCI_CHIP_RC410_5A61 0x5A61
125 #define PCI_CHIP_RC410_5A62 0x5A62
126 #define PCI_CHIP_RV370_5B60 0x5B60
127 #define PCI_CHIP_RV370_5B62 0x5B62
128 #define PCI_CHIP_RV370_5B63 0x5B63
129 #define PCI_CHIP_RV370_5B64 0x5B64
130 #define PCI_CHIP_RV370_5B65 0x5B65
131 #define PCI_CHIP_RV280_5C61 0x5C61
132 #define PCI_CHIP_RV280_5C63 0x5C63
133 #define PCI_CHIP_R430_5D48 0x5D48
134 #define PCI_CHIP_R430_5D49 0x5D49
135 #define PCI_CHIP_R430_5D4A 0x5D4A
136 #define PCI_CHIP_R480_5D4C 0x5D4C
137 #define PCI_CHIP_R480_5D4D 0x5D4D
138 #define PCI_CHIP_R480_5D4E 0x5D4E
139 #define PCI_CHIP_R480_5D4F 0x5D4F
140 #define PCI_CHIP_R480_5D50 0x5D50
141 #define PCI_CHIP_R480_5D52 0x5D52
142 #define PCI_CHIP_R423_5D57 0x5D57
143 #define PCI_CHIP_RV410_5E48 0x5E48
144 #define PCI_CHIP_RV410_5E4A 0x5E4A
145 #define PCI_CHIP_RV410_5E4B 0x5E4B
146 #define PCI_CHIP_RV410_5E4C 0x5E4C
147 #define PCI_CHIP_RV410_5E4D 0x5E4D
148 #define PCI_CHIP_RV410_5E4F 0x5E4F
149
150 #define PCI_CHIP_R520_7100 0x7100
151 #define PCI_CHIP_R520_7101 0x7101
152 #define PCI_CHIP_R520_7102 0x7102
153 #define PCI_CHIP_R520_7103 0x7103
154 #define PCI_CHIP_R520_7104 0x7104
155 #define PCI_CHIP_R520_7105 0x7105
156 #define PCI_CHIP_R520_7106 0x7106
157 #define PCI_CHIP_R520_7108 0x7108
158 #define PCI_CHIP_R520_7109 0x7109
159 #define PCI_CHIP_R520_710A 0x710A
160 #define PCI_CHIP_R520_710B 0x710B
161 #define PCI_CHIP_R520_710C 0x710C
162 #define PCI_CHIP_R520_710E 0x710E
163 #define PCI_CHIP_R520_710F 0x710F
164 #define PCI_CHIP_RV515_7140 0x7140
165 #define PCI_CHIP_RV515_7141 0x7141
166 #define PCI_CHIP_RV515_7142 0x7142
167 #define PCI_CHIP_RV515_7143 0x7143
168 #define PCI_CHIP_RV515_7144 0x7144
169 #define PCI_CHIP_RV515_7145 0x7145
170 #define PCI_CHIP_RV515_7146 0x7146
171 #define PCI_CHIP_RV515_7147 0x7147
172 #define PCI_CHIP_RV515_7149 0x7149
173 #define PCI_CHIP_RV515_714A 0x714A
174 #define PCI_CHIP_RV515_714B 0x714B
175 #define PCI_CHIP_RV515_714C 0x714C
176 #define PCI_CHIP_RV515_714D 0x714D
177 #define PCI_CHIP_RV515_714E 0x714E
178 #define PCI_CHIP_RV515_714F 0x714F
179 #define PCI_CHIP_RV515_7151 0x7151
180 #define PCI_CHIP_RV515_7152 0x7152
181 #define PCI_CHIP_RV515_7153 0x7153
182 #define PCI_CHIP_RV515_715E 0x715E
183 #define PCI_CHIP_RV515_715F 0x715F
184 #define PCI_CHIP_RV515_7180 0x7180
185 #define PCI_CHIP_RV515_7181 0x7181
186 #define PCI_CHIP_RV515_7183 0x7183
187 #define PCI_CHIP_RV515_7186 0x7186
188 #define PCI_CHIP_RV515_7187 0x7187
189 #define PCI_CHIP_RV515_7188 0x7188
190 #define PCI_CHIP_RV515_718A 0x718A
191 #define PCI_CHIP_RV515_718B 0x718B
192 #define PCI_CHIP_RV515_718C 0x718C
193 #define PCI_CHIP_RV515_718D 0x718D
194 #define PCI_CHIP_RV515_718F 0x718F
195 #define PCI_CHIP_RV515_7193 0x7193
196 #define PCI_CHIP_RV515_7196 0x7196
197 #define PCI_CHIP_RV515_719B 0x719B
198 #define PCI_CHIP_RV515_719F 0x719F
199 #define PCI_CHIP_RV530_71C0 0x71C0
200 #define PCI_CHIP_RV530_71C1 0x71C1
201 #define PCI_CHIP_RV530_71C2 0x71C2
202 #define PCI_CHIP_RV530_71C3 0x71C3
203 #define PCI_CHIP_RV530_71C4 0x71C4
204 #define PCI_CHIP_RV530_71C5 0x71C5
205 #define PCI_CHIP_RV530_71C6 0x71C6
206 #define PCI_CHIP_RV530_71C7 0x71C7
207 #define PCI_CHIP_RV530_71CD 0x71CD
208 #define PCI_CHIP_RV530_71CE 0x71CE
209 #define PCI_CHIP_RV530_71D2 0x71D2
210 #define PCI_CHIP_RV530_71D4 0x71D4
211 #define PCI_CHIP_RV530_71D5 0x71D5
212 #define PCI_CHIP_RV530_71D6 0x71D6
213 #define PCI_CHIP_RV530_71DA 0x71DA
214 #define PCI_CHIP_RV530_71DE 0x71DE
215 #define PCI_CHIP_RV515_7200 0x7200
216 #define PCI_CHIP_RV515_7210 0x7210
217 #define PCI_CHIP_RV515_7211 0x7211
218 #define PCI_CHIP_R580_7240 0x7240
219 #define PCI_CHIP_R580_7243 0x7243
220 #define PCI_CHIP_R580_7244 0x7244
221 #define PCI_CHIP_R580_7245 0x7245
222 #define PCI_CHIP_R580_7246 0x7246
223 #define PCI_CHIP_R580_7247 0x7247
224 #define PCI_CHIP_R580_7248 0x7248
225 #define PCI_CHIP_R580_7249 0x7249
226 #define PCI_CHIP_R580_724A 0x724A
227 #define PCI_CHIP_R580_724B 0x724B
228 #define PCI_CHIP_R580_724C 0x724C
229 #define PCI_CHIP_R580_724D 0x724D
230 #define PCI_CHIP_R580_724E 0x724E
231 #define PCI_CHIP_R580_724F 0x724F
232 #define PCI_CHIP_RV570_7280 0x7280
233 #define PCI_CHIP_RV560_7281 0x7281
234 #define PCI_CHIP_RV560_7283 0x7283
235 #define PCI_CHIP_R580_7284 0x7284
236 #define PCI_CHIP_RV560_7287 0x7287
237 #define PCI_CHIP_RV570_7288 0x7288
238 #define PCI_CHIP_RV570_7289 0x7289
239 #define PCI_CHIP_RV570_728B 0x728B
240 #define PCI_CHIP_RV570_728C 0x728C
241 #define PCI_CHIP_RV560_7290 0x7290
242 #define PCI_CHIP_RV560_7291 0x7291
243 #define PCI_CHIP_RV560_7293 0x7293
244 #define PCI_CHIP_RV560_7297 0x7297
245
246 #define PCI_CHIP_RS350_7834 0x7834
247 #define PCI_CHIP_RS350_7835 0x7835
248 #define PCI_CHIP_RS690_791E 0x791E
249 #define PCI_CHIP_RS690_791F 0x791F
250 #define PCI_CHIP_RS740_796C 0x796C
251 #define PCI_CHIP_RS740_796D 0x796D
252 #define PCI_CHIP_RS740_796E 0x796E
253 #define PCI_CHIP_RS740_796F 0x796F
254
255
256 enum {
257 CHIP_FAMILY_R100,
258 CHIP_FAMILY_RV100,
259 CHIP_FAMILY_RS100,
260 CHIP_FAMILY_RV200,
261 CHIP_FAMILY_RS200,
262 CHIP_FAMILY_R200,
263 CHIP_FAMILY_RV250,
264 CHIP_FAMILY_RS300,
265 CHIP_FAMILY_RV280,
266 CHIP_FAMILY_R300,
267 CHIP_FAMILY_R350,
268 CHIP_FAMILY_RV350,
269 CHIP_FAMILY_RV380,
270 CHIP_FAMILY_R420,
271 CHIP_FAMILY_RV410,
272 CHIP_FAMILY_RS400,
273 CHIP_FAMILY_RS690,
274 CHIP_FAMILY_RS740,
275 CHIP_FAMILY_RV515,
276 CHIP_FAMILY_R520,
277 CHIP_FAMILY_RV530,
278 CHIP_FAMILY_R580,
279 CHIP_FAMILY_RV560,
280 CHIP_FAMILY_RV570,
281 CHIP_FAMILY_LAST
282 };
283
284 /* General classes of Radeons, as described above the device ID section */
285 #define RADEON_CLASS_R100 (0 << 0)
286 #define RADEON_CLASS_R200 (1 << 0)
287 #define RADEON_CLASS_R300 (2 << 0)
288 #define RADEON_CLASS_MASK (3 << 0)
289
290 #define RADEON_CHIPSET_TCL (1 << 2) /* tcl support - any radeon */
291 #define RADEON_CHIPSET_BROKEN_STENCIL (1 << 3) /* r100 stencil bug */
292 #define R200_CHIPSET_YCBCR_BROKEN (1 << 4) /* r200 ycbcr bug */
293
294 #endif /* _RADEON_CHIPSET_H */