i965: old VS: Use brw_vue_map instead of implicit assumptions about VUE structure.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_chipset.h
1 #ifndef _RADEON_CHIPSET_H
2 #define _RADEON_CHIPSET_H
3 /* Including xf86PciInfo.h introduces a bunch of errors...
4 */
5
6 /* General chip classes:
7 * r100 includes R100, RV100, RV200, RS100, RS200, RS250.
8 * r200 includes R200, RV250, RV280, RS300.
9 * r300 includes R300, RV350, RV370.
10 * (RS* denotes IGP)
11 */
12
13 enum {
14 #define RADEON_CLASSIC 1
15 #define CHIPSET(id, name, family) PCI_CHIP_##name = id,
16 #include "pci_ids/radeon_pci_ids.h"
17 #include "pci_ids/r200_pci_ids.h"
18 #include "pci_ids/r300_pci_ids.h"
19 #include "pci_ids/r600_pci_ids.h"
20 #undef CHIPSET
21 };
22
23 enum {
24 CHIP_FAMILY_R100,
25 CHIP_FAMILY_RV100,
26 CHIP_FAMILY_RS100,
27 CHIP_FAMILY_RV200,
28 CHIP_FAMILY_RS200,
29 CHIP_FAMILY_R200,
30 CHIP_FAMILY_RV250,
31 CHIP_FAMILY_RS300,
32 CHIP_FAMILY_RV280,
33 CHIP_FAMILY_R300,
34 CHIP_FAMILY_R350,
35 CHIP_FAMILY_RV350,
36 CHIP_FAMILY_RV380,
37 CHIP_FAMILY_RS400,
38 CHIP_FAMILY_R420,
39 CHIP_FAMILY_RV410,
40 CHIP_FAMILY_RS600,
41 CHIP_FAMILY_RS690,
42 CHIP_FAMILY_RS740,
43 CHIP_FAMILY_RV515,
44 CHIP_FAMILY_R520,
45 CHIP_FAMILY_RV530,
46 CHIP_FAMILY_R580,
47 CHIP_FAMILY_RV560,
48 CHIP_FAMILY_RV570,
49 CHIP_FAMILY_R600,
50 CHIP_FAMILY_RV610,
51 CHIP_FAMILY_RV630,
52 CHIP_FAMILY_RV670,
53 CHIP_FAMILY_RV620,
54 CHIP_FAMILY_RV635,
55 CHIP_FAMILY_RS780,
56 CHIP_FAMILY_RS880,
57 CHIP_FAMILY_RV770,
58 CHIP_FAMILY_RV730,
59 CHIP_FAMILY_RV710,
60 CHIP_FAMILY_RV740,
61 CHIP_FAMILY_CEDAR,
62 CHIP_FAMILY_REDWOOD,
63 CHIP_FAMILY_JUNIPER,
64 CHIP_FAMILY_CYPRESS,
65 CHIP_FAMILY_HEMLOCK,
66 CHIP_FAMILY_PALM,
67 CHIP_FAMILY_SUMO,
68 CHIP_FAMILY_SUMO2,
69 CHIP_FAMILY_BARTS,
70 CHIP_FAMILY_TURKS,
71 CHIP_FAMILY_CAICOS,
72 CHIP_FAMILY_LAST
73 };
74
75 /* General classes of Radeons, as described above the device ID section */
76 #define RADEON_CLASS_R100 (0 << 0)
77 #define RADEON_CLASS_R200 (1 << 0)
78 #define RADEON_CLASS_R300 (2 << 0)
79 #define RADEON_CLASS_R600 (3 << 0)
80 #define RADEON_CLASS_MASK (3 << 0)
81
82 #define RADEON_CHIPSET_TCL (1 << 2) /* tcl support - any radeon */
83 #define RADEON_CHIPSET_BROKEN_STENCIL (1 << 3) /* r100 stencil bug */
84 #define R200_CHIPSET_YCBCR_BROKEN (1 << 4) /* r200 ycbcr bug */
85
86 #endif /* _RADEON_CHIPSET_H */