src/mesa/drivers/dri/radeon/radeon_cmdbuf.h

   1 #ifndef COMMON_CMDBUF_H
   2 #define COMMON_CMDBUF_H
   3
   4 #include "radeon_bocs_wrapper.h"
   5
   6 void rcommonEnsureCmdBufSpace(radeonContextPtr rmesa, int dwords, const char *caller);
   7 int rcommonFlushCmdBuf(radeonContextPtr rmesa, const char *caller);
   8 int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller);
   9 void rcommonInitCmdBuf(radeonContextPtr rmesa);
  10 void rcommonDestroyCmdBuf(radeonContextPtr rmesa);
  11
  12 void rcommonBeginBatch(radeonContextPtr rmesa,
  13                        int n,
  14                        int dostate,
  15                        const char *file,
  16                        const char *function,
  17                        int line);
  18
  19 /* +r6/r7 : code here moved */
  20
  21 #define CP_PACKET2  (2 << 30)
  22 #define CP_PACKET0(reg, n)      (RADEON_CP_PACKET0 | ((n)<<16) | ((reg)>>2))
  23 #define CP_PACKET0_ONE(reg, n)  (RADEON_CP_PACKET0 | RADEON_CP_PACKET0_ONE_REG_WR | ((n)<<16) | ((reg)>>2))
  24 #define CP_PACKET3(pkt, n)      (RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
  25
  26 /**
  27  * Every function writing to the command buffer needs to declare this
  28  * to get the necessary local variables.
  29  */
  30 #define BATCH_LOCALS(rmesa) \
  31         const radeonContextPtr b_l_rmesa = rmesa
  32
  33 /**
  34  * Prepare writing n dwords to the command buffer,
  35  * including producing any necessary state emits on buffer wraparound.
  36  */
  37 #define BEGIN_BATCH(n) rcommonBeginBatch(b_l_rmesa, n, 1, __FILE__, __FUNCTION__, __LINE__)
  38
  39 /**
  40  * Same as BEGIN_BATCH, but do not cause automatic state emits.
  41  */
  42 #define BEGIN_BATCH_NO_AUTOSTATE(n) rcommonBeginBatch(b_l_rmesa, n, 0, __FILE__, __FUNCTION__, __LINE__)
  43
  44 /**
  45  * Write one dword to the command buffer.
  46  */
  47 #define OUT_BATCH(data) \
  48         do { \
  49         radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, data);\
  50         } while(0)
  51
  52 /**
  53  * Write a relocated dword to the command buffer.
  54  */
  55 #define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags)        \
  56         do {                                                    \
  57         if (0 && offset) {                                      \
  58             fprintf(stderr, "(%s:%s:%d) offset : %d\n",         \
  59             __FILE__, __FUNCTION__, __LINE__, offset);          \
  60         }                                                       \
  61         radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, offset);    \
  62         radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs,             \
  63                               bo, rd, wd, flags);               \
  64         if (!b_l_rmesa->radeonScreen->kernel_mm)                \
  65                 b_l_rmesa->cmdbuf.cs->section_cdw += 2;         \
  66         } while(0)
  67
  68
  69 /**
  70  * Write n dwords from ptr to the command buffer.
  71  */
  72 #define OUT_BATCH_TABLE(ptr,n) \
  73         do { \
  74                 int _i; \
  75         for (_i=0; _i < n; _i++) {\
  76             radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, ptr[_i]);\
  77         }\
  78         } while(0)
  79
  80 /**
  81  * Finish writing dwords to the command buffer.
  82  * The number of (direct or indirect) OUT_BATCH calls between the previous
  83  * BEGIN_BATCH and END_BATCH must match the number specified at BEGIN_BATCH time.
  84  */
  85 #define END_BATCH() \
  86         do { \
  87         radeon_cs_end(b_l_rmesa->cmdbuf.cs, __FILE__, __FUNCTION__, __LINE__);\
  88         } while(0)
  89
  90 /**
  91  * After the last END_BATCH() of rendering, this indicates that flushing
  92  * the command buffer now is okay.
  93  */
  94 #define COMMIT_BATCH() \
  95         do { \
  96         } while(0)
  97
  98
  99 /** Single register write to command buffer; requires 2 dwords. */
 100 #define OUT_BATCH_REGVAL(reg, val) \
 101         OUT_BATCH(cmdpacket0(b_l_rmesa->radeonScreen, (reg), 1)); \
 102         OUT_BATCH((val))
 103
 104 /** Continuous register range write to command buffer; requires 1 dword,
 105  * expects count dwords afterwards for register contents. */
 106 #define OUT_BATCH_REGSEQ(reg, count) \
 107         OUT_BATCH(cmdpacket0(b_l_rmesa->radeonScreen, (reg), (count)))
 108
 109 /** Write a 32 bit float to the ring; requires 1 dword. */
 110 #define OUT_BATCH_FLOAT32(f) \
 111         OUT_BATCH(radeonPackFloat32((f)))
 112
 113 /* +r6/r7 : code here moved */
 114
 115 /* Fire the buffered vertices no matter what.
 116  */
 117 static INLINE void radeon_firevertices(radeonContextPtr radeon)
 118 {
 119    if (radeon->cmdbuf.cs->cdw || radeon->dma.flush )
 120       radeon->glCtx->Driver.Flush(radeon->glCtx); /* +r6/r7 */
 121 }
 122
 123 #endif