src/mesa/drivers/dri/radeon/radeon_common_context.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   6
   7 The Weather Channel (TM) funded Tungsten Graphics to develop the
   8 initial release of the Radeon 8500 driver under the XFree86 license.
   9 This notice must be preserved.
  10
  11 All Rights Reserved.
  12
  13 Permission is hereby granted, free of charge, to any person obtaining
  14 a copy of this software and associated documentation files (the
  15 "Software"), to deal in the Software without restriction, including
  16 without limitation the rights to use, copy, modify, merge, publish,
  17 distribute, sublicense, and/or sell copies of the Software, and to
  18 permit persons to whom the Software is furnished to do so, subject to
  19 the following conditions:
  20
  21 The above copyright notice and this permission notice (including the
  22 next paragraph) shall be included in all copies or substantial
  23 portions of the Software.
  24
  25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  32
  33 **************************************************************************/
  34
  35 #include "radeon_common.h"
  36 #include "xmlpool.h"            /* for symbolic values of enum-type options */
  37 #include "utils.h"
  38 #include "vblank.h"
  39 #include "drirenderbuffer.h"
  40 #include "main/context.h"
  41 #include "main/framebuffer.h"
  42 #include "main/renderbuffer.h"
  43 #include "main/state.h"
  44 #include "main/simple_list.h"
  45 #include "swrast/swrast.h"
  46 #include "swrast_setup/swrast_setup.h"
  47 #include "tnl/tnl.h"
  48
  49 #define DRIVER_DATE "20090101"
  50
  51 #ifndef RADEON_DEBUG
  52 int RADEON_DEBUG = (0);
  53 #endif
  54
  55
  56 static const char* get_chip_family_name(int chip_family)
  57 {
  58         switch(chip_family) {
  59         case CHIP_FAMILY_R100: return "R100";
  60         case CHIP_FAMILY_RV100: return "RV100";
  61         case CHIP_FAMILY_RS100: return "RS100";
  62         case CHIP_FAMILY_RV200: return "RV200";
  63         case CHIP_FAMILY_RS200: return "RS200";
  64         case CHIP_FAMILY_R200: return "R200";
  65         case CHIP_FAMILY_RV250: return "RV250";
  66         case CHIP_FAMILY_RS300: return "RS300";
  67         case CHIP_FAMILY_RV280: return "RV280";
  68         case CHIP_FAMILY_R300: return "R300";
  69         case CHIP_FAMILY_R350: return "R350";
  70         case CHIP_FAMILY_RV350: return "RV350";
  71         case CHIP_FAMILY_RV380: return "RV380";
  72         case CHIP_FAMILY_R420: return "R420";
  73         case CHIP_FAMILY_RV410: return "RV410";
  74         case CHIP_FAMILY_RS400: return "RS400";
  75         case CHIP_FAMILY_RS600: return "RS600";
  76         case CHIP_FAMILY_RS690: return "RS690";
  77         case CHIP_FAMILY_RS740: return "RS740";
  78         case CHIP_FAMILY_RV515: return "RV515";
  79         case CHIP_FAMILY_R520: return "R520";
  80         case CHIP_FAMILY_RV530: return "RV530";
  81         case CHIP_FAMILY_R580: return "R580";
  82         case CHIP_FAMILY_RV560: return "RV560";
  83         case CHIP_FAMILY_RV570: return "RV570";
  84         default: return "unknown";
  85         }
  86 }
  87
  88
  89 /* Return various strings for glGetString().
  90  */
  91 static const GLubyte *radeonGetString(GLcontext * ctx, GLenum name)
  92 {
  93         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
  94         static char buffer[128];
  95
  96         switch (name) {
  97         case GL_VENDOR:
  98                 if (IS_R300_CLASS(radeon->radeonScreen))
  99                         return (GLubyte *) "DRI R300 Project";
 100                 else
 101                         return (GLubyte *) "Tungsten Graphics, Inc.";
 102
 103         case GL_RENDERER:
 104         {
 105                 unsigned offset;
 106                 GLuint agp_mode = (radeon->radeonScreen->card_type==RADEON_CARD_PCI) ? 0 :
 107                         radeon->radeonScreen->AGPMode;
 108                 const char* chipclass;
 109                 char hardwarename[32];
 110
 111                 if (IS_R300_CLASS(radeon->radeonScreen))
 112                         chipclass = "R300";
 113                 else if (IS_R200_CLASS(radeon->radeonScreen))
 114                         chipclass = "R200";
 115                 else
 116                         chipclass = "R100";
 117
 118                 sprintf(hardwarename, "%s (%s %04X)",
 119                         chipclass,
 120                         get_chip_family_name(radeon->radeonScreen->chip_family),
 121                         radeon->radeonScreen->device_id);
 122
 123                 offset = driGetRendererString(buffer, hardwarename, DRIVER_DATE,
 124                                               agp_mode);
 125
 126                 if (IS_R300_CLASS(radeon->radeonScreen)) {
 127                         sprintf(&buffer[offset], " %sTCL",
 128                                 (radeon->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)
 129                                 ? "" : "NO-");
 130                 } else {
 131                         sprintf(&buffer[offset], " %sTCL",
 132                                 !(radeon->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 133                                 ? "" : "NO-");
 134                 }
 135
 136                 if (radeon->radeonScreen->driScreen->dri2.enabled)
 137                         strcat(buffer, " DRI2");
 138
 139                 return (GLubyte *) buffer;
 140         }
 141
 142         default:
 143                 return NULL;
 144         }
 145 }
 146
 147 /* Initialize the driver's misc functions.
 148  */
 149 static void radeonInitDriverFuncs(struct dd_function_table *functions)
 150 {
 151         functions->GetString = radeonGetString;
 152 }
 153
 154 /**
 155  * Create and initialize all common fields of the context,
 156  * including the Mesa context itself.
 157  */
 158 GLboolean radeonInitContext(radeonContextPtr radeon,
 159                             struct dd_function_table* functions,
 160                             const __GLcontextModes * glVisual,
 161                             __DRIcontextPrivate * driContextPriv,
 162                             void *sharedContextPrivate)
 163 {
 164         __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 165         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 166         GLcontext* ctx;
 167         GLcontext* shareCtx;
 168         int fthrottle_mode;
 169
 170         /* Fill in additional standard functions. */
 171         radeonInitDriverFuncs(functions);
 172
 173         radeon->radeonScreen = screen;
 174         /* Allocate and initialize the Mesa context */
 175         if (sharedContextPrivate)
 176                 shareCtx = ((radeonContextPtr)sharedContextPrivate)->glCtx;
 177         else
 178                 shareCtx = NULL;
 179         radeon->glCtx = _mesa_create_context(glVisual, shareCtx,
 180                                             functions, (void *)radeon);
 181         if (!radeon->glCtx)
 182                 return GL_FALSE;
 183
 184         ctx = radeon->glCtx;
 185         driContextPriv->driverPrivate = radeon;
 186
 187         /* DRI fields */
 188         radeon->dri.context = driContextPriv;
 189         radeon->dri.screen = sPriv;
 190         radeon->dri.hwContext = driContextPriv->hHWContext;
 191         radeon->dri.hwLock = &sPriv->pSAREA->lock;
 192         radeon->dri.fd = sPriv->fd;
 193         radeon->dri.drmMinor = sPriv->drm_version.minor;
 194
 195         radeon->sarea = (drm_radeon_sarea_t *) ((GLubyte *) sPriv->pSAREA +
 196                                                screen->sarea_priv_offset);
 197
 198         /* Setup IRQs */
 199         fthrottle_mode = driQueryOptioni(&radeon->optionCache, "fthrottle_mode");
 200         radeon->iw.irq_seq = -1;
 201         radeon->irqsEmitted = 0;
 202         radeon->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
 203                           radeon->radeonScreen->irq);
 204
 205         radeon->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 206
 207         if (!radeon->do_irqs)
 208                 fprintf(stderr,
 209                         "IRQ's not enabled, falling back to %s: %d %d\n",
 210                         radeon->do_usleeps ? "usleeps" : "busy waits",
 211                         fthrottle_mode, radeon->radeonScreen->irq);
 212
 213         radeon->texture_depth = driQueryOptioni (&radeon->optionCache,
 214                                                 "texture_depth");
 215         if (radeon->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 216                 radeon->texture_depth = ( glVisual->rgbBits > 16 ) ?
 217                 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 218
 219         radeon->texture_row_align = 32;
 220
 221         return GL_TRUE;
 222 }
 223
 224
 225
 226 /**
 227  * Destroy the command buffer and state atoms.
 228  */
 229 static void radeon_destroy_atom_list(radeonContextPtr radeon)
 230 {
 231         struct radeon_state_atom *atom;
 232
 233         foreach(atom, &radeon->hw.atomlist) {
 234                 FREE(atom->cmd);
 235                 if (atom->lastcmd)
 236                         FREE(atom->lastcmd);
 237         }
 238
 239 }
 240
 241 /**
 242  * Cleanup common context fields.
 243  * Called by r200DestroyContext/r300DestroyContext
 244  */
 245 void radeonDestroyContext(__DRIcontextPrivate *driContextPriv )
 246 {
 247 #ifdef RADEON_BO_TRACK
 248         FILE *track;
 249 #endif
 250         GET_CURRENT_CONTEXT(ctx);
 251         radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
 252         radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 253
 254         if (radeon == current) {
 255                 radeon_firevertices(radeon);
 256                 _mesa_make_current(NULL, NULL, NULL);
 257         }
 258
 259         assert(radeon);
 260         if (radeon) {
 261
 262                 if (radeon->dma.current) {
 263                         rcommonFlushCmdBuf( radeon, __FUNCTION__ );
 264                 }
 265
 266                 radeonReleaseArrays(radeon->glCtx, ~0);
 267
 268                 if (radeon->vtbl.free_context)
 269                         radeon->vtbl.free_context(radeon->glCtx);
 270                 _swsetup_DestroyContext( radeon->glCtx );
 271                 _tnl_DestroyContext( radeon->glCtx );
 272                 _vbo_DestroyContext( radeon->glCtx );
 273                 _swrast_DestroyContext( radeon->glCtx );
 274
 275                 /* free atom list */
 276                 /* free the Mesa context */
 277                 _mesa_destroy_context(radeon->glCtx);
 278
 279                 /* _mesa_destroy_context() might result in calls to functions that
 280                  * depend on the DriverCtx, so don't set it to NULL before.
 281                  *
 282                  * radeon->glCtx->DriverCtx = NULL;
 283                  */
 284                 /* free the option cache */
 285                 driDestroyOptionCache(&radeon->optionCache);
 286
 287                 rcommonDestroyCmdBuf(radeon);
 288
 289                 radeon_destroy_atom_list(radeon);
 290
 291                 if (radeon->state.scissor.pClipRects) {
 292                         FREE(radeon->state.scissor.pClipRects);
 293                         radeon->state.scissor.pClipRects = 0;
 294                 }
 295         }
 296 #ifdef RADEON_BO_TRACK
 297         track = fopen("/tmp/tracklog", "w");
 298         if (track) {
 299                 radeon_tracker_print(&radeon->radeonScreen->bom->tracker, track);
 300                 fclose(track);
 301         }
 302 #endif
 303         FREE(radeon);
 304 }
 305
 306 /* Force the context `c' to be unbound from its buffer.
 307  */
 308 GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv)
 309 {
 310         radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
 311
 312         if (RADEON_DEBUG & DEBUG_DRI)
 313                 fprintf(stderr, "%s ctx %p\n", __FUNCTION__,
 314                         radeon->glCtx);
 315
 316         return GL_TRUE;
 317 }
 318
 319
 320 static void
 321 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon,
 322                                         struct radeon_framebuffer *draw)
 323 {
 324         /* if radeon->fake */
 325         struct radeon_renderbuffer *rb;
 326
 327         if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
 328                 if (!rb->bo) {
 329                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 330                                                 radeon->radeonScreen->frontOffset,
 331                                                 0,
 332                                                 0,
 333                                                 RADEON_GEM_DOMAIN_VRAM,
 334                                                 0);
 335                 }
 336                 rb->cpp = radeon->radeonScreen->cpp;
 337                 rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
 338         }
 339         if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
 340                 if (!rb->bo) {
 341                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 342                                                 radeon->radeonScreen->backOffset,
 343                                                 0,
 344                                                 0,
 345                                                 RADEON_GEM_DOMAIN_VRAM,
 346                                                 0);
 347                 }
 348                 rb->cpp = radeon->radeonScreen->cpp;
 349                 rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
 350         }
 351         if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) {
 352                 if (!rb->bo) {
 353                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 354                                                 radeon->radeonScreen->depthOffset,
 355                                                 0,
 356                                                 0,
 357                                                 RADEON_GEM_DOMAIN_VRAM,
 358                                                 0);
 359                 }
 360                 rb->cpp = radeon->radeonScreen->cpp;
 361                 rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
 362         }
 363         if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) {
 364                 if (!rb->bo) {
 365                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 366                                                 radeon->radeonScreen->depthOffset,
 367                                                 0,
 368                                                 0,
 369                                                 RADEON_GEM_DOMAIN_VRAM,
 370                                                 0);
 371                 }
 372                 rb->cpp = radeon->radeonScreen->cpp;
 373                 rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
 374         }
 375 }
 376
 377 static void
 378 radeon_make_renderbuffer_current(radeonContextPtr radeon,
 379                                  struct radeon_framebuffer *draw)
 380 {
 381         int size = 4096*4096*4;
 382         /* if radeon->fake */
 383         struct radeon_renderbuffer *rb;
 384
 385         if (radeon->radeonScreen->kernel_mm) {
 386                 radeon_make_kernel_renderbuffer_current(radeon, draw);
 387                 return;
 388         }
 389
 390
 391         if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
 392                 if (!rb->bo) {
 393                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 394                                                 radeon->radeonScreen->frontOffset +
 395                                                 radeon->radeonScreen->fbLocation,
 396                                                 size,
 397                                                 4096,
 398                                                 RADEON_GEM_DOMAIN_VRAM,
 399                                                 0);
 400                 }
 401                 rb->cpp = radeon->radeonScreen->cpp;
 402                 rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
 403         }
 404         if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
 405                 if (!rb->bo) {
 406                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 407                                                 radeon->radeonScreen->backOffset +
 408                                                 radeon->radeonScreen->fbLocation,
 409                                                 size,
 410                                                 4096,
 411                                                 RADEON_GEM_DOMAIN_VRAM,
 412                                                 0);
 413                 }
 414                 rb->cpp = radeon->radeonScreen->cpp;
 415                 rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
 416         }
 417         if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) {
 418                 if (!rb->bo) {
 419                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 420                                                 radeon->radeonScreen->depthOffset +
 421                                                 radeon->radeonScreen->fbLocation,
 422                                                 size,
 423                                                 4096,
 424                                                 RADEON_GEM_DOMAIN_VRAM,
 425                                                 0);
 426                 }
 427                 rb->cpp = radeon->radeonScreen->cpp;
 428                 rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
 429         }
 430         if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) {
 431                 if (!rb->bo) {
 432                         rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
 433                                                 radeon->radeonScreen->depthOffset +
 434                                                 radeon->radeonScreen->fbLocation,
 435                                                 size,
 436                                                 4096,
 437                                                 RADEON_GEM_DOMAIN_VRAM,
 438                                                 0);
 439                 }
 440                 rb->cpp = radeon->radeonScreen->cpp;
 441                 rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
 442         }
 443 }
 444
 445 static unsigned
 446 radeon_bits_per_pixel(const struct radeon_renderbuffer *rb)
 447 {
 448    switch (rb->base._ActualFormat) {
 449    case GL_RGB5:
 450    case GL_DEPTH_COMPONENT16:
 451       return 16;
 452    case GL_RGB8:
 453    case GL_RGBA8:
 454    case GL_DEPTH_COMPONENT24:
 455    case GL_DEPTH24_STENCIL8_EXT:
 456    case GL_STENCIL_INDEX8_EXT:
 457       return 32;
 458    default:
 459       return 0;
 460    }
 461 }
 462
 463 void
 464 radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 465 {
 466         unsigned int attachments[10];
 467         __DRIbuffer *buffers = NULL;
 468         __DRIscreen *screen;
 469         struct radeon_renderbuffer *rb;
 470         int i, count;
 471         struct radeon_framebuffer *draw;
 472         radeonContextPtr radeon;
 473         char *regname;
 474         struct radeon_bo *depth_bo = NULL, *bo;
 475
 476         if (RADEON_DEBUG & DEBUG_DRI)
 477             fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
 478
 479         draw = drawable->driverPrivate;
 480         screen = context->driScreenPriv;
 481         radeon = (radeonContextPtr) context->driverPrivate;
 482
 483         if (screen->dri2.loader
 484            && (screen->dri2.loader->base.version > 2)
 485            && (screen->dri2.loader->getBuffersWithFormat != NULL)) {
 486                 struct radeon_renderbuffer *depth_rb;
 487                 struct radeon_renderbuffer *stencil_rb;
 488
 489                 i = 0;
 490                 if ((radeon->is_front_buffer_rendering || !draw->color_rb[1])
 491                         && draw->color_rb[0]) {
 492                         attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 493                         attachments[i++] = radeon_bits_per_pixel(draw->color_rb[0]);
 494                 }
 495
 496                 if (draw->color_rb[1]) {
 497                         attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 498                         attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]);
 499                 }
 500
 501                 depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
 502                 stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
 503
 504                 if ((depth_rb != NULL) && (stencil_rb != NULL)) {
 505                         attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
 506                         attachments[i++] = radeon_bits_per_pixel(depth_rb);
 507                 } else if (depth_rb != NULL) {
 508                         attachments[i++] = __DRI_BUFFER_DEPTH;
 509                         attachments[i++] = radeon_bits_per_pixel(depth_rb);
 510                 } else if (stencil_rb != NULL) {
 511                         attachments[i++] = __DRI_BUFFER_STENCIL;
 512                         attachments[i++] = radeon_bits_per_pixel(stencil_rb);
 513                 }
 514
 515                 buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable,
 516                                                                 &drawable->w,
 517                                                                 &drawable->h,
 518                                                                 attachments, i / 2,
 519                                                                 &count,
 520                                                                 drawable->loaderPrivate);
 521         } else if (screen->dri2.loader) {
 522                 i = 0;
 523                 if (draw->color_rb[0])
 524                         attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
 525                 if (draw->color_rb[1])
 526                         attachments[i++] = __DRI_BUFFER_BACK_LEFT;
 527                 if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH))
 528                         attachments[i++] = __DRI_BUFFER_DEPTH;
 529                 if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL))
 530                         attachments[i++] = __DRI_BUFFER_STENCIL;
 531
 532                 buffers = (*screen->dri2.loader->getBuffers)(drawable,
 533                                                                  &drawable->w,
 534                                                                  &drawable->h,
 535                                                                  attachments, i,
 536                                                                  &count,
 537                                                                  drawable->loaderPrivate);
 538         }
 539
 540         if (buffers == NULL)
 541                 return;
 542
 543         /* set one cliprect to cover the whole drawable */
 544         drawable->x = 0;
 545         drawable->y = 0;
 546         drawable->backX = 0;
 547         drawable->backY = 0;
 548         drawable->numClipRects = 1;
 549         drawable->pClipRects[0].x1 = 0;
 550         drawable->pClipRects[0].y1 = 0;
 551         drawable->pClipRects[0].x2 = drawable->w;
 552         drawable->pClipRects[0].y2 = drawable->h;
 553         drawable->numBackClipRects = 1;
 554         drawable->pBackClipRects[0].x1 = 0;
 555         drawable->pBackClipRects[0].y1 = 0;
 556         drawable->pBackClipRects[0].x2 = drawable->w;
 557         drawable->pBackClipRects[0].y2 = drawable->h;
 558         for (i = 0; i < count; i++) {
 559                 switch (buffers[i].attachment) {
 560                 case __DRI_BUFFER_FRONT_LEFT:
 561                         rb = draw->color_rb[0];
 562                         regname = "dri2 front buffer";
 563                         break;
 564                 case __DRI_BUFFER_FAKE_FRONT_LEFT:
 565                         rb = draw->color_rb[0];
 566                         regname = "dri2 fake front buffer";
 567                         break;
 568                 case __DRI_BUFFER_BACK_LEFT:
 569                         rb = draw->color_rb[1];
 570                         regname = "dri2 back buffer";
 571                         break;
 572                 case __DRI_BUFFER_DEPTH:
 573                         rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
 574                         regname = "dri2 depth buffer";
 575                         break;
 576                 case __DRI_BUFFER_DEPTH_STENCIL:
 577                         rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
 578                         regname = "dri2 depth / stencil buffer";
 579                         break;
 580                 case __DRI_BUFFER_STENCIL:
 581                         rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
 582                         regname = "dri2 stencil buffer";
 583                         break;
 584                 case __DRI_BUFFER_ACCUM:
 585                 default:
 586                         fprintf(stderr,
 587                                 "unhandled buffer attach event, attacment type %d\n",
 588                                 buffers[i].attachment);
 589                         return;
 590                 }
 591
 592                 if (rb == NULL)
 593                         continue;
 594
 595                 if (rb->bo) {
 596                         uint32_t name = radeon_gem_name_bo(rb->bo);
 597                         if (name == buffers[i].name)
 598                                 continue;
 599                 }
 600
 601                 if (RADEON_DEBUG & DEBUG_DRI)
 602                         fprintf(stderr,
 603                                 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
 604                                 regname, buffers[i].name, buffers[i].attachment,
 605                                 buffers[i].cpp, buffers[i].pitch);
 606
 607                 rb->cpp = buffers[i].cpp;
 608                 rb->pitch = buffers[i].pitch;
 609                 rb->width = drawable->w;
 610                 rb->height = drawable->h;
 611                 rb->has_surface = 0;
 612
 613                 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) {
 614                         if (RADEON_DEBUG & DEBUG_DRI)
 615                                 fprintf(stderr, "(reusing depth buffer as stencil)\n");
 616                         bo = depth_bo;
 617                         radeon_bo_ref(bo);
 618                 } else {
 619                         bo = radeon_bo_open(radeon->radeonScreen->bom,
 620                                                 buffers[i].name,
 621                                                 0,
 622                                                 0,
 623                                                 RADEON_GEM_DOMAIN_VRAM,
 624                                                 buffers[i].flags);
 625                         if (bo == NULL) {
 626
 627                                 fprintf(stderr, "failed to attach %s %d\n",
 628                                         regname, buffers[i].name);
 629
 630                         }
 631                 }
 632
 633                 if (buffers[i].attachment == __DRI_BUFFER_DEPTH) {
 634                         if (draw->base.Visual.depthBits == 16)
 635                                 rb->cpp = 2;
 636                         depth_bo = bo;
 637                 }
 638
 639                 radeon_renderbuffer_set_bo(rb, bo);
 640                 radeon_bo_unref(bo);
 641
 642                 if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
 643                         rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
 644                         if (rb != NULL) {
 645                                 struct radeon_bo *stencil_bo = NULL;
 646
 647                                 if (rb->bo) {
 648                                         uint32_t name = radeon_gem_name_bo(rb->bo);
 649                                         if (name == buffers[i].name)
 650                                                 continue;
 651                                 }
 652
 653                                 stencil_bo = bo;
 654                                 radeon_bo_ref(stencil_bo);
 655                                 radeon_renderbuffer_set_bo(rb, stencil_bo);
 656                                 radeon_bo_unref(stencil_bo);
 657                         }
 658                 }
 659         }
 660
 661         driUpdateFramebufferSize(radeon->glCtx, drawable);
 662 }
 663
 664 /* Force the context `c' to be the current context and associate with it
 665  * buffer `b'.
 666  */
 667 GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 668                             __DRIdrawablePrivate * driDrawPriv,
 669                             __DRIdrawablePrivate * driReadPriv)
 670 {
 671         radeonContextPtr radeon;
 672         struct radeon_framebuffer *drfb;
 673         struct gl_framebuffer *readfb;
 674
 675         if (!driContextPriv) {
 676                 if (RADEON_DEBUG & DEBUG_DRI)
 677                         fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 678                 _mesa_make_current(NULL, NULL, NULL);
 679                 return GL_TRUE;
 680         }
 681
 682         radeon = (radeonContextPtr) driContextPriv->driverPrivate;
 683         drfb = driDrawPriv->driverPrivate;
 684         readfb = driReadPriv->driverPrivate;
 685
 686         if (driContextPriv->driScreenPriv->dri2.enabled) {
 687                 radeon_update_renderbuffers(driContextPriv, driDrawPriv);
 688                 if (driDrawPriv != driReadPriv)
 689                         radeon_update_renderbuffers(driContextPriv, driReadPriv);
 690                 _mesa_reference_renderbuffer(&radeon->state.color.rb,
 691                         &(radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT)->base));
 692                 _mesa_reference_renderbuffer(&radeon->state.depth.rb,
 693                         &(radeon_get_renderbuffer(&drfb->base, BUFFER_DEPTH)->base));
 694         } else {
 695                 radeon_make_renderbuffer_current(radeon, drfb);
 696         }
 697
 698
 699         if (RADEON_DEBUG & DEBUG_DRI)
 700              fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb);
 701
 702         driUpdateFramebufferSize(radeon->glCtx, driDrawPriv);
 703         if (driReadPriv != driDrawPriv)
 704                 driUpdateFramebufferSize(radeon->glCtx, driReadPriv);
 705
 706         _mesa_make_current(radeon->glCtx, &drfb->base, readfb);
 707
 708         _mesa_update_state(radeon->glCtx);
 709
 710         if (radeon->glCtx->DrawBuffer == &drfb->base) {
 711                 if (driDrawPriv->swap_interval == (unsigned)-1) {
 712                         int i;
 713                         driDrawPriv->vblFlags =
 714                                 (radeon->radeonScreen->irq != 0)
 715                                 ? driGetDefaultVBlankFlags(&radeon->
 716                                                            optionCache)
 717                                 : VBLANK_FLAG_NO_IRQ;
 718
 719                         driDrawableInitVBlank(driDrawPriv);
 720                         drfb->vbl_waited = driDrawPriv->vblSeq;
 721
 722                         for (i = 0; i < 2; i++) {
 723                                 if (drfb->color_rb[i])
 724                                         drfb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
 725                         }
 726
 727                 }
 728
 729                 radeon_window_moved(radeon);
 730                 radeon_draw_buffer(radeon->glCtx, &drfb->base);
 731         }
 732
 733
 734         if (RADEON_DEBUG & DEBUG_DRI)
 735                 fprintf(stderr, "End %s\n", __FUNCTION__);
 736         return GL_TRUE;
 737 }
 738