1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
39 #include "drirenderbuffer.h"
40 #include "drivers/common/meta.h"
41 #include "main/context.h"
42 #include "main/renderbuffer.h"
43 #include "main/state.h"
44 #include "main/simple_list.h"
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
49 #define DRIVER_DATE "20090101"
52 int RADEON_DEBUG
= (0);
56 static const char* get_chip_family_name(int chip_family
)
59 case CHIP_FAMILY_R100
: return "R100";
60 case CHIP_FAMILY_RV100
: return "RV100";
61 case CHIP_FAMILY_RS100
: return "RS100";
62 case CHIP_FAMILY_RV200
: return "RV200";
63 case CHIP_FAMILY_RS200
: return "RS200";
64 case CHIP_FAMILY_R200
: return "R200";
65 case CHIP_FAMILY_RV250
: return "RV250";
66 case CHIP_FAMILY_RS300
: return "RS300";
67 case CHIP_FAMILY_RV280
: return "RV280";
68 case CHIP_FAMILY_R300
: return "R300";
69 case CHIP_FAMILY_R350
: return "R350";
70 case CHIP_FAMILY_RV350
: return "RV350";
71 case CHIP_FAMILY_RV380
: return "RV380";
72 case CHIP_FAMILY_R420
: return "R420";
73 case CHIP_FAMILY_RV410
: return "RV410";
74 case CHIP_FAMILY_RS400
: return "RS400";
75 case CHIP_FAMILY_RS600
: return "RS600";
76 case CHIP_FAMILY_RS690
: return "RS690";
77 case CHIP_FAMILY_RS740
: return "RS740";
78 case CHIP_FAMILY_RV515
: return "RV515";
79 case CHIP_FAMILY_R520
: return "R520";
80 case CHIP_FAMILY_RV530
: return "RV530";
81 case CHIP_FAMILY_R580
: return "R580";
82 case CHIP_FAMILY_RV560
: return "RV560";
83 case CHIP_FAMILY_RV570
: return "RV570";
84 case CHIP_FAMILY_R600
: return "R600";
85 case CHIP_FAMILY_RV610
: return "RV610";
86 case CHIP_FAMILY_RV630
: return "RV630";
87 case CHIP_FAMILY_RV670
: return "RV670";
88 case CHIP_FAMILY_RV620
: return "RV620";
89 case CHIP_FAMILY_RV635
: return "RV635";
90 case CHIP_FAMILY_RS780
: return "RS780";
91 case CHIP_FAMILY_RS880
: return "RS880";
92 case CHIP_FAMILY_RV770
: return "RV770";
93 case CHIP_FAMILY_RV730
: return "RV730";
94 case CHIP_FAMILY_RV710
: return "RV710";
95 case CHIP_FAMILY_RV740
: return "RV740";
96 default: return "unknown";
101 /* Return various strings for glGetString().
103 static const GLubyte
*radeonGetString(GLcontext
* ctx
, GLenum name
)
105 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
106 static char buffer
[128];
110 if (IS_R600_CLASS(radeon
->radeonScreen
))
111 return (GLubyte
*) "Advanced Micro Devices, Inc.";
112 else if (IS_R300_CLASS(radeon
->radeonScreen
))
113 return (GLubyte
*) "DRI R300 Project";
115 return (GLubyte
*) "Tungsten Graphics, Inc.";
120 GLuint agp_mode
= (radeon
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
121 radeon
->radeonScreen
->AGPMode
;
122 const char* chipclass
;
123 char hardwarename
[32];
125 if (IS_R600_CLASS(radeon
->radeonScreen
))
127 else if (IS_R300_CLASS(radeon
->radeonScreen
))
129 else if (IS_R200_CLASS(radeon
->radeonScreen
))
134 sprintf(hardwarename
, "%s (%s %04X)",
136 get_chip_family_name(radeon
->radeonScreen
->chip_family
),
137 radeon
->radeonScreen
->device_id
);
139 offset
= driGetRendererString(buffer
, hardwarename
, DRIVER_DATE
,
142 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
143 sprintf(&buffer
[offset
], " TCL");
144 } else if (IS_R300_CLASS(radeon
->radeonScreen
)) {
145 sprintf(&buffer
[offset
], " %sTCL",
146 (radeon
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)
149 sprintf(&buffer
[offset
], " %sTCL",
150 !(radeon
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
154 if (radeon
->radeonScreen
->driScreen
->dri2
.enabled
)
155 strcat(buffer
, " DRI2");
157 return (GLubyte
*) buffer
;
165 /* Initialize the driver's misc functions.
167 static void radeonInitDriverFuncs(struct dd_function_table
*functions
)
169 functions
->GetString
= radeonGetString
;
173 * Create and initialize all common fields of the context,
174 * including the Mesa context itself.
176 GLboolean
radeonInitContext(radeonContextPtr radeon
,
177 struct dd_function_table
* functions
,
178 const __GLcontextModes
* glVisual
,
179 __DRIcontext
* driContextPriv
,
180 void *sharedContextPrivate
)
182 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
183 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
188 /* Fill in additional standard functions. */
189 radeonInitDriverFuncs(functions
);
191 radeon
->radeonScreen
= screen
;
192 /* Allocate and initialize the Mesa context */
193 if (sharedContextPrivate
)
194 shareCtx
= ((radeonContextPtr
)sharedContextPrivate
)->glCtx
;
197 radeon
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
198 functions
, (void *)radeon
);
203 driContextPriv
->driverPrivate
= radeon
;
205 meta_init_metaops(ctx
, &radeon
->meta
);
207 _mesa_meta_init(ctx
);
210 radeon
->dri
.context
= driContextPriv
;
211 radeon
->dri
.screen
= sPriv
;
212 radeon
->dri
.hwContext
= driContextPriv
->hHWContext
;
213 radeon
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
214 radeon
->dri
.hwLockCount
= 0;
215 radeon
->dri
.fd
= sPriv
->fd
;
216 radeon
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
218 radeon
->sarea
= (drm_radeon_sarea_t
*) ((GLubyte
*) sPriv
->pSAREA
+
219 screen
->sarea_priv_offset
);
222 fthrottle_mode
= driQueryOptioni(&radeon
->optionCache
, "fthrottle_mode");
223 radeon
->iw
.irq_seq
= -1;
224 radeon
->irqsEmitted
= 0;
225 radeon
->do_irqs
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
&&
226 radeon
->radeonScreen
->irq
);
228 radeon
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
230 if (!radeon
->do_irqs
)
232 "IRQ's not enabled, falling back to %s: %d %d\n",
233 radeon
->do_usleeps
? "usleeps" : "busy waits",
234 fthrottle_mode
, radeon
->radeonScreen
->irq
);
236 radeon
->texture_depth
= driQueryOptioni (&radeon
->optionCache
,
238 if (radeon
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
239 radeon
->texture_depth
= ( glVisual
->rgbBits
> 16 ) ?
240 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
242 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
243 radeon
->texture_row_align
= 256;
244 radeon
->texture_rect_row_align
= 256;
245 radeon
->texture_compressed_row_align
= 256;
246 } else if (IS_R200_CLASS(radeon
->radeonScreen
) ||
247 IS_R100_CLASS(radeon
->radeonScreen
)) {
248 radeon
->texture_row_align
= 32;
249 radeon
->texture_rect_row_align
= 64;
250 radeon
->texture_compressed_row_align
= 32;
251 } else { /* R300 - not sure this is all correct */
252 int chip_family
= radeon
->radeonScreen
->chip_family
;
253 if (chip_family
== CHIP_FAMILY_RS600
||
254 chip_family
== CHIP_FAMILY_RS690
||
255 chip_family
== CHIP_FAMILY_RS740
)
256 radeon
->texture_row_align
= 64;
258 radeon
->texture_row_align
= 32;
259 radeon
->texture_rect_row_align
= 64;
260 radeon
->texture_compressed_row_align
= 32;
263 radeon_init_dma(radeon
);
271 * Destroy the command buffer and state atoms.
273 static void radeon_destroy_atom_list(radeonContextPtr radeon
)
275 struct radeon_state_atom
*atom
;
277 foreach(atom
, &radeon
->hw
.atomlist
) {
286 * Cleanup common context fields.
287 * Called by r200DestroyContext/r300DestroyContext
289 void radeonDestroyContext(__DRIcontext
*driContextPriv
)
291 #ifdef RADEON_BO_TRACK
294 GET_CURRENT_CONTEXT(ctx
);
295 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
296 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
300 _mesa_meta_free(radeon
->glCtx
);
302 if (radeon
== current
) {
303 _mesa_make_current(NULL
, NULL
, NULL
);
306 radeon_firevertices(radeon
);
307 if (!is_empty_list(&radeon
->dma
.reserved
)) {
308 rcommonFlushCmdBuf( radeon
, __FUNCTION__
);
311 radeonFreeDmaRegions(radeon
);
312 radeonReleaseArrays(radeon
->glCtx
, ~0);
313 meta_destroy_metaops(&radeon
->meta
);
314 if (radeon
->vtbl
.free_context
)
315 radeon
->vtbl
.free_context(radeon
->glCtx
);
316 _swsetup_DestroyContext( radeon
->glCtx
);
317 _tnl_DestroyContext( radeon
->glCtx
);
318 _vbo_DestroyContext( radeon
->glCtx
);
319 _swrast_DestroyContext( radeon
->glCtx
);
322 /* free the Mesa context */
323 _mesa_destroy_context(radeon
->glCtx
);
325 /* _mesa_destroy_context() might result in calls to functions that
326 * depend on the DriverCtx, so don't set it to NULL before.
328 * radeon->glCtx->DriverCtx = NULL;
330 /* free the option cache */
331 driDestroyOptionCache(&radeon
->optionCache
);
333 rcommonDestroyCmdBuf(radeon
);
335 radeon_destroy_atom_list(radeon
);
337 if (radeon
->state
.scissor
.pClipRects
) {
338 FREE(radeon
->state
.scissor
.pClipRects
);
339 radeon
->state
.scissor
.pClipRects
= 0;
341 #ifdef RADEON_BO_TRACK
342 track
= fopen("/tmp/tracklog", "w");
344 radeon_tracker_print(&radeon
->radeonScreen
->bom
->tracker
, track
);
351 /* Force the context `c' to be unbound from its buffer.
353 GLboolean
radeonUnbindContext(__DRIcontext
* driContextPriv
)
355 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
357 if (RADEON_DEBUG
& RADEON_DRI
)
358 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
,
366 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon
,
367 struct radeon_framebuffer
*draw
)
369 /* if radeon->fake */
370 struct radeon_renderbuffer
*rb
;
372 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
374 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
375 radeon
->radeonScreen
->frontOffset
,
378 RADEON_GEM_DOMAIN_VRAM
,
381 rb
->cpp
= radeon
->radeonScreen
->cpp
;
382 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
384 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
386 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
387 radeon
->radeonScreen
->backOffset
,
390 RADEON_GEM_DOMAIN_VRAM
,
393 rb
->cpp
= radeon
->radeonScreen
->cpp
;
394 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
396 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
398 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
399 radeon
->radeonScreen
->depthOffset
,
402 RADEON_GEM_DOMAIN_VRAM
,
405 rb
->cpp
= radeon
->radeonScreen
->cpp
;
406 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
408 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
410 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
411 radeon
->radeonScreen
->depthOffset
,
414 RADEON_GEM_DOMAIN_VRAM
,
417 rb
->cpp
= radeon
->radeonScreen
->cpp
;
418 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
423 radeon_make_renderbuffer_current(radeonContextPtr radeon
,
424 struct radeon_framebuffer
*draw
)
426 int size
= 4096*4096*4;
427 /* if radeon->fake */
428 struct radeon_renderbuffer
*rb
;
430 if (radeon
->radeonScreen
->kernel_mm
) {
431 radeon_make_kernel_renderbuffer_current(radeon
, draw
);
436 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
438 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
439 radeon
->radeonScreen
->frontOffset
+
440 radeon
->radeonScreen
->fbLocation
,
443 RADEON_GEM_DOMAIN_VRAM
,
446 rb
->cpp
= radeon
->radeonScreen
->cpp
;
447 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
449 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
451 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
452 radeon
->radeonScreen
->backOffset
+
453 radeon
->radeonScreen
->fbLocation
,
456 RADEON_GEM_DOMAIN_VRAM
,
459 rb
->cpp
= radeon
->radeonScreen
->cpp
;
460 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
462 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
464 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
465 radeon
->radeonScreen
->depthOffset
+
466 radeon
->radeonScreen
->fbLocation
,
469 RADEON_GEM_DOMAIN_VRAM
,
472 rb
->cpp
= radeon
->radeonScreen
->cpp
;
473 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
475 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
477 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
478 radeon
->radeonScreen
->depthOffset
+
479 radeon
->radeonScreen
->fbLocation
,
482 RADEON_GEM_DOMAIN_VRAM
,
485 rb
->cpp
= radeon
->radeonScreen
->cpp
;
486 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
491 radeon_bits_per_pixel(const struct radeon_renderbuffer
*rb
)
493 return _mesa_get_format_bytes(rb
->base
.Format
) * 8;
497 * Check if drawable has been invalidated by dri2InvalidateDrawable().
498 * Update renderbuffers if so. This prevents a client from accessing
499 * a backbuffer that has a swap pending but not yet completed.
501 * See intel_prepare_render for equivalent code in intel driver.
504 void radeon_prepare_render(radeonContextPtr radeon
)
506 __DRIcontext
*driContext
= radeon
->dri
.context
;
507 __DRIdrawable
*drawable
;
510 screen
= driContext
->driScreenPriv
;
511 if (!screen
->dri2
.loader
)
514 drawable
= driContext
->driDrawablePriv
;
515 if (drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
516 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
517 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
519 /* Intel driver does the equivalent of this, no clue if it is needed:
520 * radeon_draw_buffer(radeon->glCtx, &(drawable->driverPrivate)->base);
522 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
525 drawable
= driContext
->driReadablePriv
;
526 if (drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
527 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
528 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
529 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
532 /* If we're currently rendering to the front buffer, the rendering
533 * that will happen next will probably dirty the front buffer. So
534 * mark it as dirty here.
536 if (radeon
->is_front_buffer_rendering
)
537 radeon
->front_buffer_dirty
= GL_TRUE
;
541 radeon_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
,
542 GLboolean front_only
)
544 unsigned int attachments
[10];
545 __DRIbuffer
*buffers
= NULL
;
547 struct radeon_renderbuffer
*rb
;
549 struct radeon_framebuffer
*draw
;
550 radeonContextPtr radeon
;
552 struct radeon_bo
*depth_bo
= NULL
, *bo
;
554 if (RADEON_DEBUG
& RADEON_DRI
)
555 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
557 draw
= drawable
->driverPrivate
;
558 screen
= context
->driScreenPriv
;
559 radeon
= (radeonContextPtr
) context
->driverPrivate
;
561 /* Set this up front, so that in case our buffers get invalidated
562 * while we're getting new buffers, we don't clobber the stamp and
563 * thus ignore the invalidate. */
564 drawable
->lastStamp
= drawable
->dri2
.stamp
;
566 if (screen
->dri2
.loader
567 && (screen
->dri2
.loader
->base
.version
> 2)
568 && (screen
->dri2
.loader
->getBuffersWithFormat
!= NULL
)) {
569 struct radeon_renderbuffer
*depth_rb
;
570 struct radeon_renderbuffer
*stencil_rb
;
573 if ((front_only
|| radeon
->is_front_buffer_rendering
||
574 radeon
->is_front_buffer_reading
||
576 && draw
->color_rb
[0]) {
577 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
578 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[0]);
582 if (draw
->color_rb
[1]) {
583 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
584 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[1]);
587 depth_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
588 stencil_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
590 if ((depth_rb
!= NULL
) && (stencil_rb
!= NULL
)) {
591 attachments
[i
++] = __DRI_BUFFER_DEPTH_STENCIL
;
592 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
593 } else if (depth_rb
!= NULL
) {
594 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
595 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
596 } else if (stencil_rb
!= NULL
) {
597 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
598 attachments
[i
++] = radeon_bits_per_pixel(stencil_rb
);
602 buffers
= (*screen
->dri2
.loader
->getBuffersWithFormat
)(drawable
,
607 drawable
->loaderPrivate
);
608 } else if (screen
->dri2
.loader
) {
610 if (draw
->color_rb
[0])
611 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
613 if (draw
->color_rb
[1])
614 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
615 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
))
616 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
617 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
))
618 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
621 buffers
= (*screen
->dri2
.loader
->getBuffers
)(drawable
,
626 drawable
->loaderPrivate
);
632 /* set one cliprect to cover the whole drawable */
637 drawable
->numClipRects
= 1;
638 drawable
->pClipRects
[0].x1
= 0;
639 drawable
->pClipRects
[0].y1
= 0;
640 drawable
->pClipRects
[0].x2
= drawable
->w
;
641 drawable
->pClipRects
[0].y2
= drawable
->h
;
642 drawable
->numBackClipRects
= 1;
643 drawable
->pBackClipRects
[0].x1
= 0;
644 drawable
->pBackClipRects
[0].y1
= 0;
645 drawable
->pBackClipRects
[0].x2
= drawable
->w
;
646 drawable
->pBackClipRects
[0].y2
= drawable
->h
;
647 for (i
= 0; i
< count
; i
++) {
648 switch (buffers
[i
].attachment
) {
649 case __DRI_BUFFER_FRONT_LEFT
:
650 rb
= draw
->color_rb
[0];
651 regname
= "dri2 front buffer";
653 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
654 rb
= draw
->color_rb
[0];
655 regname
= "dri2 fake front buffer";
657 case __DRI_BUFFER_BACK_LEFT
:
658 rb
= draw
->color_rb
[1];
659 regname
= "dri2 back buffer";
661 case __DRI_BUFFER_DEPTH
:
662 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
663 regname
= "dri2 depth buffer";
665 case __DRI_BUFFER_DEPTH_STENCIL
:
666 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
667 regname
= "dri2 depth / stencil buffer";
669 case __DRI_BUFFER_STENCIL
:
670 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
671 regname
= "dri2 stencil buffer";
673 case __DRI_BUFFER_ACCUM
:
676 "unhandled buffer attach event, attacment type %d\n",
677 buffers
[i
].attachment
);
685 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
686 if (name
== buffers
[i
].name
)
690 if (RADEON_DEBUG
& RADEON_DRI
)
692 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
693 regname
, buffers
[i
].name
, buffers
[i
].attachment
,
694 buffers
[i
].cpp
, buffers
[i
].pitch
);
696 rb
->cpp
= buffers
[i
].cpp
;
697 rb
->pitch
= buffers
[i
].pitch
;
698 rb
->base
.Width
= drawable
->w
;
699 rb
->base
.Height
= drawable
->h
;
703 rb
->tile_config
= radeon
->radeonScreen
->tile_config
;
704 rb
->group_bytes
= radeon
->radeonScreen
->group_bytes
;
705 rb
->num_channels
= radeon
->radeonScreen
->num_channels
;
706 rb
->num_banks
= radeon
->radeonScreen
->num_banks
;
707 rb
->r7xx_bank_op
= radeon
->radeonScreen
->r7xx_bank_op
;
709 if (buffers
[i
].attachment
== __DRI_BUFFER_STENCIL
&& depth_bo
) {
710 if (RADEON_DEBUG
& RADEON_DRI
)
711 fprintf(stderr
, "(reusing depth buffer as stencil)\n");
715 uint32_t tiling_flags
= 0, pitch
= 0;
718 bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
722 RADEON_GEM_DOMAIN_VRAM
,
727 fprintf(stderr
, "failed to attach %s %d\n",
728 regname
, buffers
[i
].name
);
732 ret
= radeon_bo_get_tiling(bo
, &tiling_flags
, &pitch
);
733 if (tiling_flags
& RADEON_TILING_MACRO
)
734 bo
->flags
|= RADEON_BO_FLAGS_MACRO_TILE
;
735 if (tiling_flags
& RADEON_TILING_MICRO
)
736 bo
->flags
|= RADEON_BO_FLAGS_MICRO_TILE
;
740 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH
) {
741 if (draw
->base
.Visual
.depthBits
== 16)
746 radeon_renderbuffer_set_bo(rb
, bo
);
749 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH_STENCIL
) {
750 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
752 struct radeon_bo
*stencil_bo
= NULL
;
755 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
756 if (name
== buffers
[i
].name
)
761 radeon_bo_ref(stencil_bo
);
762 radeon_renderbuffer_set_bo(rb
, stencil_bo
);
763 radeon_bo_unref(stencil_bo
);
768 driUpdateFramebufferSize(radeon
->glCtx
, drawable
);
771 /* Force the context `c' to be the current context and associate with it
774 GLboolean
radeonMakeCurrent(__DRIcontext
* driContextPriv
,
775 __DRIdrawable
* driDrawPriv
,
776 __DRIdrawable
* driReadPriv
)
778 radeonContextPtr radeon
;
779 struct radeon_framebuffer
*drfb
;
780 struct gl_framebuffer
*readfb
;
782 if (!driContextPriv
) {
783 if (RADEON_DEBUG
& RADEON_DRI
)
784 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
785 _mesa_make_current(NULL
, NULL
, NULL
);
789 radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
790 drfb
= driDrawPriv
->driverPrivate
;
791 readfb
= driReadPriv
->driverPrivate
;
793 if (driContextPriv
->driScreenPriv
->dri2
.enabled
) {
794 radeon_update_renderbuffers(driContextPriv
, driDrawPriv
, GL_FALSE
);
795 if (driDrawPriv
!= driReadPriv
)
796 radeon_update_renderbuffers(driContextPriv
, driReadPriv
, GL_FALSE
);
797 _mesa_reference_renderbuffer(&radeon
->state
.color
.rb
,
798 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_BACK_LEFT
)->base
));
799 _mesa_reference_renderbuffer(&radeon
->state
.depth
.rb
,
800 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_DEPTH
)->base
));
802 radeon_make_renderbuffer_current(radeon
, drfb
);
805 if (RADEON_DEBUG
& RADEON_DRI
)
806 fprintf(stderr
, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__
, radeon
->glCtx
, drfb
, readfb
);
808 driUpdateFramebufferSize(radeon
->glCtx
, driDrawPriv
);
809 if (driReadPriv
!= driDrawPriv
)
810 driUpdateFramebufferSize(radeon
->glCtx
, driReadPriv
);
812 _mesa_make_current(radeon
->glCtx
, &drfb
->base
, readfb
);
814 _mesa_update_state(radeon
->glCtx
);
816 if (radeon
->glCtx
->DrawBuffer
== &drfb
->base
) {
817 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
819 driDrawPriv
->vblFlags
=
820 (radeon
->radeonScreen
->irq
!= 0)
821 ? driGetDefaultVBlankFlags(&radeon
->
823 : VBLANK_FLAG_NO_IRQ
;
825 driDrawableInitVBlank(driDrawPriv
);
826 drfb
->vbl_waited
= driDrawPriv
->vblSeq
;
828 for (i
= 0; i
< 2; i
++) {
829 if (drfb
->color_rb
[i
])
830 drfb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
835 radeon_window_moved(radeon
);
836 radeon_draw_buffer(radeon
->glCtx
, &drfb
->base
);
840 if (RADEON_DEBUG
& RADEON_DRI
)
841 fprintf(stderr
, "End %s\n", __FUNCTION__
);