1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
39 #include "drirenderbuffer.h"
40 #include "drivers/common/meta.h"
41 #include "main/context.h"
42 #include "main/renderbuffer.h"
43 #include "main/state.h"
44 #include "main/simple_list.h"
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
49 #define DRIVER_DATE "20090101"
52 int RADEON_DEBUG
= (0);
56 static const char* get_chip_family_name(int chip_family
)
59 case CHIP_FAMILY_R100
: return "R100";
60 case CHIP_FAMILY_RV100
: return "RV100";
61 case CHIP_FAMILY_RS100
: return "RS100";
62 case CHIP_FAMILY_RV200
: return "RV200";
63 case CHIP_FAMILY_RS200
: return "RS200";
64 case CHIP_FAMILY_R200
: return "R200";
65 case CHIP_FAMILY_RV250
: return "RV250";
66 case CHIP_FAMILY_RS300
: return "RS300";
67 case CHIP_FAMILY_RV280
: return "RV280";
68 case CHIP_FAMILY_R300
: return "R300";
69 case CHIP_FAMILY_R350
: return "R350";
70 case CHIP_FAMILY_RV350
: return "RV350";
71 case CHIP_FAMILY_RV380
: return "RV380";
72 case CHIP_FAMILY_R420
: return "R420";
73 case CHIP_FAMILY_RV410
: return "RV410";
74 case CHIP_FAMILY_RS400
: return "RS400";
75 case CHIP_FAMILY_RS600
: return "RS600";
76 case CHIP_FAMILY_RS690
: return "RS690";
77 case CHIP_FAMILY_RS740
: return "RS740";
78 case CHIP_FAMILY_RV515
: return "RV515";
79 case CHIP_FAMILY_R520
: return "R520";
80 case CHIP_FAMILY_RV530
: return "RV530";
81 case CHIP_FAMILY_R580
: return "R580";
82 case CHIP_FAMILY_RV560
: return "RV560";
83 case CHIP_FAMILY_RV570
: return "RV570";
84 case CHIP_FAMILY_R600
: return "R600";
85 case CHIP_FAMILY_RV610
: return "RV610";
86 case CHIP_FAMILY_RV630
: return "RV630";
87 case CHIP_FAMILY_RV670
: return "RV670";
88 case CHIP_FAMILY_RV620
: return "RV620";
89 case CHIP_FAMILY_RV635
: return "RV635";
90 case CHIP_FAMILY_RS780
: return "RS780";
91 case CHIP_FAMILY_RS880
: return "RS880";
92 case CHIP_FAMILY_RV770
: return "RV770";
93 case CHIP_FAMILY_RV730
: return "RV730";
94 case CHIP_FAMILY_RV710
: return "RV710";
95 case CHIP_FAMILY_RV740
: return "RV740";
96 case CHIP_FAMILY_CEDAR
: return "CEDAR";
97 case CHIP_FAMILY_REDWOOD
: return "REDWOOD";
98 case CHIP_FAMILY_JUNIPER
: return "JUNIPER";
99 case CHIP_FAMILY_CYPRESS
: return "CYPRESS";
100 case CHIP_FAMILY_HEMLOCK
: return "HEMLOCK";
101 default: return "unknown";
106 /* Return various strings for glGetString().
108 static const GLubyte
*radeonGetString(struct gl_context
* ctx
, GLenum name
)
110 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
111 static char buffer
[128];
115 if (IS_R600_CLASS(radeon
->radeonScreen
))
116 return (GLubyte
*) "Advanced Micro Devices, Inc.";
117 else if (IS_R300_CLASS(radeon
->radeonScreen
))
118 return (GLubyte
*) "DRI R300 Project";
120 return (GLubyte
*) "Tungsten Graphics, Inc.";
125 GLuint agp_mode
= (radeon
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
126 radeon
->radeonScreen
->AGPMode
;
127 const char* chipclass
;
128 char hardwarename
[32];
130 if (IS_R600_CLASS(radeon
->radeonScreen
))
132 else if (IS_R300_CLASS(radeon
->radeonScreen
))
134 else if (IS_R200_CLASS(radeon
->radeonScreen
))
139 sprintf(hardwarename
, "%s (%s %04X)",
141 get_chip_family_name(radeon
->radeonScreen
->chip_family
),
142 radeon
->radeonScreen
->device_id
);
144 offset
= driGetRendererString(buffer
, hardwarename
, DRIVER_DATE
,
147 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
148 sprintf(&buffer
[offset
], " TCL");
149 } else if (IS_R300_CLASS(radeon
->radeonScreen
)) {
150 sprintf(&buffer
[offset
], " %sTCL",
151 (radeon
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)
154 sprintf(&buffer
[offset
], " %sTCL",
155 !(radeon
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
159 if (radeon
->radeonScreen
->driScreen
->dri2
.enabled
)
160 strcat(buffer
, " DRI2");
162 return (GLubyte
*) buffer
;
170 /* Initialize the driver's misc functions.
172 static void radeonInitDriverFuncs(struct dd_function_table
*functions
)
174 functions
->GetString
= radeonGetString
;
178 * Create and initialize all common fields of the context,
179 * including the Mesa context itself.
181 GLboolean
radeonInitContext(radeonContextPtr radeon
,
182 struct dd_function_table
* functions
,
183 const struct gl_config
* glVisual
,
184 __DRIcontext
* driContextPriv
,
185 void *sharedContextPrivate
)
187 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
188 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
189 struct gl_context
* ctx
;
190 struct gl_context
* shareCtx
;
193 /* Fill in additional standard functions. */
194 radeonInitDriverFuncs(functions
);
196 radeon
->radeonScreen
= screen
;
197 /* Allocate and initialize the Mesa context */
198 if (sharedContextPrivate
)
199 shareCtx
= ((radeonContextPtr
)sharedContextPrivate
)->glCtx
;
202 radeon
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
203 functions
, (void *)radeon
);
208 driContextPriv
->driverPrivate
= radeon
;
210 meta_init_metaops(ctx
, &radeon
->meta
);
212 _mesa_meta_init(ctx
);
215 radeon
->dri
.context
= driContextPriv
;
216 radeon
->dri
.screen
= sPriv
;
217 radeon
->dri
.hwContext
= driContextPriv
->hHWContext
;
218 radeon
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
219 radeon
->dri
.hwLockCount
= 0;
220 radeon
->dri
.fd
= sPriv
->fd
;
221 radeon
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
223 radeon
->sarea
= (drm_radeon_sarea_t
*) ((GLubyte
*) sPriv
->pSAREA
+
224 screen
->sarea_priv_offset
);
227 fthrottle_mode
= driQueryOptioni(&radeon
->optionCache
, "fthrottle_mode");
228 radeon
->iw
.irq_seq
= -1;
229 radeon
->irqsEmitted
= 0;
230 radeon
->do_irqs
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
&&
231 radeon
->radeonScreen
->irq
);
233 radeon
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
235 if (!radeon
->do_irqs
)
237 "IRQ's not enabled, falling back to %s: %d %d\n",
238 radeon
->do_usleeps
? "usleeps" : "busy waits",
239 fthrottle_mode
, radeon
->radeonScreen
->irq
);
241 radeon
->texture_depth
= driQueryOptioni (&radeon
->optionCache
,
243 if (radeon
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
244 radeon
->texture_depth
= ( glVisual
->rgbBits
> 16 ) ?
245 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
247 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
248 int chip_family
= radeon
->radeonScreen
->chip_family
;
249 if (chip_family
>= CHIP_FAMILY_CEDAR
) {
250 radeon
->texture_row_align
= 512;
251 radeon
->texture_rect_row_align
= 512;
252 radeon
->texture_compressed_row_align
= 512;
254 radeon
->texture_row_align
= 256;
255 radeon
->texture_rect_row_align
= 256;
256 radeon
->texture_compressed_row_align
= 256;
258 } else if (IS_R200_CLASS(radeon
->radeonScreen
) ||
259 IS_R100_CLASS(radeon
->radeonScreen
)) {
260 radeon
->texture_row_align
= 32;
261 radeon
->texture_rect_row_align
= 64;
262 radeon
->texture_compressed_row_align
= 32;
263 } else { /* R300 - not sure this is all correct */
264 int chip_family
= radeon
->radeonScreen
->chip_family
;
265 if (chip_family
== CHIP_FAMILY_RS600
||
266 chip_family
== CHIP_FAMILY_RS690
||
267 chip_family
== CHIP_FAMILY_RS740
)
268 radeon
->texture_row_align
= 64;
270 radeon
->texture_row_align
= 32;
271 radeon
->texture_rect_row_align
= 64;
272 radeon
->texture_compressed_row_align
= 32;
275 radeon_init_dma(radeon
);
283 * Destroy the command buffer and state atoms.
285 static void radeon_destroy_atom_list(radeonContextPtr radeon
)
287 struct radeon_state_atom
*atom
;
289 foreach(atom
, &radeon
->hw
.atomlist
) {
298 * Cleanup common context fields.
299 * Called by r200DestroyContext/r300DestroyContext
301 void radeonDestroyContext(__DRIcontext
*driContextPriv
)
303 #ifdef RADEON_BO_TRACK
306 GET_CURRENT_CONTEXT(ctx
);
307 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
308 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
312 _mesa_meta_free(radeon
->glCtx
);
314 if (radeon
== current
) {
315 _mesa_make_current(NULL
, NULL
, NULL
);
318 radeon_firevertices(radeon
);
319 if (!is_empty_list(&radeon
->dma
.reserved
)) {
320 rcommonFlushCmdBuf( radeon
, __FUNCTION__
);
323 radeonFreeDmaRegions(radeon
);
324 radeonReleaseArrays(radeon
->glCtx
, ~0);
325 meta_destroy_metaops(&radeon
->meta
);
326 if (radeon
->vtbl
.free_context
)
327 radeon
->vtbl
.free_context(radeon
->glCtx
);
328 _swsetup_DestroyContext( radeon
->glCtx
);
329 _tnl_DestroyContext( radeon
->glCtx
);
330 _vbo_DestroyContext( radeon
->glCtx
);
331 _swrast_DestroyContext( radeon
->glCtx
);
334 /* free the Mesa context */
335 _mesa_destroy_context(radeon
->glCtx
);
337 /* _mesa_destroy_context() might result in calls to functions that
338 * depend on the DriverCtx, so don't set it to NULL before.
340 * radeon->glCtx->DriverCtx = NULL;
342 /* free the option cache */
343 driDestroyOptionCache(&radeon
->optionCache
);
345 rcommonDestroyCmdBuf(radeon
);
347 radeon_destroy_atom_list(radeon
);
349 if (radeon
->state
.scissor
.pClipRects
) {
350 FREE(radeon
->state
.scissor
.pClipRects
);
351 radeon
->state
.scissor
.pClipRects
= 0;
353 #ifdef RADEON_BO_TRACK
354 track
= fopen("/tmp/tracklog", "w");
356 radeon_tracker_print(&radeon
->radeonScreen
->bom
->tracker
, track
);
363 /* Force the context `c' to be unbound from its buffer.
365 GLboolean
radeonUnbindContext(__DRIcontext
* driContextPriv
)
367 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
369 if (RADEON_DEBUG
& RADEON_DRI
)
370 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
,
373 /* Unset current context and dispath table */
374 _mesa_make_current(NULL
, NULL
, NULL
);
381 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon
,
382 struct radeon_framebuffer
*draw
)
384 /* if radeon->fake */
385 struct radeon_renderbuffer
*rb
;
387 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
389 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
390 radeon
->radeonScreen
->frontOffset
,
393 RADEON_GEM_DOMAIN_VRAM
,
396 rb
->cpp
= radeon
->radeonScreen
->cpp
;
397 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
399 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
401 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
402 radeon
->radeonScreen
->backOffset
,
405 RADEON_GEM_DOMAIN_VRAM
,
408 rb
->cpp
= radeon
->radeonScreen
->cpp
;
409 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
411 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
413 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
414 radeon
->radeonScreen
->depthOffset
,
417 RADEON_GEM_DOMAIN_VRAM
,
420 rb
->cpp
= radeon
->radeonScreen
->cpp
;
421 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
423 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
425 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
426 radeon
->radeonScreen
->depthOffset
,
429 RADEON_GEM_DOMAIN_VRAM
,
432 rb
->cpp
= radeon
->radeonScreen
->cpp
;
433 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
438 radeon_make_renderbuffer_current(radeonContextPtr radeon
,
439 struct radeon_framebuffer
*draw
)
441 int size
= 4096*4096*4;
442 /* if radeon->fake */
443 struct radeon_renderbuffer
*rb
;
445 if (radeon
->radeonScreen
->kernel_mm
) {
446 radeon_make_kernel_renderbuffer_current(radeon
, draw
);
451 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
453 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
454 radeon
->radeonScreen
->frontOffset
+
455 radeon
->radeonScreen
->fbLocation
,
458 RADEON_GEM_DOMAIN_VRAM
,
461 rb
->cpp
= radeon
->radeonScreen
->cpp
;
462 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
464 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
466 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
467 radeon
->radeonScreen
->backOffset
+
468 radeon
->radeonScreen
->fbLocation
,
471 RADEON_GEM_DOMAIN_VRAM
,
474 rb
->cpp
= radeon
->radeonScreen
->cpp
;
475 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
477 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
479 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
480 radeon
->radeonScreen
->depthOffset
+
481 radeon
->radeonScreen
->fbLocation
,
484 RADEON_GEM_DOMAIN_VRAM
,
487 rb
->cpp
= radeon
->radeonScreen
->cpp
;
488 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
490 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
492 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
493 radeon
->radeonScreen
->depthOffset
+
494 radeon
->radeonScreen
->fbLocation
,
497 RADEON_GEM_DOMAIN_VRAM
,
500 rb
->cpp
= radeon
->radeonScreen
->cpp
;
501 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
506 radeon_bits_per_pixel(const struct radeon_renderbuffer
*rb
)
508 return _mesa_get_format_bytes(rb
->base
.Format
) * 8;
512 * Check if drawable has been invalidated by dri2InvalidateDrawable().
513 * Update renderbuffers if so. This prevents a client from accessing
514 * a backbuffer that has a swap pending but not yet completed.
516 * See intel_prepare_render for equivalent code in intel driver.
519 void radeon_prepare_render(radeonContextPtr radeon
)
521 __DRIcontext
*driContext
= radeon
->dri
.context
;
522 __DRIdrawable
*drawable
;
524 struct radeon_framebuffer
*draw
;
526 screen
= driContext
->driScreenPriv
;
527 if (!screen
->dri2
.loader
)
530 drawable
= driContext
->driDrawablePriv
;
531 if (drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
532 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
533 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
535 /* Intel driver does the equivalent of this, no clue if it is needed:*/
536 draw
= drawable
->driverPrivate
;
537 radeon_draw_buffer(radeon
->glCtx
, &draw
->base
);
539 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
542 drawable
= driContext
->driReadablePriv
;
543 if (drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
544 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
545 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
546 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
549 /* If we're currently rendering to the front buffer, the rendering
550 * that will happen next will probably dirty the front buffer. So
551 * mark it as dirty here.
553 if (radeon
->is_front_buffer_rendering
)
554 radeon
->front_buffer_dirty
= GL_TRUE
;
558 radeon_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
,
559 GLboolean front_only
)
561 unsigned int attachments
[10];
562 __DRIbuffer
*buffers
= NULL
;
564 struct radeon_renderbuffer
*rb
;
566 struct radeon_framebuffer
*draw
;
567 radeonContextPtr radeon
;
569 struct radeon_bo
*depth_bo
= NULL
, *bo
;
571 if (RADEON_DEBUG
& RADEON_DRI
)
572 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
574 draw
= drawable
->driverPrivate
;
575 screen
= context
->driScreenPriv
;
576 radeon
= (radeonContextPtr
) context
->driverPrivate
;
578 /* Set this up front, so that in case our buffers get invalidated
579 * while we're getting new buffers, we don't clobber the stamp and
580 * thus ignore the invalidate. */
581 drawable
->lastStamp
= drawable
->dri2
.stamp
;
583 if (screen
->dri2
.loader
584 && (screen
->dri2
.loader
->base
.version
> 2)
585 && (screen
->dri2
.loader
->getBuffersWithFormat
!= NULL
)) {
586 struct radeon_renderbuffer
*depth_rb
;
587 struct radeon_renderbuffer
*stencil_rb
;
590 if ((front_only
|| radeon
->is_front_buffer_rendering
||
591 radeon
->is_front_buffer_reading
||
593 && draw
->color_rb
[0]) {
594 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
595 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[0]);
599 if (draw
->color_rb
[1]) {
600 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
601 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[1]);
604 depth_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
605 stencil_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
607 if ((depth_rb
!= NULL
) && (stencil_rb
!= NULL
)) {
608 attachments
[i
++] = __DRI_BUFFER_DEPTH_STENCIL
;
609 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
610 } else if (depth_rb
!= NULL
) {
611 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
612 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
613 } else if (stencil_rb
!= NULL
) {
614 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
615 attachments
[i
++] = radeon_bits_per_pixel(stencil_rb
);
619 buffers
= (*screen
->dri2
.loader
->getBuffersWithFormat
)(drawable
,
624 drawable
->loaderPrivate
);
625 } else if (screen
->dri2
.loader
) {
627 if (draw
->color_rb
[0])
628 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
630 if (draw
->color_rb
[1])
631 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
632 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
))
633 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
634 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
))
635 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
638 buffers
= (*screen
->dri2
.loader
->getBuffers
)(drawable
,
643 drawable
->loaderPrivate
);
649 /* set one cliprect to cover the whole drawable */
654 drawable
->numClipRects
= 1;
655 drawable
->pClipRects
[0].x1
= 0;
656 drawable
->pClipRects
[0].y1
= 0;
657 drawable
->pClipRects
[0].x2
= drawable
->w
;
658 drawable
->pClipRects
[0].y2
= drawable
->h
;
659 drawable
->numBackClipRects
= 1;
660 drawable
->pBackClipRects
[0].x1
= 0;
661 drawable
->pBackClipRects
[0].y1
= 0;
662 drawable
->pBackClipRects
[0].x2
= drawable
->w
;
663 drawable
->pBackClipRects
[0].y2
= drawable
->h
;
664 for (i
= 0; i
< count
; i
++) {
665 switch (buffers
[i
].attachment
) {
666 case __DRI_BUFFER_FRONT_LEFT
:
667 rb
= draw
->color_rb
[0];
668 regname
= "dri2 front buffer";
670 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
671 rb
= draw
->color_rb
[0];
672 regname
= "dri2 fake front buffer";
674 case __DRI_BUFFER_BACK_LEFT
:
675 rb
= draw
->color_rb
[1];
676 regname
= "dri2 back buffer";
678 case __DRI_BUFFER_DEPTH
:
679 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
680 regname
= "dri2 depth buffer";
682 case __DRI_BUFFER_DEPTH_STENCIL
:
683 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
684 regname
= "dri2 depth / stencil buffer";
686 case __DRI_BUFFER_STENCIL
:
687 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
688 regname
= "dri2 stencil buffer";
690 case __DRI_BUFFER_ACCUM
:
693 "unhandled buffer attach event, attacment type %d\n",
694 buffers
[i
].attachment
);
702 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
703 if (name
== buffers
[i
].name
)
707 if (RADEON_DEBUG
& RADEON_DRI
)
709 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
710 regname
, buffers
[i
].name
, buffers
[i
].attachment
,
711 buffers
[i
].cpp
, buffers
[i
].pitch
);
713 rb
->cpp
= buffers
[i
].cpp
;
714 rb
->pitch
= buffers
[i
].pitch
;
715 rb
->base
.Width
= drawable
->w
;
716 rb
->base
.Height
= drawable
->h
;
720 rb
->tile_config
= radeon
->radeonScreen
->tile_config
;
721 rb
->group_bytes
= radeon
->radeonScreen
->group_bytes
;
722 rb
->num_channels
= radeon
->radeonScreen
->num_channels
;
723 rb
->num_banks
= radeon
->radeonScreen
->num_banks
;
724 rb
->r7xx_bank_op
= radeon
->radeonScreen
->r7xx_bank_op
;
726 if (buffers
[i
].attachment
== __DRI_BUFFER_STENCIL
&& depth_bo
) {
727 if (RADEON_DEBUG
& RADEON_DRI
)
728 fprintf(stderr
, "(reusing depth buffer as stencil)\n");
732 uint32_t tiling_flags
= 0, pitch
= 0;
735 bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
739 RADEON_GEM_DOMAIN_VRAM
,
744 fprintf(stderr
, "failed to attach %s %d\n",
745 regname
, buffers
[i
].name
);
749 ret
= radeon_bo_get_tiling(bo
, &tiling_flags
, &pitch
);
750 if (tiling_flags
& RADEON_TILING_MACRO
)
751 bo
->flags
|= RADEON_BO_FLAGS_MACRO_TILE
;
752 if (tiling_flags
& RADEON_TILING_MICRO
)
753 bo
->flags
|= RADEON_BO_FLAGS_MICRO_TILE
;
757 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH
) {
758 if (draw
->base
.Visual
.depthBits
== 16)
763 radeon_renderbuffer_set_bo(rb
, bo
);
766 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH_STENCIL
) {
767 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
769 struct radeon_bo
*stencil_bo
= NULL
;
772 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
773 if (name
== buffers
[i
].name
)
778 radeon_bo_ref(stencil_bo
);
779 radeon_renderbuffer_set_bo(rb
, stencil_bo
);
780 radeon_bo_unref(stencil_bo
);
785 driUpdateFramebufferSize(radeon
->glCtx
, drawable
);
788 /* Force the context `c' to be the current context and associate with it
791 GLboolean
radeonMakeCurrent(__DRIcontext
* driContextPriv
,
792 __DRIdrawable
* driDrawPriv
,
793 __DRIdrawable
* driReadPriv
)
795 radeonContextPtr radeon
;
796 struct radeon_framebuffer
*drfb
;
797 struct gl_framebuffer
*readfb
;
799 if (!driContextPriv
) {
800 if (RADEON_DEBUG
& RADEON_DRI
)
801 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
802 _mesa_make_current(NULL
, NULL
, NULL
);
806 radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
807 drfb
= driDrawPriv
->driverPrivate
;
808 readfb
= driReadPriv
->driverPrivate
;
810 if (driContextPriv
->driScreenPriv
->dri2
.enabled
) {
811 radeon_update_renderbuffers(driContextPriv
, driDrawPriv
, GL_FALSE
);
812 if (driDrawPriv
!= driReadPriv
)
813 radeon_update_renderbuffers(driContextPriv
, driReadPriv
, GL_FALSE
);
814 _mesa_reference_renderbuffer(&radeon
->state
.color
.rb
,
815 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_BACK_LEFT
)->base
));
816 _mesa_reference_renderbuffer(&radeon
->state
.depth
.rb
,
817 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_DEPTH
)->base
));
819 radeon_make_renderbuffer_current(radeon
, drfb
);
822 if (RADEON_DEBUG
& RADEON_DRI
)
823 fprintf(stderr
, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__
, radeon
->glCtx
, drfb
, readfb
);
825 driUpdateFramebufferSize(radeon
->glCtx
, driDrawPriv
);
826 if (driReadPriv
!= driDrawPriv
)
827 driUpdateFramebufferSize(radeon
->glCtx
, driReadPriv
);
829 _mesa_make_current(radeon
->glCtx
, &drfb
->base
, readfb
);
831 _mesa_update_state(radeon
->glCtx
);
833 if (radeon
->glCtx
->DrawBuffer
== &drfb
->base
) {
834 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
836 driDrawPriv
->vblFlags
=
837 (radeon
->radeonScreen
->irq
!= 0)
838 ? driGetDefaultVBlankFlags(&radeon
->
840 : VBLANK_FLAG_NO_IRQ
;
842 driDrawableInitVBlank(driDrawPriv
);
843 drfb
->vbl_waited
= driDrawPriv
->vblSeq
;
845 for (i
= 0; i
< 2; i
++) {
846 if (drfb
->color_rb
[i
])
847 drfb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
852 radeon_window_moved(radeon
);
853 radeon_draw_buffer(radeon
->glCtx
, &drfb
->base
);
857 if (RADEON_DEBUG
& RADEON_DRI
)
858 fprintf(stderr
, "End %s\n", __FUNCTION__
);