1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
39 #include "drirenderbuffer.h"
40 #include "drivers/common/meta.h"
41 #include "main/context.h"
42 #include "main/framebuffer.h"
43 #include "main/renderbuffer.h"
44 #include "main/state.h"
45 #include "main/simple_list.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
50 #if defined(RADEON_R600)
51 #include "r600_context.h"
54 #define DRIVER_DATE "20090101"
57 int RADEON_DEBUG
= (0);
61 static const char* get_chip_family_name(int chip_family
)
64 case CHIP_FAMILY_R100
: return "R100";
65 case CHIP_FAMILY_RV100
: return "RV100";
66 case CHIP_FAMILY_RS100
: return "RS100";
67 case CHIP_FAMILY_RV200
: return "RV200";
68 case CHIP_FAMILY_RS200
: return "RS200";
69 case CHIP_FAMILY_R200
: return "R200";
70 case CHIP_FAMILY_RV250
: return "RV250";
71 case CHIP_FAMILY_RS300
: return "RS300";
72 case CHIP_FAMILY_RV280
: return "RV280";
73 case CHIP_FAMILY_R300
: return "R300";
74 case CHIP_FAMILY_R350
: return "R350";
75 case CHIP_FAMILY_RV350
: return "RV350";
76 case CHIP_FAMILY_RV380
: return "RV380";
77 case CHIP_FAMILY_R420
: return "R420";
78 case CHIP_FAMILY_RV410
: return "RV410";
79 case CHIP_FAMILY_RS400
: return "RS400";
80 case CHIP_FAMILY_RS600
: return "RS600";
81 case CHIP_FAMILY_RS690
: return "RS690";
82 case CHIP_FAMILY_RS740
: return "RS740";
83 case CHIP_FAMILY_RV515
: return "RV515";
84 case CHIP_FAMILY_R520
: return "R520";
85 case CHIP_FAMILY_RV530
: return "RV530";
86 case CHIP_FAMILY_R580
: return "R580";
87 case CHIP_FAMILY_RV560
: return "RV560";
88 case CHIP_FAMILY_RV570
: return "RV570";
89 case CHIP_FAMILY_R600
: return "R600";
90 case CHIP_FAMILY_RV610
: return "RV610";
91 case CHIP_FAMILY_RV630
: return "RV630";
92 case CHIP_FAMILY_RV670
: return "RV670";
93 case CHIP_FAMILY_RV620
: return "RV620";
94 case CHIP_FAMILY_RV635
: return "RV635";
95 case CHIP_FAMILY_RS780
: return "RS780";
96 case CHIP_FAMILY_RS880
: return "RS880";
97 case CHIP_FAMILY_RV770
: return "RV770";
98 case CHIP_FAMILY_RV730
: return "RV730";
99 case CHIP_FAMILY_RV710
: return "RV710";
100 case CHIP_FAMILY_RV740
: return "RV740";
101 default: return "unknown";
106 /* Return various strings for glGetString().
108 static const GLubyte
*radeonGetString(GLcontext
* ctx
, GLenum name
)
110 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
111 static char buffer
[128];
115 if (IS_R600_CLASS(radeon
->radeonScreen
))
116 return (GLubyte
*) "Advanced Micro Devices, Inc.";
117 else if (IS_R300_CLASS(radeon
->radeonScreen
))
118 return (GLubyte
*) "DRI R300 Project";
120 return (GLubyte
*) "Tungsten Graphics, Inc.";
125 GLuint agp_mode
= (radeon
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
126 radeon
->radeonScreen
->AGPMode
;
127 const char* chipclass
;
128 char hardwarename
[32];
130 if (IS_R600_CLASS(radeon
->radeonScreen
))
132 else if (IS_R300_CLASS(radeon
->radeonScreen
))
134 else if (IS_R200_CLASS(radeon
->radeonScreen
))
139 sprintf(hardwarename
, "%s (%s %04X)",
141 get_chip_family_name(radeon
->radeonScreen
->chip_family
),
142 radeon
->radeonScreen
->device_id
);
144 offset
= driGetRendererString(buffer
, hardwarename
, DRIVER_DATE
,
147 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
148 sprintf(&buffer
[offset
], " TCL");
149 } else if (IS_R300_CLASS(radeon
->radeonScreen
)) {
150 sprintf(&buffer
[offset
], " %sTCL",
151 (radeon
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)
154 sprintf(&buffer
[offset
], " %sTCL",
155 !(radeon
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
159 if (radeon
->radeonScreen
->driScreen
->dri2
.enabled
)
160 strcat(buffer
, " DRI2");
162 return (GLubyte
*) buffer
;
170 /* Initialize the driver's misc functions.
172 static void radeonInitDriverFuncs(struct dd_function_table
*functions
)
174 functions
->GetString
= radeonGetString
;
178 * Create and initialize all common fields of the context,
179 * including the Mesa context itself.
181 GLboolean
radeonInitContext(radeonContextPtr radeon
,
182 struct dd_function_table
* functions
,
183 const __GLcontextModes
* glVisual
,
184 __DRIcontextPrivate
* driContextPriv
,
185 void *sharedContextPrivate
)
187 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
188 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
193 /* Fill in additional standard functions. */
194 radeonInitDriverFuncs(functions
);
196 radeon
->radeonScreen
= screen
;
197 /* Allocate and initialize the Mesa context */
198 if (sharedContextPrivate
)
199 shareCtx
= ((radeonContextPtr
)sharedContextPrivate
)->glCtx
;
202 radeon
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
203 functions
, (void *)radeon
);
208 driContextPriv
->driverPrivate
= radeon
;
210 meta_init_metaops(ctx
, &radeon
->meta
);
212 _mesa_meta_init(ctx
);
215 radeon
->dri
.context
= driContextPriv
;
216 radeon
->dri
.screen
= sPriv
;
217 radeon
->dri
.hwContext
= driContextPriv
->hHWContext
;
218 radeon
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
219 radeon
->dri
.hwLockCount
= 0;
220 radeon
->dri
.fd
= sPriv
->fd
;
221 radeon
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
223 radeon
->sarea
= (drm_radeon_sarea_t
*) ((GLubyte
*) sPriv
->pSAREA
+
224 screen
->sarea_priv_offset
);
227 fthrottle_mode
= driQueryOptioni(&radeon
->optionCache
, "fthrottle_mode");
228 radeon
->iw
.irq_seq
= -1;
229 radeon
->irqsEmitted
= 0;
230 radeon
->do_irqs
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
&&
231 radeon
->radeonScreen
->irq
);
233 radeon
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
235 if (!radeon
->do_irqs
)
237 "IRQ's not enabled, falling back to %s: %d %d\n",
238 radeon
->do_usleeps
? "usleeps" : "busy waits",
239 fthrottle_mode
, radeon
->radeonScreen
->irq
);
241 radeon
->texture_depth
= driQueryOptioni (&radeon
->optionCache
,
243 if (radeon
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
244 radeon
->texture_depth
= ( glVisual
->rgbBits
> 16 ) ?
245 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
247 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
248 radeon
->texture_row_align
= 256;
249 radeon
->texture_rect_row_align
= 256;
250 radeon
->texture_compressed_row_align
= 256;
251 } else if (IS_R200_CLASS(radeon
->radeonScreen
) ||
252 IS_R100_CLASS(radeon
->radeonScreen
)) {
253 radeon
->texture_row_align
= 32;
254 radeon
->texture_rect_row_align
= 64;
255 radeon
->texture_compressed_row_align
= 32;
256 } else { /* R300 - not sure this is all correct */
257 int chip_family
= radeon
->radeonScreen
->chip_family
;
258 if (chip_family
== CHIP_FAMILY_RS600
||
259 chip_family
== CHIP_FAMILY_RS690
||
260 chip_family
== CHIP_FAMILY_RS740
)
261 radeon
->texture_row_align
= 64;
263 radeon
->texture_row_align
= 32;
264 radeon
->texture_rect_row_align
= 64;
265 radeon
->texture_compressed_row_align
= 32;
268 radeon_init_dma(radeon
);
276 * Destroy the command buffer and state atoms.
278 static void radeon_destroy_atom_list(radeonContextPtr radeon
)
280 struct radeon_state_atom
*atom
;
282 foreach(atom
, &radeon
->hw
.atomlist
) {
291 * Cleanup common context fields.
292 * Called by r200DestroyContext/r300DestroyContext
294 void radeonDestroyContext(__DRIcontextPrivate
*driContextPriv
)
296 #ifdef RADEON_BO_TRACK
299 GET_CURRENT_CONTEXT(ctx
);
300 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
301 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
305 _mesa_meta_free(radeon
->glCtx
);
307 if (radeon
== current
) {
308 radeon_firevertices(radeon
);
309 _mesa_make_current(NULL
, NULL
, NULL
);
312 if (!is_empty_list(&radeon
->dma
.reserved
)) {
313 rcommonFlushCmdBuf( radeon
, __FUNCTION__
);
316 radeonFreeDmaRegions(radeon
);
317 radeonReleaseArrays(radeon
->glCtx
, ~0);
318 meta_destroy_metaops(&radeon
->meta
);
319 if (radeon
->vtbl
.free_context
)
320 radeon
->vtbl
.free_context(radeon
->glCtx
);
321 _swsetup_DestroyContext( radeon
->glCtx
);
322 _tnl_DestroyContext( radeon
->glCtx
);
323 _vbo_DestroyContext( radeon
->glCtx
);
324 _swrast_DestroyContext( radeon
->glCtx
);
327 /* free the Mesa context */
328 _mesa_destroy_context(radeon
->glCtx
);
330 /* _mesa_destroy_context() might result in calls to functions that
331 * depend on the DriverCtx, so don't set it to NULL before.
333 * radeon->glCtx->DriverCtx = NULL;
335 /* free the option cache */
336 driDestroyOptionCache(&radeon
->optionCache
);
338 rcommonDestroyCmdBuf(radeon
);
340 radeon_destroy_atom_list(radeon
);
342 if (radeon
->state
.scissor
.pClipRects
) {
343 FREE(radeon
->state
.scissor
.pClipRects
);
344 radeon
->state
.scissor
.pClipRects
= 0;
346 #ifdef RADEON_BO_TRACK
347 track
= fopen("/tmp/tracklog", "w");
349 radeon_tracker_print(&radeon
->radeonScreen
->bom
->tracker
, track
);
356 /* Force the context `c' to be unbound from its buffer.
358 GLboolean
radeonUnbindContext(__DRIcontextPrivate
* driContextPriv
)
360 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
362 if (RADEON_DEBUG
& RADEON_DRI
)
363 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
,
371 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon
,
372 struct radeon_framebuffer
*draw
)
374 /* if radeon->fake */
375 struct radeon_renderbuffer
*rb
;
377 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
379 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
380 radeon
->radeonScreen
->frontOffset
,
383 RADEON_GEM_DOMAIN_VRAM
,
386 rb
->cpp
= radeon
->radeonScreen
->cpp
;
387 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
389 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
391 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
392 radeon
->radeonScreen
->backOffset
,
395 RADEON_GEM_DOMAIN_VRAM
,
398 rb
->cpp
= radeon
->radeonScreen
->cpp
;
399 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
401 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
403 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
404 radeon
->radeonScreen
->depthOffset
,
407 RADEON_GEM_DOMAIN_VRAM
,
410 rb
->cpp
= radeon
->radeonScreen
->cpp
;
411 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
413 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
415 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
416 radeon
->radeonScreen
->depthOffset
,
419 RADEON_GEM_DOMAIN_VRAM
,
422 rb
->cpp
= radeon
->radeonScreen
->cpp
;
423 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
428 radeon_make_renderbuffer_current(radeonContextPtr radeon
,
429 struct radeon_framebuffer
*draw
)
431 int size
= 4096*4096*4;
432 /* if radeon->fake */
433 struct radeon_renderbuffer
*rb
;
435 if (radeon
->radeonScreen
->kernel_mm
) {
436 radeon_make_kernel_renderbuffer_current(radeon
, draw
);
441 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
443 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
444 radeon
->radeonScreen
->frontOffset
+
445 radeon
->radeonScreen
->fbLocation
,
448 RADEON_GEM_DOMAIN_VRAM
,
451 rb
->cpp
= radeon
->radeonScreen
->cpp
;
452 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
454 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
456 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
457 radeon
->radeonScreen
->backOffset
+
458 radeon
->radeonScreen
->fbLocation
,
461 RADEON_GEM_DOMAIN_VRAM
,
464 rb
->cpp
= radeon
->radeonScreen
->cpp
;
465 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
467 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
469 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
470 radeon
->radeonScreen
->depthOffset
+
471 radeon
->radeonScreen
->fbLocation
,
474 RADEON_GEM_DOMAIN_VRAM
,
477 rb
->cpp
= radeon
->radeonScreen
->cpp
;
478 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
480 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
482 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
483 radeon
->radeonScreen
->depthOffset
+
484 radeon
->radeonScreen
->fbLocation
,
487 RADEON_GEM_DOMAIN_VRAM
,
490 rb
->cpp
= radeon
->radeonScreen
->cpp
;
491 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
496 radeon_bits_per_pixel(const struct radeon_renderbuffer
*rb
)
498 return _mesa_get_format_bytes(rb
->base
.Format
) * 8;
502 radeon_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
)
504 unsigned int attachments
[10];
505 __DRIbuffer
*buffers
= NULL
;
507 struct radeon_renderbuffer
*rb
;
509 struct radeon_framebuffer
*draw
;
510 radeonContextPtr radeon
;
512 struct radeon_bo
*depth_bo
= NULL
, *bo
;
514 if (RADEON_DEBUG
& RADEON_DRI
)
515 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
517 draw
= drawable
->driverPrivate
;
518 screen
= context
->driScreenPriv
;
519 radeon
= (radeonContextPtr
) context
->driverPrivate
;
521 if (screen
->dri2
.loader
522 && (screen
->dri2
.loader
->base
.version
> 2)
523 && (screen
->dri2
.loader
->getBuffersWithFormat
!= NULL
)) {
524 struct radeon_renderbuffer
*depth_rb
;
525 struct radeon_renderbuffer
*stencil_rb
;
528 if ((radeon
->is_front_buffer_rendering
||
529 radeon
->is_front_buffer_reading
||
531 && draw
->color_rb
[0]) {
532 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
533 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[0]);
536 if (draw
->color_rb
[1]) {
537 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
538 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[1]);
541 depth_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
542 stencil_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
544 if ((depth_rb
!= NULL
) && (stencil_rb
!= NULL
)) {
545 attachments
[i
++] = __DRI_BUFFER_DEPTH_STENCIL
;
546 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
547 } else if (depth_rb
!= NULL
) {
548 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
549 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
550 } else if (stencil_rb
!= NULL
) {
551 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
552 attachments
[i
++] = radeon_bits_per_pixel(stencil_rb
);
555 buffers
= (*screen
->dri2
.loader
->getBuffersWithFormat
)(drawable
,
560 drawable
->loaderPrivate
);
561 } else if (screen
->dri2
.loader
) {
563 if (draw
->color_rb
[0])
564 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
565 if (draw
->color_rb
[1])
566 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
567 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
))
568 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
569 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
))
570 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
572 buffers
= (*screen
->dri2
.loader
->getBuffers
)(drawable
,
577 drawable
->loaderPrivate
);
583 /* set one cliprect to cover the whole drawable */
588 drawable
->numClipRects
= 1;
589 drawable
->pClipRects
[0].x1
= 0;
590 drawable
->pClipRects
[0].y1
= 0;
591 drawable
->pClipRects
[0].x2
= drawable
->w
;
592 drawable
->pClipRects
[0].y2
= drawable
->h
;
593 drawable
->numBackClipRects
= 1;
594 drawable
->pBackClipRects
[0].x1
= 0;
595 drawable
->pBackClipRects
[0].y1
= 0;
596 drawable
->pBackClipRects
[0].x2
= drawable
->w
;
597 drawable
->pBackClipRects
[0].y2
= drawable
->h
;
598 for (i
= 0; i
< count
; i
++) {
599 switch (buffers
[i
].attachment
) {
600 case __DRI_BUFFER_FRONT_LEFT
:
601 rb
= draw
->color_rb
[0];
602 regname
= "dri2 front buffer";
604 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
605 rb
= draw
->color_rb
[0];
606 regname
= "dri2 fake front buffer";
608 case __DRI_BUFFER_BACK_LEFT
:
609 rb
= draw
->color_rb
[1];
610 regname
= "dri2 back buffer";
612 case __DRI_BUFFER_DEPTH
:
613 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
614 regname
= "dri2 depth buffer";
616 case __DRI_BUFFER_DEPTH_STENCIL
:
617 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
618 regname
= "dri2 depth / stencil buffer";
620 case __DRI_BUFFER_STENCIL
:
621 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
622 regname
= "dri2 stencil buffer";
624 case __DRI_BUFFER_ACCUM
:
627 "unhandled buffer attach event, attacment type %d\n",
628 buffers
[i
].attachment
);
636 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
637 if (name
== buffers
[i
].name
)
641 if (RADEON_DEBUG
& RADEON_DRI
)
643 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
644 regname
, buffers
[i
].name
, buffers
[i
].attachment
,
645 buffers
[i
].cpp
, buffers
[i
].pitch
);
647 rb
->cpp
= buffers
[i
].cpp
;
648 rb
->pitch
= buffers
[i
].pitch
;
649 rb
->base
.Width
= drawable
->w
;
650 rb
->base
.Height
= drawable
->h
;
653 if (buffers
[i
].attachment
== __DRI_BUFFER_STENCIL
&& depth_bo
) {
654 if (RADEON_DEBUG
& RADEON_DRI
)
655 fprintf(stderr
, "(reusing depth buffer as stencil)\n");
659 uint32_t tiling_flags
= 0, pitch
= 0;
662 bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
666 RADEON_GEM_DOMAIN_VRAM
,
671 fprintf(stderr
, "failed to attach %s %d\n",
672 regname
, buffers
[i
].name
);
676 ret
= radeon_bo_get_tiling(bo
, &tiling_flags
, &pitch
);
677 if (tiling_flags
& RADEON_TILING_MACRO
)
678 bo
->flags
|= RADEON_BO_FLAGS_MACRO_TILE
;
679 if (tiling_flags
& RADEON_TILING_MICRO
)
680 bo
->flags
|= RADEON_BO_FLAGS_MICRO_TILE
;
684 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH
) {
685 if (draw
->base
.Visual
.depthBits
== 16)
690 radeon_renderbuffer_set_bo(rb
, bo
);
693 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH_STENCIL
) {
694 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
696 struct radeon_bo
*stencil_bo
= NULL
;
699 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
700 if (name
== buffers
[i
].name
)
705 radeon_bo_ref(stencil_bo
);
706 radeon_renderbuffer_set_bo(rb
, stencil_bo
);
707 radeon_bo_unref(stencil_bo
);
712 driUpdateFramebufferSize(radeon
->glCtx
, drawable
);
715 /* Force the context `c' to be the current context and associate with it
718 GLboolean
radeonMakeCurrent(__DRIcontextPrivate
* driContextPriv
,
719 __DRIdrawablePrivate
* driDrawPriv
,
720 __DRIdrawablePrivate
* driReadPriv
)
722 radeonContextPtr radeon
;
723 struct radeon_framebuffer
*drfb
;
724 struct gl_framebuffer
*readfb
;
726 if (!driContextPriv
) {
727 if (RADEON_DEBUG
& RADEON_DRI
)
728 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
729 _mesa_make_current(NULL
, NULL
, NULL
);
733 radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
734 drfb
= driDrawPriv
->driverPrivate
;
735 readfb
= driReadPriv
->driverPrivate
;
737 if (driContextPriv
->driScreenPriv
->dri2
.enabled
) {
738 radeon_update_renderbuffers(driContextPriv
, driDrawPriv
);
739 if (driDrawPriv
!= driReadPriv
)
740 radeon_update_renderbuffers(driContextPriv
, driReadPriv
);
741 _mesa_reference_renderbuffer(&radeon
->state
.color
.rb
,
742 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_BACK_LEFT
)->base
));
743 _mesa_reference_renderbuffer(&radeon
->state
.depth
.rb
,
744 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_DEPTH
)->base
));
746 radeon_make_renderbuffer_current(radeon
, drfb
);
749 if (RADEON_DEBUG
& RADEON_DRI
)
750 fprintf(stderr
, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__
, radeon
->glCtx
, drfb
, readfb
);
752 driUpdateFramebufferSize(radeon
->glCtx
, driDrawPriv
);
753 if (driReadPriv
!= driDrawPriv
)
754 driUpdateFramebufferSize(radeon
->glCtx
, driReadPriv
);
756 _mesa_make_current(radeon
->glCtx
, &drfb
->base
, readfb
);
758 _mesa_update_state(radeon
->glCtx
);
760 if (radeon
->glCtx
->DrawBuffer
== &drfb
->base
) {
761 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
763 driDrawPriv
->vblFlags
=
764 (radeon
->radeonScreen
->irq
!= 0)
765 ? driGetDefaultVBlankFlags(&radeon
->
767 : VBLANK_FLAG_NO_IRQ
;
769 driDrawableInitVBlank(driDrawPriv
);
770 drfb
->vbl_waited
= driDrawPriv
->vblSeq
;
772 for (i
= 0; i
< 2; i
++) {
773 if (drfb
->color_rb
[i
])
774 drfb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
779 radeon_window_moved(radeon
);
780 radeon_draw_buffer(radeon
->glCtx
, &drfb
->base
);
784 if (RADEON_DEBUG
& RADEON_DRI
)
785 fprintf(stderr
, "End %s\n", __FUNCTION__
);