1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
45 #include "framebuffer.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
52 #include "tnl/t_pipeline.h"
54 #include "drivers/common/driverfuncs.h"
56 #include "radeon_context.h"
57 #include "radeon_ioctl.h"
58 #include "radeon_state.h"
59 #include "radeon_span.h"
60 #include "radeon_tex.h"
61 #include "radeon_swtcl.h"
62 #include "radeon_tcl.h"
63 #include "radeon_vtxfmt.h"
64 #include "radeon_maos.h"
66 #define need_GL_ARB_multisample
67 #define need_GL_ARB_texture_compression
68 #define need_GL_EXT_blend_minmax
69 #define need_GL_EXT_fog_coord
70 #define need_GL_EXT_secondary_color
71 #include "extension_helper.h"
73 #define DRIVER_DATE "20060327"
77 #include "xmlpool.h" /* for symbolic values of enum-type options */
79 int RADEON_DEBUG
= (0);
83 /* Return the width and height of the given buffer.
85 static void radeonGetBufferSize( GLframebuffer
*buffer
,
86 GLuint
*width
, GLuint
*height
)
88 GET_CURRENT_CONTEXT(ctx
);
89 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
91 LOCK_HARDWARE( rmesa
);
92 *width
= rmesa
->dri
.drawable
->w
;
93 *height
= rmesa
->dri
.drawable
->h
;
95 UNLOCK_HARDWARE( rmesa
);
98 /* Return various strings for glGetString().
100 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
102 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
103 static char buffer
[128];
105 GLuint agp_mode
= (rmesa
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
106 rmesa
->radeonScreen
->AGPMode
;
110 return (GLubyte
*)"Tungsten Graphics, Inc.";
113 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
116 sprintf( & buffer
[ offset
], " %sTCL",
117 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
120 return (GLubyte
*)buffer
;
128 /* Extension strings exported by the R100 driver.
130 const struct dri_extension card_extensions
[] =
132 { "GL_ARB_multisample", GL_ARB_multisample_functions
},
133 { "GL_ARB_multitexture", NULL
},
134 { "GL_ARB_texture_border_clamp", NULL
},
135 { "GL_ARB_texture_compression", GL_ARB_texture_compression_functions
},
136 { "GL_ARB_texture_env_add", NULL
},
137 { "GL_ARB_texture_env_combine", NULL
},
138 { "GL_ARB_texture_env_crossbar", NULL
},
139 { "GL_ARB_texture_env_dot3", NULL
},
140 { "GL_ARB_texture_mirrored_repeat", NULL
},
141 { "GL_EXT_blend_logic_op", NULL
},
142 { "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions
},
143 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions
},
144 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions
},
145 { "GL_EXT_stencil_wrap", NULL
},
146 { "GL_EXT_texture_edge_clamp", NULL
},
147 { "GL_EXT_texture_env_combine", NULL
},
148 { "GL_EXT_texture_env_dot3", NULL
},
149 { "GL_EXT_texture_filter_anisotropic", NULL
},
150 { "GL_EXT_texture_lod_bias", NULL
},
151 { "GL_EXT_texture_mirror_clamp", NULL
},
152 { "GL_ATI_texture_env_combine3", NULL
},
153 { "GL_ATI_texture_mirror_once", NULL
},
154 { "GL_MESA_ycbcr_texture", NULL
},
155 { "GL_NV_blend_square", NULL
},
156 { "GL_SGIS_generate_mipmap", NULL
},
160 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
161 extern const struct tnl_pipeline_stage _radeon_render_stage
;
162 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
164 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
166 /* Try and go straight to t&l
170 /* Catch any t&l fallbacks
172 &_tnl_vertex_transform_stage
,
173 &_tnl_normal_transform_stage
,
174 &_tnl_lighting_stage
,
175 &_tnl_fog_coordinate_stage
,
177 &_tnl_texture_transform_stage
,
179 /* Scale texture rectangle to 0..1.
181 &_radeon_texrect_stage
,
183 &_radeon_render_stage
,
184 &_tnl_render_stage
, /* FALLBACK: */
190 /* Initialize the driver's misc functions.
192 static void radeonInitDriverFuncs( struct dd_function_table
*functions
)
194 functions
->GetBufferSize
= radeonGetBufferSize
;
195 functions
->ResizeBuffers
= _mesa_resize_framebuffer
;
196 functions
->GetString
= radeonGetString
;
199 static const struct dri_debug_control debug_control
[] =
201 { "fall", DEBUG_FALLBACKS
},
202 { "tex", DEBUG_TEXTURE
},
203 { "ioctl", DEBUG_IOCTL
},
204 { "prim", DEBUG_PRIMS
},
205 { "vert", DEBUG_VERTS
},
206 { "state", DEBUG_STATE
},
207 { "code", DEBUG_CODEGEN
},
208 { "vfmt", DEBUG_VFMT
},
209 { "vtxf", DEBUG_VFMT
},
210 { "verb", DEBUG_VERBOSE
},
211 { "dri", DEBUG_DRI
},
212 { "dma", DEBUG_DMA
},
213 { "san", DEBUG_SANITY
},
214 { "sync", DEBUG_SYNC
},
219 /* Create the device specific context.
222 radeonCreateContext( const __GLcontextModes
*glVisual
,
223 __DRIcontextPrivate
*driContextPriv
,
224 void *sharedContextPrivate
)
226 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
227 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
228 struct dd_function_table functions
;
229 radeonContextPtr rmesa
;
230 GLcontext
*ctx
, *shareCtx
;
232 int tcl_mode
, fthrottle_mode
;
235 assert(driContextPriv
);
238 /* Allocate the Radeon context */
239 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
243 /* init exp fog table data */
244 radeonInitStaticFogData();
246 /* Parse configuration files.
247 * Do this here so that initialMaxAnisotropy is set before we create
248 * the default textures.
250 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
251 screen
->driScreen
->myNum
, "radeon");
252 rmesa
->initialMaxAnisotropy
= driQueryOptionf(&rmesa
->optionCache
,
253 "def_max_anisotropy");
255 if ( driQueryOptionb( &rmesa
->optionCache
, "hyperz" ) ) {
256 if ( sPriv
->drmMinor
< 13 )
257 fprintf( stderr
, "DRM version 1.%d too old to support HyperZ, "
258 "disabling.\n",sPriv
->drmMinor
);
260 rmesa
->using_hyperz
= GL_TRUE
;
263 if ( sPriv
->drmMinor
>= 15 )
264 rmesa
->texmicrotile
= GL_TRUE
;
266 /* Init default driver functions then plug in our Radeon-specific functions
267 * (the texture functions are especially important)
269 _mesa_init_driver_functions( &functions
);
270 radeonInitDriverFuncs( &functions
);
271 radeonInitTextureFuncs( &functions
);
273 /* Allocate the Mesa context */
274 if (sharedContextPrivate
)
275 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
278 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
279 &functions
, (void *) rmesa
);
284 driContextPriv
->driverPrivate
= rmesa
;
286 /* Init radeon context data */
287 rmesa
->dri
.context
= driContextPriv
;
288 rmesa
->dri
.screen
= sPriv
;
289 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
290 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
291 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
292 rmesa
->dri
.fd
= sPriv
->fd
;
293 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
295 rmesa
->radeonScreen
= screen
;
296 rmesa
->sarea
= (drm_radeon_sarea_t
*)((GLubyte
*)sPriv
->pSAREA
+
297 screen
->sarea_priv_offset
);
300 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
302 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
303 make_empty_list( & rmesa
->swapped
);
305 rmesa
->nr_heaps
= screen
->numTexHeaps
;
306 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
307 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
310 RADEON_NR_TEX_REGIONS
,
311 (drmTextureRegionPtr
)rmesa
->sarea
->tex_list
[i
],
312 & rmesa
->sarea
->tex_age
[i
],
314 sizeof( radeonTexObj
),
315 (destroy_texture_object_t
*) radeonDestroyTexObj
);
317 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
318 & rmesa
->c_textureSwaps
);
320 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
322 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
323 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
324 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
326 rmesa
->swtcl
.RenderIndex
= ~0;
327 rmesa
->hw
.all_dirty
= GL_TRUE
;
329 /* Set the maximum texture size small enough that we can guarentee that
330 * all texture units can bind a maximal texture and have all of them in
331 * texturable memory at once. Depending on the allow_large_textures driconf
332 * setting allow larger textures.
336 ctx
->Const
.MaxTextureUnits
= driQueryOptioni (&rmesa
->optionCache
,
338 ctx
->Const
.MaxTextureImageUnits
= ctx
->Const
.MaxTextureUnits
;
339 ctx
->Const
.MaxTextureCoordUnits
= ctx
->Const
.MaxTextureUnits
;
341 i
= driQueryOptioni( &rmesa
->optionCache
, "allow_large_textures");
343 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
347 11, /* max 2D texture size is 2048x2048 */
349 9, /* \todo: max cube texture size seems to be 512x512(x6) */
350 11, /* max rect texture size is 2048x2048. */
356 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
360 ctx
->Const
.MinPointSize
= 1.0;
361 ctx
->Const
.MinPointSizeAA
= 1.0;
362 ctx
->Const
.MaxPointSize
= 1.0;
363 ctx
->Const
.MaxPointSizeAA
= 1.0;
365 ctx
->Const
.MinLineWidth
= 1.0;
366 ctx
->Const
.MinLineWidthAA
= 1.0;
367 ctx
->Const
.MaxLineWidth
= 10.0;
368 ctx
->Const
.MaxLineWidthAA
= 10.0;
369 ctx
->Const
.LineWidthGranularity
= 0.0625;
371 /* Set maxlocksize (and hence vb size) small enough to avoid
372 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
373 * fit in a single dma buffer for indexed rendering of quad strips,
376 ctx
->Const
.MaxArrayLockSize
=
377 MIN2( ctx
->Const
.MaxArrayLockSize
,
378 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
382 /* Initialize the software rasterizer and helper modules.
384 _swrast_CreateContext( ctx
);
385 _ac_CreateContext( ctx
);
386 _tnl_CreateContext( ctx
);
387 _swsetup_CreateContext( ctx
);
388 _ae_create_context( ctx
);
390 /* Install the customized pipeline:
392 _tnl_destroy_pipeline( ctx
);
393 _tnl_install_pipeline( ctx
, radeon_pipeline
);
394 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
396 /* Try and keep materials and vertices separate:
398 _tnl_isolate_materials( ctx
, GL_TRUE
);
400 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
402 /* Configure swrast and T&L to match hardware characteristics:
404 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
405 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
406 _tnl_allow_pixel_fog( ctx
, GL_FALSE
);
407 _tnl_allow_vertex_fog( ctx
, GL_TRUE
);
410 for ( i
= 0 ; i
< RADEON_MAX_TEXTURE_UNITS
; i
++ ) {
411 _math_matrix_ctr( &rmesa
->TexGenMatrix
[i
] );
412 _math_matrix_ctr( &rmesa
->tmpmat
[i
] );
413 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[i
] );
414 _math_matrix_set_identity( &rmesa
->tmpmat
[i
] );
417 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
418 if (rmesa
->radeonScreen
->drmSupportsCubeMapsR100
)
419 _mesa_enable_extension( ctx
, "GL_ARB_texture_cube_map" );
420 if (rmesa
->glCtx
->Mesa_DXTn
) {
421 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
422 _mesa_enable_extension( ctx
, "GL_S3_s3tc" );
424 else if (driQueryOptionb (&rmesa
->optionCache
, "force_s3tc_enable")) {
425 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
428 if (rmesa
->dri
.drmMinor
>= 9)
429 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
431 /* XXX these should really go right after _mesa_init_driver_functions() */
432 radeonInitIoctlFuncs( ctx
);
433 radeonInitStateFuncs( ctx
);
434 radeonInitSpanFuncs( ctx
);
435 radeonInitState( rmesa
);
436 radeonInitSwtcl( ctx
);
438 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
439 ctx
->Const
.MaxArrayLockSize
, 32 );
441 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
442 rmesa
->iw
.irq_seq
= -1;
443 rmesa
->irqsEmitted
= 0;
444 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
445 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
447 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
449 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
450 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
452 (*dri_interface
->getUST
)( & rmesa
->swap_ust
);
456 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
460 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
461 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
462 fprintf(stderr
, "disabling 3D acceleration\n");
463 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
464 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
465 !(rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)) {
466 if (rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
467 rmesa
->radeonScreen
->chip_flags
&= ~RADEON_CHIPSET_TCL
;
468 fprintf(stderr
, "Disabling HW TCL support\n");
470 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
473 if (rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
474 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
475 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
477 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
483 /* Destroy the device specific context.
485 /* Destroy the Mesa and driver specific context data.
487 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
489 GET_CURRENT_CONTEXT(ctx
);
490 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
491 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
493 /* check if we're deleting the currently bound context */
494 if (rmesa
== current
) {
495 RADEON_FIREVERTICES( rmesa
);
496 _mesa_make_current(NULL
, NULL
, NULL
);
499 /* Free radeon context resources */
500 assert(rmesa
); /* should never be null */
502 GLboolean release_texture_heaps
;
505 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
506 _swsetup_DestroyContext( rmesa
->glCtx
);
507 _tnl_DestroyContext( rmesa
->glCtx
);
508 _ac_DestroyContext( rmesa
->glCtx
);
509 _swrast_DestroyContext( rmesa
->glCtx
);
511 radeonDestroySwtcl( rmesa
->glCtx
);
512 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
513 if (rmesa
->dma
.current
.buf
) {
514 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
515 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
518 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
519 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
520 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
521 radeonVtxfmtDestroy( rmesa
->glCtx
);
524 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
526 if (rmesa
->state
.scissor
.pClipRects
) {
527 FREE(rmesa
->state
.scissor
.pClipRects
);
528 rmesa
->state
.scissor
.pClipRects
= NULL
;
531 if ( release_texture_heaps
) {
532 /* This share group is about to go away, free our private
533 * texture object data.
537 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
538 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
539 rmesa
->texture_heaps
[ i
] = NULL
;
542 assert( is_empty_list( & rmesa
->swapped
) );
545 /* free the Mesa context */
546 rmesa
->glCtx
->DriverCtx
= NULL
;
547 _mesa_destroy_context( rmesa
->glCtx
);
549 /* free the option cache */
550 driDestroyOptionCache (&rmesa
->optionCache
);
560 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
563 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
564 radeonContextPtr rmesa
;
566 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
568 if (ctx
->Visual
.doubleBufferMode
) {
569 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
571 if ( rmesa
->doPageFlip
) {
572 radeonPageFlip( dPriv
);
575 radeonCopyBuffer( dPriv
, NULL
);
580 /* XXX this shouldn't be an error but we can't handle it for now */
581 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
585 void radeonCopySubBuffer(__DRIdrawablePrivate
* dPriv
,
586 int x
, int y
, int w
, int h
)
588 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
589 radeonContextPtr radeon
;
592 radeon
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
595 if (ctx
->Visual
.doubleBufferMode
) {
596 drm_clip_rect_t rect
;
597 rect
.x1
= x
+ dPriv
->x
;
598 rect
.y1
= (dPriv
->h
- y
- h
) + dPriv
->y
;
599 rect
.x2
= rect
.x1
+ w
;
600 rect
.y2
= rect
.y1
+ h
;
601 _mesa_notifySwapBuffers(ctx
); /* flush pending rendering comands */
602 radeonCopyBuffer(dPriv
, &rect
);
605 /* XXX this shouldn't be an error but we can't handle it for now */
606 _mesa_problem(NULL
, "%s: drawable has no context!",
611 /* Make context `c' the current context and bind it to the given
612 * drawing and reading surfaces.
615 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
616 __DRIdrawablePrivate
*driDrawPriv
,
617 __DRIdrawablePrivate
*driReadPriv
)
619 if ( driContextPriv
) {
620 radeonContextPtr newCtx
=
621 (radeonContextPtr
) driContextPriv
->driverPrivate
;
623 if (RADEON_DEBUG
& DEBUG_DRI
)
624 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) newCtx
->glCtx
);
626 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
627 /* XXX we may need to validate the drawable here!!! */
628 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
629 newCtx
->dri
.drawable
= driDrawPriv
;
630 radeonUpdateWindow( newCtx
->glCtx
);
631 radeonUpdateViewportOffset( newCtx
->glCtx
);
634 _mesa_make_current( newCtx
->glCtx
,
635 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
636 (GLframebuffer
*) driReadPriv
->driverPrivate
);
638 if (newCtx
->vb
.enabled
)
639 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
642 if (RADEON_DEBUG
& DEBUG_DRI
)
643 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
644 _mesa_make_current( NULL
, NULL
, NULL
);
647 if (RADEON_DEBUG
& DEBUG_DRI
)
648 fprintf(stderr
, "End %s\n", __FUNCTION__
);
652 /* Force the context `c' to be unbound from its buffer.
655 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
657 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
659 if (RADEON_DEBUG
& DEBUG_DRI
)
660 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) rmesa
->glCtx
);