src/mesa/drivers/dri/radeon/radeon_context.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *   Keith Whitwell <keith@tungstengraphics.com>
  36  */
  37
  38 #include "glheader.h"
  39 #include "api_arrayelt.h"
  40 #include "context.h"
  41 #include "simple_list.h"
  42 #include "imports.h"
  43 #include "matrix.h"
  44 #include "extensions.h"
  45
  46 #include "swrast/swrast.h"
  47 #include "swrast_setup/swrast_setup.h"
  48 #include "array_cache/acache.h"
  49
  50 #include "tnl/tnl.h"
  51 #include "tnl/t_pipeline.h"
  52
  53 #include "drivers/common/driverfuncs.h"
  54
  55 #include "radeon_context.h"
  56 #include "radeon_ioctl.h"
  57 #include "radeon_state.h"
  58 #include "radeon_span.h"
  59 #include "radeon_tex.h"
  60 #include "radeon_swtcl.h"
  61 #include "radeon_tcl.h"
  62 #include "radeon_vtxfmt.h"
  63 #include "radeon_maos.h"
  64
  65 #define DRIVER_DATE     "20030328"
  66
  67 #include "vblank.h"
  68 #include "utils.h"
  69 #include "xmlpool.h" /* for symbolic values of enum-type options */
  70 #ifndef RADEON_DEBUG
  71 int RADEON_DEBUG = (0);
  72 #endif
  73
  74
  75 /* Return the width and height of the given buffer.
  76  */
  77 static void radeonGetBufferSize( GLframebuffer *buffer,
  78                                  GLuint *width, GLuint *height )
  79 {
  80    GET_CURRENT_CONTEXT(ctx);
  81    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  82
  83    LOCK_HARDWARE( rmesa );
  84    *width  = rmesa->dri.drawable->w;
  85    *height = rmesa->dri.drawable->h;
  86    UNLOCK_HARDWARE( rmesa );
  87 }
  88
  89 /* Return various strings for glGetString().
  90  */
  91 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
  92 {
  93    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  94    static char buffer[128];
  95    unsigned   offset;
  96    GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
  97       rmesa->radeonScreen->AGPMode;
  98
  99    switch ( name ) {
 100    case GL_VENDOR:
 101       return (GLubyte *)"Tungsten Graphics, Inc.";
 102
 103    case GL_RENDERER:
 104       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
 105                                      agp_mode );
 106
 107       sprintf( & buffer[ offset ], " %sTCL",
 108                !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 109                ? "" : "NO-" );
 110
 111       return (GLubyte *)buffer;
 112
 113    default:
 114       return NULL;
 115    }
 116 }
 117
 118
 119 /* Extension strings exported by the R100 driver.
 120  */
 121 static const char * const card_extensions[] =
 122 {
 123     "GL_ARB_multisample",
 124     "GL_ARB_multitexture",
 125     "GL_ARB_texture_border_clamp",
 126     "GL_ARB_texture_compression",
 127     "GL_ARB_texture_env_add",
 128     "GL_ARB_texture_env_combine",
 129     "GL_ARB_texture_env_dot3",
 130     "GL_ARB_texture_mirrored_repeat",
 131     "GL_EXT_blend_logic_op",
 132     "GL_EXT_blend_subtract",
 133     "GL_EXT_secondary_color",
 134     "GL_EXT_texture_edge_clamp",
 135     "GL_EXT_texture_env_combine",
 136     "GL_EXT_texture_env_dot3",
 137     "GL_EXT_texture_filter_anisotropic",
 138     "GL_EXT_texture_lod_bias",
 139     "GL_EXT_texture_mirror_clamp",
 140     "GL_ATI_texture_env_combine3",
 141     "GL_ATI_texture_mirror_once",
 142     "GL_MESA_ycbcr_texture",
 143     "GL_NV_blend_square",
 144     "GL_SGIS_generate_mipmap",
 145     NULL
 146 };
 147
 148 extern const struct tnl_pipeline_stage _radeon_texrect_stage;
 149 extern const struct tnl_pipeline_stage _radeon_render_stage;
 150 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 151
 152 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 153
 154    /* Try and go straight to t&l
 155     */
 156    &_radeon_tcl_stage,
 157
 158    /* Catch any t&l fallbacks
 159     */
 160    &_tnl_vertex_transform_stage,
 161    &_tnl_normal_transform_stage,
 162    &_tnl_lighting_stage,
 163    &_tnl_fog_coordinate_stage,
 164    &_tnl_texgen_stage,
 165    &_tnl_texture_transform_stage,
 166
 167    /* Scale texture rectangle to 0..1.
 168     */
 169    &_radeon_texrect_stage,
 170
 171    &_radeon_render_stage,
 172    &_tnl_render_stage,          /* FALLBACK:  */
 173    0,
 174 };
 175
 176
 177
 178 /* Initialize the driver's misc functions.
 179  */
 180 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 181 {
 182     functions->GetBufferSize    = radeonGetBufferSize;
 183     functions->ResizeBuffers    = _swrast_alloc_buffers;
 184     functions->GetString        = radeonGetString;
 185 }
 186
 187 static const struct dri_debug_control debug_control[] =
 188 {
 189     { "fall",  DEBUG_FALLBACKS },
 190     { "tex",   DEBUG_TEXTURE },
 191     { "ioctl", DEBUG_IOCTL },
 192     { "prim",  DEBUG_PRIMS },
 193     { "vert",  DEBUG_VERTS },
 194     { "state", DEBUG_STATE },
 195     { "code",  DEBUG_CODEGEN },
 196     { "vfmt",  DEBUG_VFMT },
 197     { "vtxf",  DEBUG_VFMT },
 198     { "verb",  DEBUG_VERBOSE },
 199     { "dri",   DEBUG_DRI },
 200     { "dma",   DEBUG_DMA },
 201     { "san",   DEBUG_SANITY },
 202     { NULL,    0 }
 203 };
 204
 205
 206 static int
 207 get_ust_nop( int64_t * ust )
 208 {
 209    *ust = 1;
 210    return 0;
 211 }
 212
 213
 214 /* Create the device specific context.
 215  */
 216 GLboolean
 217 radeonCreateContext( const __GLcontextModes *glVisual,
 218                      __DRIcontextPrivate *driContextPriv,
 219                      void *sharedContextPrivate)
 220 {
 221    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 222    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 223    struct dd_function_table functions;
 224    radeonContextPtr rmesa;
 225    GLcontext *ctx, *shareCtx;
 226    int i;
 227    int tcl_mode, fthrottle_mode;
 228
 229    assert(glVisual);
 230    assert(driContextPriv);
 231    assert(screen);
 232
 233    /* Allocate the Radeon context */
 234    rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
 235    if ( !rmesa )
 236       return GL_FALSE;
 237
 238    /* Parse configuration files.
 239     * Do this here so that initialMaxAnisotropy is set before we create
 240     * the default textures.
 241     */
 242    driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
 243                         screen->driScreen->myNum, "radeon");
 244    rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
 245                                                  "def_max_anisotropy");
 246
 247    /* Init default driver functions then plug in our Radeon-specific functions
 248     * (the texture functions are especially important)
 249     */
 250    _mesa_init_driver_functions( &functions );
 251    radeonInitDriverFuncs( &functions );
 252    radeonInitTextureFuncs( &functions );
 253
 254    /* Allocate the Mesa context */
 255    if (sharedContextPrivate)
 256       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
 257    else
 258       shareCtx = NULL;
 259    rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
 260                                        &functions, (void *) rmesa);
 261    if (!rmesa->glCtx) {
 262       FREE(rmesa);
 263       return GL_FALSE;
 264    }
 265    driContextPriv->driverPrivate = rmesa;
 266
 267    /* Init radeon context data */
 268    rmesa->dri.context = driContextPriv;
 269    rmesa->dri.screen = sPriv;
 270    rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
 271    rmesa->dri.hwContext = driContextPriv->hHWContext;
 272    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
 273    rmesa->dri.fd = sPriv->fd;
 274    rmesa->dri.drmMinor = sPriv->drmMinor;
 275
 276    rmesa->radeonScreen = screen;
 277    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 278                                        screen->sarea_priv_offset);
 279
 280
 281    rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
 282
 283    (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
 284    make_empty_list( & rmesa->swapped );
 285
 286    rmesa->nr_heaps = screen->numTexHeaps;
 287    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 288       rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 289             screen->texSize[i],
 290             12,
 291             RADEON_NR_TEX_REGIONS,
 292             (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
 293             & rmesa->sarea->tex_age[i],
 294             & rmesa->swapped,
 295             sizeof( radeonTexObj ),
 296             (destroy_texture_object_t *) radeonDestroyTexObj );
 297
 298       driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
 299                                         & rmesa->c_textureSwaps );
 300    }
 301    rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
 302                                            "texture_depth");
 303    if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 304       rmesa->texture_depth = ( screen->cpp == 4 ) ?
 305          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 306
 307    rmesa->swtcl.RenderIndex = ~0;
 308    rmesa->lost_context = 1;
 309
 310    /* Set the maximum texture size small enough that we can guarentee that
 311     * all texture units can bind a maximal texture and have them both in
 312     * texturable memory at once.
 313     */
 314
 315    ctx = rmesa->glCtx;
 316    ctx->Const.MaxTextureUnits = 2;
 317    ctx->Const.MaxTextureImageUnits = 2;
 318    ctx->Const.MaxTextureCoordUnits = 2;
 319
 320    driCalculateMaxTextureLevels( rmesa->texture_heaps,
 321                                  rmesa->nr_heaps,
 322                                  & ctx->Const,
 323                                  4,
 324                                  11, /* max 2D texture size is 2048x2048 */
 325                                  0,  /* 3D textures unsupported. */
 326                                  0,  /* cube textures unsupported. */
 327                                  11, /* max rect texture size is 2048x2048. */
 328                                  12,
 329                                  GL_FALSE );
 330
 331    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 332
 333    /* No wide points.
 334     */
 335    ctx->Const.MinPointSize = 1.0;
 336    ctx->Const.MinPointSizeAA = 1.0;
 337    ctx->Const.MaxPointSize = 1.0;
 338    ctx->Const.MaxPointSizeAA = 1.0;
 339
 340    ctx->Const.MinLineWidth = 1.0;
 341    ctx->Const.MinLineWidthAA = 1.0;
 342    ctx->Const.MaxLineWidth = 10.0;
 343    ctx->Const.MaxLineWidthAA = 10.0;
 344    ctx->Const.LineWidthGranularity = 0.0625;
 345
 346    /* Set maxlocksize (and hence vb size) small enough to avoid
 347     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 348     * fit in a single dma buffer for indexed rendering of quad strips,
 349     * etc.
 350     */
 351    ctx->Const.MaxArrayLockSize =
 352       MIN2( ctx->Const.MaxArrayLockSize,
 353             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 354
 355    rmesa->boxes = 0;
 356
 357    /* Initialize the software rasterizer and helper modules.
 358     */
 359    _swrast_CreateContext( ctx );
 360    _ac_CreateContext( ctx );
 361    _tnl_CreateContext( ctx );
 362    _swsetup_CreateContext( ctx );
 363    _ae_create_context( ctx );
 364
 365    /* Install the customized pipeline:
 366     */
 367    _tnl_destroy_pipeline( ctx );
 368    _tnl_install_pipeline( ctx, radeon_pipeline );
 369    ctx->Driver.FlushVertices = radeonFlushVertices;
 370
 371    /* Try and keep materials and vertices separate:
 372     */
 373    _tnl_isolate_materials( ctx, GL_TRUE );
 374
 375
 376 /*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
 377
 378    /* Try and keep materials and vertices separate:
 379     */
 380    _tnl_isolate_materials( ctx, GL_TRUE );
 381
 382
 383    /* Configure swrast and T&L to match hardware characteristics:
 384     */
 385    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 386    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 387    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 388    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 389
 390
 391    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
 392    _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
 393    _math_matrix_ctr( &rmesa->tmpmat );
 394    _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
 395    _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
 396    _math_matrix_set_identity( &rmesa->tmpmat );
 397
 398    driInitExtensions( ctx, card_extensions, GL_TRUE );
 399
 400    if (rmesa->dri.drmMinor >= 9)
 401       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 402
 403    /* XXX these should really go right after _mesa_init_driver_functions() */
 404    radeonInitIoctlFuncs( ctx );
 405    radeonInitStateFuncs( ctx );
 406    radeonInitSpanFuncs( ctx );
 407    radeonInitState( rmesa );
 408    radeonInitSwtcl( ctx );
 409
 410    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 411                          ctx->Const.MaxArrayLockSize, 32 );
 412
 413    fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
 414    rmesa->iw.irq_seq = -1;
 415    rmesa->irqsEmitted = 0;
 416    rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
 417                      fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 418
 419    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 420
 421    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
 422        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
 423 #ifndef _SOLO
 424    rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
 425    if ( rmesa->get_ust == NULL ) {
 426       rmesa->get_ust = get_ust_nop;
 427    }
 428 #else
 429    rmesa->get_ust = get_ust_nop;
 430 #endif
 431
 432    (*rmesa->get_ust)( & rmesa->swap_ust );
 433
 434
 435 #if DO_DEBUG
 436    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 437                                        debug_control );
 438 #endif
 439
 440    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 441    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
 442       fprintf(stderr, "disabling 3D acceleration\n");
 443       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 444    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 445               !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
 446       if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 447          rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
 448          fprintf(stderr, "Disabling HW TCL support\n");
 449       }
 450       TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 451    }
 452
 453    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 454       if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 455          radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
 456
 457       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
 458    }
 459    return GL_TRUE;
 460 }
 461
 462
 463 /* Destroy the device specific context.
 464  */
 465 /* Destroy the Mesa and driver specific context data.
 466  */
 467 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 468 {
 469    GET_CURRENT_CONTEXT(ctx);
 470    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 471    radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 472
 473    /* check if we're deleting the currently bound context */
 474    if (rmesa == current) {
 475       RADEON_FIREVERTICES( rmesa );
 476       _mesa_make_current2(NULL, NULL, NULL);
 477    }
 478
 479    /* Free radeon context resources */
 480    assert(rmesa); /* should never be null */
 481    if ( rmesa ) {
 482       GLboolean   release_texture_heaps;
 483
 484
 485       release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
 486       _swsetup_DestroyContext( rmesa->glCtx );
 487       _tnl_DestroyContext( rmesa->glCtx );
 488       _ac_DestroyContext( rmesa->glCtx );
 489       _swrast_DestroyContext( rmesa->glCtx );
 490
 491       radeonDestroySwtcl( rmesa->glCtx );
 492       radeonReleaseArrays( rmesa->glCtx, ~0 );
 493       if (rmesa->dma.current.buf) {
 494          radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
 495          radeonFlushCmdBuf( rmesa, __FUNCTION__ );
 496       }
 497
 498       if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
 499          int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 500          if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 501             radeonVtxfmtDestroy( rmesa->glCtx );
 502       }
 503
 504       /* free the Mesa context */
 505       rmesa->glCtx->DriverCtx = NULL;
 506       _mesa_destroy_context( rmesa->glCtx );
 507
 508       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 509
 510       if (rmesa->state.scissor.pClipRects) {
 511          FREE(rmesa->state.scissor.pClipRects);
 512          rmesa->state.scissor.pClipRects = 0;
 513       }
 514
 515       if ( release_texture_heaps ) {
 516          /* This share group is about to go away, free our private
 517           * texture object data.
 518           */
 519          int i;
 520
 521          for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 522             driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
 523             rmesa->texture_heaps[ i ] = NULL;
 524          }
 525
 526          assert( is_empty_list( & rmesa->swapped ) );
 527       }
 528
 529       /* free the option cache */
 530       driDestroyOptionCache (&rmesa->optionCache);
 531
 532       FREE( rmesa );
 533    }
 534 }
 535
 536
 537
 538
 539 void
 540 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
 541 {
 542
 543    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
 544       radeonContextPtr rmesa;
 545       GLcontext *ctx;
 546       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 547       ctx = rmesa->glCtx;
 548       if (ctx->Visual.doubleBufferMode) {
 549          _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
 550
 551          if ( rmesa->doPageFlip ) {
 552             radeonPageFlip( dPriv );
 553          }
 554          else {
 555             radeonCopyBuffer( dPriv );
 556          }
 557       }
 558    }
 559    else {
 560       /* XXX this shouldn't be an error but we can't handle it for now */
 561       _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
 562    }
 563 }
 564
 565
 566 /* Force the context `c' to be the current context and associate with it
 567  * buffer `b'.
 568  */
 569 GLboolean
 570 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
 571                    __DRIdrawablePrivate *driDrawPriv,
 572                    __DRIdrawablePrivate *driReadPriv )
 573 {
 574    if ( driContextPriv ) {
 575       radeonContextPtr newCtx =
 576          (radeonContextPtr) driContextPriv->driverPrivate;
 577
 578       if (RADEON_DEBUG & DEBUG_DRI)
 579          fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 580
 581       if ( newCtx->dri.drawable != driDrawPriv ) {
 582          driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
 583          newCtx->dri.drawable = driDrawPriv;
 584          radeonUpdateWindow( newCtx->glCtx );
 585          radeonUpdateViewportOffset( newCtx->glCtx );
 586       }
 587
 588       _mesa_make_current2( newCtx->glCtx,
 589                            (GLframebuffer *) driDrawPriv->driverPrivate,
 590                            (GLframebuffer *) driReadPriv->driverPrivate );
 591
 592       if ( !newCtx->glCtx->Viewport.Width ) {
 593          _mesa_set_viewport( newCtx->glCtx, 0, 0,
 594                              driDrawPriv->w, driDrawPriv->h );
 595       }
 596
 597       if (newCtx->vb.enabled)
 598          radeonVtxfmtMakeCurrent( newCtx->glCtx );
 599
 600    } else {
 601       if (RADEON_DEBUG & DEBUG_DRI)
 602          fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 603       _mesa_make_current( 0, 0 );
 604    }
 605
 606    if (RADEON_DEBUG & DEBUG_DRI)
 607       fprintf(stderr, "End %s\n", __FUNCTION__);
 608    return GL_TRUE;
 609 }
 610
 611 /* Force the context `c' to be unbound from its buffer.
 612  */
 613 GLboolean
 614 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 615 {
 616    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 617
 618    if (RADEON_DEBUG & DEBUG_DRI)
 619       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 620
 621    return GL_TRUE;
 622 }