src/mesa/drivers/dri/radeon/radeon_context.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *   Keith Whitwell <keith@tungstengraphics.com>
  36  */
  37
  38 #include "glheader.h"
  39 #include "api_arrayelt.h"
  40 #include "context.h"
  41 #include "simple_list.h"
  42 #include "imports.h"
  43 #include "matrix.h"
  44 #include "extensions.h"
  45
  46 #include "swrast/swrast.h"
  47 #include "swrast_setup/swrast_setup.h"
  48 #include "array_cache/acache.h"
  49
  50 #include "tnl/tnl.h"
  51 #include "tnl/t_pipeline.h"
  52
  53 #include "drivers/common/driverfuncs.h"
  54
  55 #include "radeon_context.h"
  56 #include "radeon_ioctl.h"
  57 #include "radeon_state.h"
  58 #include "radeon_span.h"
  59 #include "radeon_tex.h"
  60 #include "radeon_swtcl.h"
  61 #include "radeon_tcl.h"
  62 #include "radeon_vtxfmt.h"
  63 #include "radeon_maos.h"
  64
  65 #define DRIVER_DATE     "20030328"
  66
  67 #include "vblank.h"
  68 #include "utils.h"
  69 #include "xmlpool.h" /* for symbolic values of enum-type options */
  70 #ifndef RADEON_DEBUG
  71 int RADEON_DEBUG = (0);
  72 #endif
  73
  74
  75 /* Return the width and height of the given buffer.
  76  */
  77 static void radeonGetBufferSize( GLframebuffer *buffer,
  78                                  GLuint *width, GLuint *height )
  79 {
  80    GET_CURRENT_CONTEXT(ctx);
  81    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  82
  83    LOCK_HARDWARE( rmesa );
  84    *width  = rmesa->dri.drawable->w;
  85    *height = rmesa->dri.drawable->h;
  86    UNLOCK_HARDWARE( rmesa );
  87 }
  88
  89 /* Return various strings for glGetString().
  90  */
  91 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
  92 {
  93    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  94    static char buffer[128];
  95    unsigned   offset;
  96    GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
  97       rmesa->radeonScreen->AGPMode;
  98
  99    switch ( name ) {
 100    case GL_VENDOR:
 101       return (GLubyte *)"Tungsten Graphics, Inc.";
 102
 103    case GL_RENDERER:
 104       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
 105                                      agp_mode );
 106
 107       sprintf( & buffer[ offset ], " %sTCL",
 108                !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 109                ? "" : "NO-" );
 110
 111       return (GLubyte *)buffer;
 112
 113    default:
 114       return NULL;
 115    }
 116 }
 117
 118
 119 /* Extension strings exported by the R100 driver.
 120  */
 121 static const char * const card_extensions[] =
 122 {
 123     "GL_ARB_multisample",
 124     "GL_ARB_multitexture",
 125     "GL_ARB_texture_border_clamp",
 126     "GL_ARB_texture_compression",
 127     "GL_ARB_texture_env_add",
 128     "GL_ARB_texture_env_combine",
 129     "GL_ARB_texture_env_crossbar",
 130     "GL_ARB_texture_env_dot3",
 131     "GL_ARB_texture_mirrored_repeat",
 132     "GL_EXT_blend_logic_op",
 133     "GL_EXT_blend_subtract",
 134     "GL_EXT_secondary_color",
 135     "GL_EXT_texture_edge_clamp",
 136     "GL_EXT_texture_env_combine",
 137     "GL_EXT_texture_env_dot3",
 138     "GL_EXT_texture_filter_anisotropic",
 139     "GL_EXT_texture_lod_bias",
 140     "GL_EXT_texture_mirror_clamp",
 141     "GL_ATI_texture_env_combine3",
 142     "GL_ATI_texture_mirror_once",
 143     "GL_MESA_ycbcr_texture",
 144     "GL_NV_blend_square",
 145     "GL_SGIS_generate_mipmap",
 146     NULL
 147 };
 148
 149 extern const struct tnl_pipeline_stage _radeon_texrect_stage;
 150 extern const struct tnl_pipeline_stage _radeon_render_stage;
 151 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 152
 153 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 154
 155    /* Try and go straight to t&l
 156     */
 157    &_radeon_tcl_stage,
 158
 159    /* Catch any t&l fallbacks
 160     */
 161    &_tnl_vertex_transform_stage,
 162    &_tnl_normal_transform_stage,
 163    &_tnl_lighting_stage,
 164    &_tnl_fog_coordinate_stage,
 165    &_tnl_texgen_stage,
 166    &_tnl_texture_transform_stage,
 167
 168    /* Scale texture rectangle to 0..1.
 169     */
 170    &_radeon_texrect_stage,
 171
 172    &_radeon_render_stage,
 173    &_tnl_render_stage,          /* FALLBACK:  */
 174    0,
 175 };
 176
 177
 178
 179 /* Initialize the driver's misc functions.
 180  */
 181 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 182 {
 183     functions->GetBufferSize    = radeonGetBufferSize;
 184     functions->ResizeBuffers    = _swrast_alloc_buffers;
 185     functions->GetString        = radeonGetString;
 186 }
 187
 188 static const struct dri_debug_control debug_control[] =
 189 {
 190     { "fall",  DEBUG_FALLBACKS },
 191     { "tex",   DEBUG_TEXTURE },
 192     { "ioctl", DEBUG_IOCTL },
 193     { "prim",  DEBUG_PRIMS },
 194     { "vert",  DEBUG_VERTS },
 195     { "state", DEBUG_STATE },
 196     { "code",  DEBUG_CODEGEN },
 197     { "vfmt",  DEBUG_VFMT },
 198     { "vtxf",  DEBUG_VFMT },
 199     { "verb",  DEBUG_VERBOSE },
 200     { "dri",   DEBUG_DRI },
 201     { "dma",   DEBUG_DMA },
 202     { "san",   DEBUG_SANITY },
 203     { NULL,    0 }
 204 };
 205
 206
 207 static int
 208 get_ust_nop( int64_t * ust )
 209 {
 210    *ust = 1;
 211    return 0;
 212 }
 213
 214
 215 /* Create the device specific context.
 216  */
 217 GLboolean
 218 radeonCreateContext( const __GLcontextModes *glVisual,
 219                      __DRIcontextPrivate *driContextPriv,
 220                      void *sharedContextPrivate)
 221 {
 222    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 223    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 224    struct dd_function_table functions;
 225    radeonContextPtr rmesa;
 226    GLcontext *ctx, *shareCtx;
 227    int i;
 228    int tcl_mode, fthrottle_mode;
 229
 230    assert(glVisual);
 231    assert(driContextPriv);
 232    assert(screen);
 233
 234    /* Allocate the Radeon context */
 235    rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
 236    if ( !rmesa )
 237       return GL_FALSE;
 238
 239    /* Parse configuration files.
 240     * Do this here so that initialMaxAnisotropy is set before we create
 241     * the default textures.
 242     */
 243    driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
 244                         screen->driScreen->myNum, "radeon");
 245    rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
 246                                                  "def_max_anisotropy");
 247
 248    /* Init default driver functions then plug in our Radeon-specific functions
 249     * (the texture functions are especially important)
 250     */
 251    _mesa_init_driver_functions( &functions );
 252    radeonInitDriverFuncs( &functions );
 253    radeonInitTextureFuncs( &functions );
 254
 255    /* Allocate the Mesa context */
 256    if (sharedContextPrivate)
 257       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
 258    else
 259       shareCtx = NULL;
 260    rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
 261                                        &functions, (void *) rmesa);
 262    if (!rmesa->glCtx) {
 263       FREE(rmesa);
 264       return GL_FALSE;
 265    }
 266    driContextPriv->driverPrivate = rmesa;
 267
 268    /* Init radeon context data */
 269    rmesa->dri.context = driContextPriv;
 270    rmesa->dri.screen = sPriv;
 271    rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
 272    rmesa->dri.hwContext = driContextPriv->hHWContext;
 273    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
 274    rmesa->dri.fd = sPriv->fd;
 275    rmesa->dri.drmMinor = sPriv->drmMinor;
 276
 277    rmesa->radeonScreen = screen;
 278    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 279                                        screen->sarea_priv_offset);
 280
 281
 282    rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
 283
 284    (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
 285    make_empty_list( & rmesa->swapped );
 286
 287    rmesa->nr_heaps = screen->numTexHeaps;
 288    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 289       rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 290             screen->texSize[i],
 291             12,
 292             RADEON_NR_TEX_REGIONS,
 293             (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
 294             & rmesa->sarea->tex_age[i],
 295             & rmesa->swapped,
 296             sizeof( radeonTexObj ),
 297             (destroy_texture_object_t *) radeonDestroyTexObj );
 298
 299       driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
 300                                         & rmesa->c_textureSwaps );
 301    }
 302    rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
 303                                            "texture_depth");
 304    if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 305       rmesa->texture_depth = ( screen->cpp == 4 ) ?
 306          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 307
 308    rmesa->swtcl.RenderIndex = ~0;
 309    rmesa->lost_context = 1;
 310
 311    /* Set the maximum texture size small enough that we can guarentee that
 312     * all texture units can bind a maximal texture and have them both in
 313     * texturable memory at once.
 314     */
 315
 316    ctx = rmesa->glCtx;
 317    ctx->Const.MaxTextureUnits = 2;
 318    ctx->Const.MaxTextureImageUnits = 2;
 319    ctx->Const.MaxTextureCoordUnits = 2;
 320
 321    driCalculateMaxTextureLevels( rmesa->texture_heaps,
 322                                  rmesa->nr_heaps,
 323                                  & ctx->Const,
 324                                  4,
 325                                  11, /* max 2D texture size is 2048x2048 */
 326                                  0,  /* 3D textures unsupported. */
 327                                  0,  /* cube textures unsupported. */
 328                                  11, /* max rect texture size is 2048x2048. */
 329                                  12,
 330                                  GL_FALSE );
 331
 332    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 333
 334    /* No wide points.
 335     */
 336    ctx->Const.MinPointSize = 1.0;
 337    ctx->Const.MinPointSizeAA = 1.0;
 338    ctx->Const.MaxPointSize = 1.0;
 339    ctx->Const.MaxPointSizeAA = 1.0;
 340
 341    ctx->Const.MinLineWidth = 1.0;
 342    ctx->Const.MinLineWidthAA = 1.0;
 343    ctx->Const.MaxLineWidth = 10.0;
 344    ctx->Const.MaxLineWidthAA = 10.0;
 345    ctx->Const.LineWidthGranularity = 0.0625;
 346
 347    /* Set maxlocksize (and hence vb size) small enough to avoid
 348     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 349     * fit in a single dma buffer for indexed rendering of quad strips,
 350     * etc.
 351     */
 352    ctx->Const.MaxArrayLockSize =
 353       MIN2( ctx->Const.MaxArrayLockSize,
 354             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 355
 356    rmesa->boxes = 0;
 357
 358    /* Initialize the software rasterizer and helper modules.
 359     */
 360    _swrast_CreateContext( ctx );
 361    _ac_CreateContext( ctx );
 362    _tnl_CreateContext( ctx );
 363    _swsetup_CreateContext( ctx );
 364    _ae_create_context( ctx );
 365
 366    /* Install the customized pipeline:
 367     */
 368    _tnl_destroy_pipeline( ctx );
 369    _tnl_install_pipeline( ctx, radeon_pipeline );
 370    ctx->Driver.FlushVertices = radeonFlushVertices;
 371
 372    /* Try and keep materials and vertices separate:
 373     */
 374    _tnl_isolate_materials( ctx, GL_TRUE );
 375
 376
 377 /*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
 378
 379    /* Try and keep materials and vertices separate:
 380     */
 381    _tnl_isolate_materials( ctx, GL_TRUE );
 382
 383
 384    /* Configure swrast and T&L to match hardware characteristics:
 385     */
 386    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 387    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 388    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 389    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 390
 391
 392    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
 393    _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
 394    _math_matrix_ctr( &rmesa->tmpmat );
 395    _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
 396    _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
 397    _math_matrix_set_identity( &rmesa->tmpmat );
 398
 399    driInitExtensions( ctx, card_extensions, GL_TRUE );
 400
 401    if (rmesa->dri.drmMinor >= 9)
 402       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 403
 404    /* XXX these should really go right after _mesa_init_driver_functions() */
 405    radeonInitIoctlFuncs( ctx );
 406    radeonInitStateFuncs( ctx );
 407    radeonInitSpanFuncs( ctx );
 408    radeonInitState( rmesa );
 409    radeonInitSwtcl( ctx );
 410
 411    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 412                          ctx->Const.MaxArrayLockSize, 32 );
 413
 414    fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
 415    rmesa->iw.irq_seq = -1;
 416    rmesa->irqsEmitted = 0;
 417    rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
 418                      fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 419
 420    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 421
 422    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
 423        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
 424
 425    rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
 426    if ( rmesa->get_ust == NULL ) {
 427       rmesa->get_ust = get_ust_nop;
 428    }
 429    (*rmesa->get_ust)( & rmesa->swap_ust );
 430
 431
 432 #if DO_DEBUG
 433    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 434                                        debug_control );
 435 #endif
 436
 437    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 438    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
 439       fprintf(stderr, "disabling 3D acceleration\n");
 440       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 441    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 442               !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
 443       if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 444          rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
 445          fprintf(stderr, "Disabling HW TCL support\n");
 446       }
 447       TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 448    }
 449
 450    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 451       if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 452          radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
 453
 454       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
 455    }
 456    return GL_TRUE;
 457 }
 458
 459
 460 /* Destroy the device specific context.
 461  */
 462 /* Destroy the Mesa and driver specific context data.
 463  */
 464 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 465 {
 466    GET_CURRENT_CONTEXT(ctx);
 467    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 468    radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 469
 470    /* check if we're deleting the currently bound context */
 471    if (rmesa == current) {
 472       RADEON_FIREVERTICES( rmesa );
 473       _mesa_make_current2(NULL, NULL, NULL);
 474    }
 475
 476    /* Free radeon context resources */
 477    assert(rmesa); /* should never be null */
 478    if ( rmesa ) {
 479       GLboolean   release_texture_heaps;
 480
 481
 482       release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
 483       _swsetup_DestroyContext( rmesa->glCtx );
 484       _tnl_DestroyContext( rmesa->glCtx );
 485       _ac_DestroyContext( rmesa->glCtx );
 486       _swrast_DestroyContext( rmesa->glCtx );
 487
 488       radeonDestroySwtcl( rmesa->glCtx );
 489       radeonReleaseArrays( rmesa->glCtx, ~0 );
 490       if (rmesa->dma.current.buf) {
 491          radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
 492          radeonFlushCmdBuf( rmesa, __FUNCTION__ );
 493       }
 494
 495       if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
 496          int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 497          if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 498             radeonVtxfmtDestroy( rmesa->glCtx );
 499       }
 500
 501       /* free the Mesa context */
 502       rmesa->glCtx->DriverCtx = NULL;
 503       _mesa_destroy_context( rmesa->glCtx );
 504
 505       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 506
 507       if (rmesa->state.scissor.pClipRects) {
 508          FREE(rmesa->state.scissor.pClipRects);
 509          rmesa->state.scissor.pClipRects = 0;
 510       }
 511
 512       if ( release_texture_heaps ) {
 513          /* This share group is about to go away, free our private
 514           * texture object data.
 515           */
 516          int i;
 517
 518          for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 519             driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
 520             rmesa->texture_heaps[ i ] = NULL;
 521          }
 522
 523          assert( is_empty_list( & rmesa->swapped ) );
 524       }
 525
 526       /* free the option cache */
 527       driDestroyOptionCache (&rmesa->optionCache);
 528
 529       FREE( rmesa );
 530    }
 531 }
 532
 533
 534
 535
 536 void
 537 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
 538 {
 539
 540    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
 541       radeonContextPtr rmesa;
 542       GLcontext *ctx;
 543       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 544       ctx = rmesa->glCtx;
 545       if (ctx->Visual.doubleBufferMode) {
 546          _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
 547
 548          if ( rmesa->doPageFlip ) {
 549             radeonPageFlip( dPriv );
 550          }
 551          else {
 552             radeonCopyBuffer( dPriv );
 553          }
 554       }
 555    }
 556    else {
 557       /* XXX this shouldn't be an error but we can't handle it for now */
 558       _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
 559    }
 560 }
 561
 562
 563 /* Force the context `c' to be the current context and associate with it
 564  * buffer `b'.
 565  */
 566 GLboolean
 567 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
 568                    __DRIdrawablePrivate *driDrawPriv,
 569                    __DRIdrawablePrivate *driReadPriv )
 570 {
 571    if ( driContextPriv ) {
 572       radeonContextPtr newCtx =
 573          (radeonContextPtr) driContextPriv->driverPrivate;
 574
 575       if (RADEON_DEBUG & DEBUG_DRI)
 576          fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 577
 578       if ( newCtx->dri.drawable != driDrawPriv ) {
 579          driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
 580          newCtx->dri.drawable = driDrawPriv;
 581          radeonUpdateWindow( newCtx->glCtx );
 582          radeonUpdateViewportOffset( newCtx->glCtx );
 583       }
 584
 585       _mesa_make_current2( newCtx->glCtx,
 586                            (GLframebuffer *) driDrawPriv->driverPrivate,
 587                            (GLframebuffer *) driReadPriv->driverPrivate );
 588
 589       if ( !newCtx->glCtx->Viewport.Width ) {
 590          _mesa_set_viewport( newCtx->glCtx, 0, 0,
 591                              driDrawPriv->w, driDrawPriv->h );
 592       }
 593
 594       if (newCtx->vb.enabled)
 595          radeonVtxfmtMakeCurrent( newCtx->glCtx );
 596
 597    } else {
 598       if (RADEON_DEBUG & DEBUG_DRI)
 599          fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 600       _mesa_make_current( 0, 0 );
 601    }
 602
 603    if (RADEON_DEBUG & DEBUG_DRI)
 604       fprintf(stderr, "End %s\n", __FUNCTION__);
 605    return GL_TRUE;
 606 }
 607
 608 /* Force the context `c' to be unbound from its buffer.
 609  */
 610 GLboolean
 611 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 612 {
 613    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 614
 615    if (RADEON_DEBUG & DEBUG_DRI)
 616       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 617
 618    return GL_TRUE;
 619 }