1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
45 #include "framebuffer.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
52 #include "tnl/t_pipeline.h"
54 #include "drivers/common/driverfuncs.h"
56 #include "radeon_context.h"
57 #include "radeon_ioctl.h"
58 #include "radeon_state.h"
59 #include "radeon_span.h"
60 #include "radeon_tex.h"
61 #include "radeon_swtcl.h"
62 #include "radeon_tcl.h"
63 #include "radeon_vtxfmt.h"
64 #include "radeon_maos.h"
66 #define DRIVER_DATE "20041207"
70 #include "xmlpool.h" /* for symbolic values of enum-type options */
72 int RADEON_DEBUG
= (0);
76 /* Return the width and height of the given buffer.
78 static void radeonGetBufferSize( GLframebuffer
*buffer
,
79 GLuint
*width
, GLuint
*height
)
81 GET_CURRENT_CONTEXT(ctx
);
82 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
84 LOCK_HARDWARE( rmesa
);
85 *width
= rmesa
->dri
.drawable
->w
;
86 *height
= rmesa
->dri
.drawable
->h
;
87 UNLOCK_HARDWARE( rmesa
);
90 /* Return various strings for glGetString().
92 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
94 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
95 static char buffer
[128];
97 GLuint agp_mode
= rmesa
->radeonScreen
->IsPCI
? 0 :
98 rmesa
->radeonScreen
->AGPMode
;
102 return (GLubyte
*)"Tungsten Graphics, Inc.";
105 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
108 sprintf( & buffer
[ offset
], " %sTCL",
109 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
112 return (GLubyte
*)buffer
;
120 /* Extension strings exported by the R100 driver.
122 static const char * const card_extensions
[] =
124 "GL_ARB_multisample",
125 "GL_ARB_multitexture",
126 "GL_ARB_texture_border_clamp",
127 "GL_ARB_texture_compression",
128 "GL_ARB_texture_env_add",
129 "GL_ARB_texture_env_combine",
130 "GL_ARB_texture_env_crossbar",
131 "GL_ARB_texture_env_dot3",
132 "GL_ARB_texture_mirrored_repeat",
133 "GL_EXT_blend_logic_op",
134 "GL_EXT_blend_subtract",
135 "GL_EXT_secondary_color",
136 "GL_EXT_stencil_wrap",
137 "GL_EXT_texture_edge_clamp",
138 "GL_EXT_texture_env_combine",
139 "GL_EXT_texture_env_dot3",
140 "GL_EXT_texture_filter_anisotropic",
141 "GL_EXT_texture_lod_bias",
142 "GL_EXT_texture_mirror_clamp",
143 "GL_ATI_texture_env_combine3",
144 "GL_ATI_texture_mirror_once",
145 "GL_MESA_ycbcr_texture",
146 "GL_NV_blend_square",
147 "GL_SGIS_generate_mipmap",
151 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
152 extern const struct tnl_pipeline_stage _radeon_render_stage
;
153 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
155 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
157 /* Try and go straight to t&l
161 /* Catch any t&l fallbacks
163 &_tnl_vertex_transform_stage
,
164 &_tnl_normal_transform_stage
,
165 &_tnl_lighting_stage
,
166 &_tnl_fog_coordinate_stage
,
168 &_tnl_texture_transform_stage
,
170 /* Scale texture rectangle to 0..1.
172 &_radeon_texrect_stage
,
174 &_radeon_render_stage
,
175 &_tnl_render_stage
, /* FALLBACK: */
181 /* Initialize the driver's misc functions.
183 static void radeonInitDriverFuncs( struct dd_function_table
*functions
)
185 functions
->GetBufferSize
= radeonGetBufferSize
;
186 functions
->ResizeBuffers
= _mesa_resize_framebuffer
;
187 functions
->GetString
= radeonGetString
;
190 static const struct dri_debug_control debug_control
[] =
192 { "fall", DEBUG_FALLBACKS
},
193 { "tex", DEBUG_TEXTURE
},
194 { "ioctl", DEBUG_IOCTL
},
195 { "prim", DEBUG_PRIMS
},
196 { "vert", DEBUG_VERTS
},
197 { "state", DEBUG_STATE
},
198 { "code", DEBUG_CODEGEN
},
199 { "vfmt", DEBUG_VFMT
},
200 { "vtxf", DEBUG_VFMT
},
201 { "verb", DEBUG_VERBOSE
},
202 { "dri", DEBUG_DRI
},
203 { "dma", DEBUG_DMA
},
204 { "san", DEBUG_SANITY
},
205 { "sync", DEBUG_SYNC
},
211 get_ust_nop( int64_t * ust
)
218 /* Create the device specific context.
221 radeonCreateContext( const __GLcontextModes
*glVisual
,
222 __DRIcontextPrivate
*driContextPriv
,
223 void *sharedContextPrivate
)
225 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
226 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
227 struct dd_function_table functions
;
228 radeonContextPtr rmesa
;
229 GLcontext
*ctx
, *shareCtx
;
231 int tcl_mode
, fthrottle_mode
;
234 assert(driContextPriv
);
237 /* Allocate the Radeon context */
238 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
242 /* Parse configuration files.
243 * Do this here so that initialMaxAnisotropy is set before we create
244 * the default textures.
246 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
247 screen
->driScreen
->myNum
, "radeon");
248 rmesa
->initialMaxAnisotropy
= driQueryOptionf(&rmesa
->optionCache
,
249 "def_max_anisotropy");
251 if ( driQueryOptionb( &rmesa
->optionCache
, "hyperz" ) ) {
252 if ( sPriv
->drmMinor
< 13 )
253 fprintf( stderr
, "DRM version 1.%d too old to support HyperZ, "
254 "disabling.\n",sPriv
->drmMinor
);
256 rmesa
->using_hyperz
= GL_TRUE
;
259 if ( sPriv
->drmMinor
>= 15 )
260 rmesa
->texmicrotile
= GL_TRUE
;
262 /* Init default driver functions then plug in our Radeon-specific functions
263 * (the texture functions are especially important)
265 _mesa_init_driver_functions( &functions
);
266 radeonInitDriverFuncs( &functions
);
267 radeonInitTextureFuncs( &functions
);
269 /* Allocate the Mesa context */
270 if (sharedContextPrivate
)
271 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
274 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
275 &functions
, (void *) rmesa
);
280 driContextPriv
->driverPrivate
= rmesa
;
282 /* Init radeon context data */
283 rmesa
->dri
.context
= driContextPriv
;
284 rmesa
->dri
.screen
= sPriv
;
285 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
286 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
287 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
288 rmesa
->dri
.fd
= sPriv
->fd
;
289 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
291 rmesa
->radeonScreen
= screen
;
292 rmesa
->sarea
= (drm_radeon_sarea_t
*)((GLubyte
*)sPriv
->pSAREA
+
293 screen
->sarea_priv_offset
);
296 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
298 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
299 make_empty_list( & rmesa
->swapped
);
301 rmesa
->nr_heaps
= screen
->numTexHeaps
;
302 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
303 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
306 RADEON_NR_TEX_REGIONS
,
307 (drmTextureRegionPtr
)rmesa
->sarea
->tex_list
[i
],
308 & rmesa
->sarea
->tex_age
[i
],
310 sizeof( radeonTexObj
),
311 (destroy_texture_object_t
*) radeonDestroyTexObj
);
313 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
314 & rmesa
->c_textureSwaps
);
316 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
318 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
319 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
320 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
322 rmesa
->swtcl
.RenderIndex
= ~0;
323 rmesa
->hw
.all_dirty
= GL_TRUE
;
325 /* Set the maximum texture size small enough that we can guarentee that
326 * all texture units can bind a maximal texture and have them both in
327 * texturable memory at once.
331 ctx
->Const
.MaxTextureUnits
= 2;
332 ctx
->Const
.MaxTextureImageUnits
= 2;
333 ctx
->Const
.MaxTextureCoordUnits
= 2;
335 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
339 11, /* max 2D texture size is 2048x2048 */
340 0, /* 3D textures unsupported. */
341 0, /* cube textures unsupported. */
342 11, /* max rect texture size is 2048x2048. */
346 /* adjust max texture size a bit. Hack, but I really want to use larger textures
347 which will work just fine in 99.999999% of all cases, especially with texture compression... */
348 if (driQueryOptionb( &rmesa
->optionCache
, "texture_level_hack" ))
350 if (ctx
->Const
.MaxTextureLevels
< 12) ctx
->Const
.MaxTextureLevels
+= 1;
353 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
357 ctx
->Const
.MinPointSize
= 1.0;
358 ctx
->Const
.MinPointSizeAA
= 1.0;
359 ctx
->Const
.MaxPointSize
= 1.0;
360 ctx
->Const
.MaxPointSizeAA
= 1.0;
362 ctx
->Const
.MinLineWidth
= 1.0;
363 ctx
->Const
.MinLineWidthAA
= 1.0;
364 ctx
->Const
.MaxLineWidth
= 10.0;
365 ctx
->Const
.MaxLineWidthAA
= 10.0;
366 ctx
->Const
.LineWidthGranularity
= 0.0625;
368 /* Set maxlocksize (and hence vb size) small enough to avoid
369 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
370 * fit in a single dma buffer for indexed rendering of quad strips,
373 ctx
->Const
.MaxArrayLockSize
=
374 MIN2( ctx
->Const
.MaxArrayLockSize
,
375 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
379 /* Initialize the software rasterizer and helper modules.
381 _swrast_CreateContext( ctx
);
382 _ac_CreateContext( ctx
);
383 _tnl_CreateContext( ctx
);
384 _swsetup_CreateContext( ctx
);
385 _ae_create_context( ctx
);
387 /* Install the customized pipeline:
389 _tnl_destroy_pipeline( ctx
);
390 _tnl_install_pipeline( ctx
, radeon_pipeline
);
391 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
393 /* Try and keep materials and vertices separate:
395 _tnl_isolate_materials( ctx
, GL_TRUE
);
397 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
399 /* Configure swrast and T&L to match hardware characteristics:
401 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
402 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
403 _tnl_allow_pixel_fog( ctx
, GL_FALSE
);
404 _tnl_allow_vertex_fog( ctx
, GL_TRUE
);
407 _math_matrix_ctr( &rmesa
->TexGenMatrix
[0] );
408 _math_matrix_ctr( &rmesa
->TexGenMatrix
[1] );
409 _math_matrix_ctr( &rmesa
->tmpmat
);
410 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[0] );
411 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[1] );
412 _math_matrix_set_identity( &rmesa
->tmpmat
);
414 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
415 if (rmesa
->glCtx
->Mesa_DXTn
) {
416 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
417 _mesa_enable_extension( ctx
, "GL_S3_s3tc" );
419 else if (driQueryOptionb (&rmesa
->optionCache
, "force_s3tc_enable")) {
420 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
423 if (rmesa
->dri
.drmMinor
>= 9)
424 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
426 /* XXX these should really go right after _mesa_init_driver_functions() */
427 radeonInitIoctlFuncs( ctx
);
428 radeonInitStateFuncs( ctx
);
429 radeonInitSpanFuncs( ctx
);
430 radeonInitState( rmesa
);
431 radeonInitSwtcl( ctx
);
433 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
434 ctx
->Const
.MaxArrayLockSize
, 32 );
436 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
437 rmesa
->iw
.irq_seq
= -1;
438 rmesa
->irqsEmitted
= 0;
439 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
440 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
442 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
444 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
445 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
447 rmesa
->get_ust
= (PFNGLXGETUSTPROC
) glXGetProcAddress( (const GLubyte
*) "__glXGetUST" );
448 if ( rmesa
->get_ust
== NULL
) {
449 rmesa
->get_ust
= get_ust_nop
;
451 (*rmesa
->get_ust
)( & rmesa
->swap_ust
);
455 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
459 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
460 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
461 fprintf(stderr
, "disabling 3D acceleration\n");
462 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
463 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
464 !(rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
)) {
465 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
466 rmesa
->radeonScreen
->chipset
&= ~RADEON_CHIPSET_TCL
;
467 fprintf(stderr
, "Disabling HW TCL support\n");
469 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
472 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
473 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
474 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
476 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
482 /* Destroy the device specific context.
484 /* Destroy the Mesa and driver specific context data.
486 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
488 GET_CURRENT_CONTEXT(ctx
);
489 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
490 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
492 /* check if we're deleting the currently bound context */
493 if (rmesa
== current
) {
494 RADEON_FIREVERTICES( rmesa
);
495 _mesa_make_current(NULL
, NULL
, NULL
);
498 /* Free radeon context resources */
499 assert(rmesa
); /* should never be null */
501 GLboolean release_texture_heaps
;
504 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
505 _swsetup_DestroyContext( rmesa
->glCtx
);
506 _tnl_DestroyContext( rmesa
->glCtx
);
507 _ac_DestroyContext( rmesa
->glCtx
);
508 _swrast_DestroyContext( rmesa
->glCtx
);
510 radeonDestroySwtcl( rmesa
->glCtx
);
511 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
512 if (rmesa
->dma
.current
.buf
) {
513 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
514 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
517 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
518 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
519 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
520 radeonVtxfmtDestroy( rmesa
->glCtx
);
523 /* free the Mesa context */
524 rmesa
->glCtx
->DriverCtx
= NULL
;
525 _mesa_destroy_context( rmesa
->glCtx
);
527 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
529 if (rmesa
->state
.scissor
.pClipRects
) {
530 FREE(rmesa
->state
.scissor
.pClipRects
);
531 rmesa
->state
.scissor
.pClipRects
= NULL
;
534 if ( release_texture_heaps
) {
535 /* This share group is about to go away, free our private
536 * texture object data.
540 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
541 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
542 rmesa
->texture_heaps
[ i
] = NULL
;
545 assert( is_empty_list( & rmesa
->swapped
) );
548 /* free the option cache */
549 driDestroyOptionCache (&rmesa
->optionCache
);
559 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
562 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
563 radeonContextPtr rmesa
;
565 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
567 if (ctx
->Visual
.doubleBufferMode
) {
568 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
570 if ( rmesa
->doPageFlip
) {
571 radeonPageFlip( dPriv
);
574 radeonCopyBuffer( dPriv
);
579 /* XXX this shouldn't be an error but we can't handle it for now */
580 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
585 /* Force the context `c' to be the current context and associate with it
589 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
590 __DRIdrawablePrivate
*driDrawPriv
,
591 __DRIdrawablePrivate
*driReadPriv
)
593 if ( driContextPriv
) {
594 radeonContextPtr newCtx
=
595 (radeonContextPtr
) driContextPriv
->driverPrivate
;
597 if (RADEON_DEBUG
& DEBUG_DRI
)
598 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) newCtx
->glCtx
);
600 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
601 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
602 newCtx
->dri
.drawable
= driDrawPriv
;
603 radeonUpdateWindow( newCtx
->glCtx
);
604 radeonUpdateViewportOffset( newCtx
->glCtx
);
607 _mesa_make_current( newCtx
->glCtx
,
608 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
609 (GLframebuffer
*) driReadPriv
->driverPrivate
);
611 if (newCtx
->vb
.enabled
)
612 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
615 if (RADEON_DEBUG
& DEBUG_DRI
)
616 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
617 _mesa_make_current( NULL
, NULL
, NULL
);
620 if (RADEON_DEBUG
& DEBUG_DRI
)
621 fprintf(stderr
, "End %s\n", __FUNCTION__
);
625 /* Force the context `c' to be unbound from its buffer.
628 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
630 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
632 if (RADEON_DEBUG
& DEBUG_DRI
)
633 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) rmesa
->glCtx
);