src/mesa/drivers/dri/radeon/radeon_context.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Kevin E. Martin <martin@valinux.com>
  33  *   Gareth Hughes <gareth@valinux.com>
  34  *   Keith Whitwell <keith@tungstengraphics.com>
  35  */
  36
  37 #include "main/glheader.h"
  38 #include "main/api_arrayelt.h"
  39 #include "main/context.h"
  40 #include "main/simple_list.h"
  41 #include "main/imports.h"
  42 #include "main/matrix.h"
  43 #include "main/extensions.h"
  44 #include "main/framebuffer.h"
  45 #include "main/state.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "vbo/vbo.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_context.h"
  57 #include "radeon_ioctl.h"
  58 #include "radeon_state.h"
  59 #include "radeon_span.h"
  60 #include "radeon_tex.h"
  61 #include "radeon_swtcl.h"
  62 #include "radeon_tcl.h"
  63 #include "radeon_maos.h"
  64
  65 #define need_GL_ARB_multisample
  66 #define need_GL_ARB_texture_compression
  67 #define need_GL_ARB_vertex_buffer_object
  68 #define need_GL_EXT_blend_minmax
  69 #define need_GL_EXT_fog_coord
  70 #define need_GL_EXT_secondary_color
  71 #include "extension_helper.h"
  72
  73 #define DRIVER_DATE     "20061018"
  74
  75 #include "vblank.h"
  76 #include "utils.h"
  77 #include "xmlpool.h" /* for symbolic values of enum-type options */
  78
  79 /* Return various strings for glGetString().
  80  */
  81 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
  82 {
  83    r100ContextPtr rmesa = R100_CONTEXT(ctx);
  84    static char buffer[128];
  85    unsigned   offset;
  86    GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type==RADEON_CARD_PCI) ? 0 :
  87       rmesa->radeon.radeonScreen->AGPMode;
  88
  89    switch ( name ) {
  90    case GL_VENDOR:
  91       return (GLubyte *)"Tungsten Graphics, Inc.";
  92
  93    case GL_RENDERER:
  94       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
  95                                      agp_mode );
  96
  97       sprintf( & buffer[ offset ], " %sTCL",
  98                !(rmesa->radeon.TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
  99                ? "" : "NO-" );
 100
 101       return (GLubyte *)buffer;
 102
 103    default:
 104       return NULL;
 105    }
 106 }
 107
 108
 109 /* Extension strings exported by the R100 driver.
 110  */
 111 const struct dri_extension card_extensions[] =
 112 {
 113     { "GL_ARB_multisample",                GL_ARB_multisample_functions },
 114     { "GL_ARB_multitexture",               NULL },
 115     { "GL_ARB_texture_border_clamp",       NULL },
 116     { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
 117     { "GL_ARB_texture_env_add",            NULL },
 118     { "GL_ARB_texture_env_combine",        NULL },
 119     { "GL_ARB_texture_env_crossbar",       NULL },
 120     { "GL_ARB_texture_env_dot3",           NULL },
 121     { "GL_ARB_texture_mirrored_repeat",    NULL },
 122     { "GL_ARB_vertex_buffer_object",       GL_ARB_vertex_buffer_object_functions },
 123     { "GL_EXT_blend_logic_op",             NULL },
 124     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
 125     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 126     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
 127     { "GL_EXT_stencil_wrap",               NULL },
 128     { "GL_EXT_texture_edge_clamp",         NULL },
 129     { "GL_EXT_texture_env_combine",        NULL },
 130     { "GL_EXT_texture_env_dot3",           NULL },
 131     { "GL_EXT_texture_filter_anisotropic", NULL },
 132     { "GL_EXT_texture_lod_bias",           NULL },
 133     { "GL_EXT_texture_mirror_clamp",       NULL },
 134     { "GL_ATI_texture_env_combine3",       NULL },
 135     { "GL_ATI_texture_mirror_once",        NULL },
 136     { "GL_MESA_ycbcr_texture",             NULL },
 137     { "GL_NV_blend_square",                NULL },
 138     { "GL_SGIS_generate_mipmap",           NULL },
 139     { NULL,                                NULL }
 140 };
 141
 142 extern const struct tnl_pipeline_stage _radeon_render_stage;
 143 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 144
 145 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 146
 147    /* Try and go straight to t&l
 148     */
 149    &_radeon_tcl_stage,
 150
 151    /* Catch any t&l fallbacks
 152     */
 153    &_tnl_vertex_transform_stage,
 154    &_tnl_normal_transform_stage,
 155    &_tnl_lighting_stage,
 156    &_tnl_fog_coordinate_stage,
 157    &_tnl_texgen_stage,
 158    &_tnl_texture_transform_stage,
 159
 160    &_radeon_render_stage,
 161    &_tnl_render_stage,          /* FALLBACK:  */
 162    NULL,
 163 };
 164
 165
 166
 167 /* Initialize the driver's misc functions.
 168  */
 169 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 170 {
 171     functions->GetString        = radeonGetString;
 172 }
 173
 174 static const struct dri_debug_control debug_control[] =
 175 {
 176     { "fall",  DEBUG_FALLBACKS },
 177     { "tex",   DEBUG_TEXTURE },
 178     { "ioctl", DEBUG_IOCTL },
 179     { "prim",  DEBUG_PRIMS },
 180     { "vert",  DEBUG_VERTS },
 181     { "state", DEBUG_STATE },
 182     { "code",  DEBUG_CODEGEN },
 183     { "vfmt",  DEBUG_VFMT },
 184     { "vtxf",  DEBUG_VFMT },
 185     { "verb",  DEBUG_VERBOSE },
 186     { "dri",   DEBUG_DRI },
 187     { "dma",   DEBUG_DMA },
 188     { "san",   DEBUG_SANITY },
 189     { "sync",  DEBUG_SYNC },
 190     { NULL,    0 }
 191 };
 192
 193 static void r100_get_lock(radeonContextPtr radeon)
 194 {
 195    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 196    drm_radeon_sarea_t *sarea = radeon->sarea;
 197
 198    RADEON_STATECHANGE(rmesa, ctx);
 199    if (rmesa->radeon.sarea->tiling_enabled) {
 200       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
 201          RADEON_COLOR_TILE_ENABLE;
 202    } else {
 203       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
 204          ~RADEON_COLOR_TILE_ENABLE;
 205    }
 206
 207    if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
 208       int i;
 209       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 210
 211       for (i = 0; i < rmesa->radeon.nr_heaps; i++) {
 212          DRI_AGE_TEXTURES(rmesa->radeon.texture_heaps[i]);
 213       }
 214    }
 215 }
 216
 217 static void r100_vtbl_flush(GLcontext *ctx)
 218 {
 219    RADEON_FIREVERTICES(R100_CONTEXT(ctx));
 220 }
 221
 222 static void r100_vtbl_set_all_dirty(GLcontext *ctx)
 223 {
 224    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 225    rmesa->hw.all_dirty = GL_TRUE;
 226 }
 227
 228 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 229 {
 230 }
 231
 232 static void r100_vtbl_emit_state(radeonContextPtr rmesa)
 233 {
 234         radeonEmitState((r100ContextPtr)rmesa);
 235 }
 236
 237 static void r100_init_vtbl(radeonContextPtr radeon)
 238 {
 239    radeon->vtbl.get_lock = r100_get_lock;
 240    radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
 241    radeon->vtbl.flush = r100_vtbl_flush;
 242    radeon->vtbl.set_all_dirty = r100_vtbl_set_all_dirty;
 243    radeon->vtbl.update_draw_buffer = radeonUpdateDrawBuffer;
 244    radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
 245    radeon->vtbl.emit_state = r100_vtbl_emit_state;
 246 }
 247
 248 /* Create the device specific context.
 249  */
 250 GLboolean
 251 radeonCreateContext( const __GLcontextModes *glVisual,
 252                      __DRIcontextPrivate *driContextPriv,
 253                      void *sharedContextPrivate)
 254 {
 255    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 256    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 257    struct dd_function_table functions;
 258    r100ContextPtr rmesa;
 259    GLcontext *ctx, *shareCtx;
 260    int i;
 261    int tcl_mode, fthrottle_mode;
 262
 263    assert(glVisual);
 264    assert(driContextPriv);
 265    assert(screen);
 266
 267    /* Allocate the Radeon context */
 268    rmesa = (r100ContextPtr) CALLOC( sizeof(*rmesa) );
 269    if ( !rmesa )
 270       return GL_FALSE;
 271
 272    r100_init_vtbl(&rmesa->radeon);
 273
 274    /* init exp fog table data */
 275    radeonInitStaticFogData();
 276
 277    /* Parse configuration files.
 278     * Do this here so that initialMaxAnisotropy is set before we create
 279     * the default textures.
 280     */
 281    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 282                         screen->driScreen->myNum, "radeon");
 283    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 284                                                  "def_max_anisotropy");
 285
 286    if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 287       if ( sPriv->drm_version.minor < 13 )
 288          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 289                           "disabling.\n", sPriv->drm_version.minor );
 290       else
 291          rmesa->using_hyperz = GL_TRUE;
 292    }
 293
 294    if ( sPriv->drm_version.minor >= 15 )
 295       rmesa->texmicrotile = GL_TRUE;
 296
 297    /* Init default driver functions then plug in our Radeon-specific functions
 298     * (the texture functions are especially important)
 299     */
 300    _mesa_init_driver_functions( &functions );
 301    radeonInitDriverFuncs( &functions );
 302    radeonInitTextureFuncs( &functions );
 303
 304    if (!radeonInitContext(&rmesa->radeon, &functions,
 305                           glVisual, driContextPriv,
 306                           sharedContextPrivate)) {
 307      FREE(rmesa);
 308      return GL_FALSE;
 309    }
 310
 311    (void) memset( rmesa->radeon.texture_heaps, 0, sizeof( rmesa->radeon.texture_heaps ) );
 312    make_empty_list( & rmesa->radeon.swapped );
 313
 314    rmesa->radeon.nr_heaps = screen->numTexHeaps;
 315    for ( i = 0 ; i < rmesa->radeon.nr_heaps ; i++ ) {
 316       rmesa->radeon.texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 317             screen->texSize[i],
 318             12,
 319             RADEON_NR_TEX_REGIONS,
 320             (drmTextureRegionPtr)rmesa->radeon.sarea->tex_list[i],
 321             & rmesa->radeon.sarea->tex_age[i],
 322             & rmesa->radeon.swapped,
 323             sizeof( radeonTexObj ),
 324             (destroy_texture_object_t *) radeonDestroyTexObj );
 325
 326       driSetTextureSwapCounterLocation( rmesa->radeon.texture_heaps[i],
 327                                         & rmesa->c_textureSwaps );
 328    }
 329    rmesa->radeon.texture_depth = driQueryOptioni (&rmesa->radeon.optionCache,
 330                                            "texture_depth");
 331    if (rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 332       rmesa->radeon.texture_depth = ( screen->cpp == 4 ) ?
 333          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 334
 335    rmesa->swtcl.RenderIndex = ~0;
 336    rmesa->hw.all_dirty = GL_TRUE;
 337
 338    /* Set the maximum texture size small enough that we can guarentee that
 339     * all texture units can bind a maximal texture and have all of them in
 340     * texturable memory at once. Depending on the allow_large_textures driconf
 341     * setting allow larger textures.
 342     */
 343
 344    ctx = rmesa->radeon.glCtx;
 345    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 346                                                  "texture_units");
 347    ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 348    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 349
 350    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
 351
 352    driCalculateMaxTextureLevels( rmesa->radeon.texture_heaps,
 353                                  rmesa->radeon.nr_heaps,
 354                                  & ctx->Const,
 355                                  4,
 356                                  11, /* max 2D texture size is 2048x2048 */
 357                                  8,  /* 256^3 */
 358                                  9,  /* \todo: max cube texture size seems to be 512x512(x6) */
 359                                  11, /* max rect texture size is 2048x2048. */
 360                                  12,
 361                                  GL_FALSE,
 362                                  i );
 363
 364
 365    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 366
 367    /* No wide points.
 368     */
 369    ctx->Const.MinPointSize = 1.0;
 370    ctx->Const.MinPointSizeAA = 1.0;
 371    ctx->Const.MaxPointSize = 1.0;
 372    ctx->Const.MaxPointSizeAA = 1.0;
 373
 374    ctx->Const.MinLineWidth = 1.0;
 375    ctx->Const.MinLineWidthAA = 1.0;
 376    ctx->Const.MaxLineWidth = 10.0;
 377    ctx->Const.MaxLineWidthAA = 10.0;
 378    ctx->Const.LineWidthGranularity = 0.0625;
 379
 380    /* Set maxlocksize (and hence vb size) small enough to avoid
 381     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 382     * fit in a single dma buffer for indexed rendering of quad strips,
 383     * etc.
 384     */
 385    ctx->Const.MaxArrayLockSize =
 386       MIN2( ctx->Const.MaxArrayLockSize,
 387             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 388
 389    rmesa->boxes = 0;
 390
 391    /* Initialize the software rasterizer and helper modules.
 392     */
 393    _swrast_CreateContext( ctx );
 394    _vbo_CreateContext( ctx );
 395    _tnl_CreateContext( ctx );
 396    _swsetup_CreateContext( ctx );
 397    _ae_create_context( ctx );
 398
 399    /* Install the customized pipeline:
 400     */
 401    _tnl_destroy_pipeline( ctx );
 402    _tnl_install_pipeline( ctx, radeon_pipeline );
 403
 404    /* Try and keep materials and vertices separate:
 405     */
 406 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 407
 408    /* Configure swrast and T&L to match hardware characteristics:
 409     */
 410    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 411    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 412    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 413    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 414
 415
 416    for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
 417       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 418       _math_matrix_ctr( &rmesa->tmpmat[i] );
 419       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 420       _math_matrix_set_identity( &rmesa->tmpmat[i] );
 421    }
 422
 423    driInitExtensions( ctx, card_extensions, GL_TRUE );
 424    if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100)
 425       _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
 426    if (rmesa->radeon.glCtx->Mesa_DXTn) {
 427       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 428       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 429    }
 430    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 431       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 432    }
 433
 434    if (rmesa->radeon.dri.drmMinor >= 9)
 435       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 436
 437    /* XXX these should really go right after _mesa_init_driver_functions() */
 438    radeonInitIoctlFuncs( ctx );
 439    radeonInitStateFuncs( ctx );
 440    radeonInitSpanFuncs( ctx );
 441    radeonInitState( rmesa );
 442    radeonInitSwtcl( ctx );
 443
 444    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 445                          ctx->Const.MaxArrayLockSize, 32 );
 446
 447    fthrottle_mode = driQueryOptioni(&rmesa->radeon.optionCache, "fthrottle_mode");
 448    rmesa->radeon.iw.irq_seq = -1;
 449    rmesa->radeon.irqsEmitted = 0;
 450    rmesa->radeon.do_irqs = (rmesa->radeon.radeonScreen->irq != 0 &&
 451                             fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 452
 453    rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 454
 455    (*sPriv->systemTime->getUST)( & rmesa->radeon.swap_ust );
 456
 457
 458 #if DO_DEBUG
 459    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 460                                        debug_control );
 461 #endif
 462
 463    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 464    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 465       fprintf(stderr, "disabling 3D acceleration\n");
 466       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 467    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 468               !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 469       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 470          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 471          fprintf(stderr, "Disabling HW TCL support\n");
 472       }
 473       TCL_FALLBACK(rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 474    }
 475
 476    if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 477 /*       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
 478    }
 479    return GL_TRUE;
 480 }
 481
 482
 483 /* Destroy the device specific context.
 484  */
 485 /* Destroy the Mesa and driver specific context data.
 486  */
 487 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 488 {
 489    GET_CURRENT_CONTEXT(ctx);
 490    r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
 491    r100ContextPtr current = ctx ? R100_CONTEXT(ctx) : NULL;
 492
 493    /* check if we're deleting the currently bound context */
 494    if (rmesa == current) {
 495       RADEON_FIREVERTICES( rmesa );
 496       _mesa_make_current(NULL, NULL, NULL);
 497    }
 498
 499    /* Free radeon context resources */
 500    assert(rmesa); /* should never be null */
 501    if ( rmesa ) {
 502       GLboolean   release_texture_heaps;
 503
 504
 505       release_texture_heaps = (rmesa->radeon.glCtx->Shared->RefCount == 1);
 506       _swsetup_DestroyContext( rmesa->radeon.glCtx );
 507       _tnl_DestroyContext( rmesa->radeon.glCtx );
 508       _vbo_DestroyContext( rmesa->radeon.glCtx );
 509       _swrast_DestroyContext( rmesa->radeon.glCtx );
 510
 511       radeonDestroySwtcl( rmesa->radeon.glCtx );
 512       radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
 513       if (rmesa->radeon.dma.current) {
 514          radeonReleaseDmaRegion( &rmesa->radeon );
 515          radeonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
 516       }
 517
 518       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 519
 520       if (rmesa->radeon.state.scissor.pClipRects) {
 521          FREE(rmesa->radeon.state.scissor.pClipRects);
 522          rmesa->radeon.state.scissor.pClipRects = NULL;
 523       }
 524
 525       if ( release_texture_heaps ) {
 526          /* This share group is about to go away, free our private
 527           * texture object data.
 528           */
 529          int i;
 530
 531          for ( i = 0 ; i < rmesa->radeon.nr_heaps ; i++ ) {
 532             driDestroyTextureHeap( rmesa->radeon.texture_heaps[ i ] );
 533             rmesa->radeon.texture_heaps[ i ] = NULL;
 534          }
 535
 536          assert( is_empty_list( & rmesa->radeon.swapped ) );
 537       }
 538
 539       radeonCleanupContext(&rmesa->radeon);
 540
 541       FREE( rmesa );
 542    }
 543 }
 544
 545
 546 /* Force the context `c' to be unbound from its buffer.
 547  */
 548 GLboolean
 549 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 550 {
 551    r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
 552
 553    if (RADEON_DEBUG & DEBUG_DRI)
 554       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->radeon.glCtx);
 555
 556    return GL_TRUE;
 557 }