src/mesa/drivers/dri/radeon/radeon_context.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *   Keith Whitwell <keith@tungstengraphics.com>
  36  */
  37
  38 #include "glheader.h"
  39 #include "api_arrayelt.h"
  40 #include "context.h"
  41 #include "simple_list.h"
  42 #include "imports.h"
  43 #include "matrix.h"
  44 #include "extensions.h"
  45 #include "framebuffer.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "array_cache/acache.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_context.h"
  57 #include "radeon_ioctl.h"
  58 #include "radeon_state.h"
  59 #include "radeon_span.h"
  60 #include "radeon_tex.h"
  61 #include "radeon_swtcl.h"
  62 #include "radeon_tcl.h"
  63 #include "radeon_vtxfmt.h"
  64 #include "radeon_maos.h"
  65
  66 #define need_GL_ARB_multisample
  67 #define need_GL_ARB_texture_compression
  68 #define need_GL_EXT_blend_minmax
  69 #define need_GL_EXT_secondary_color
  70 #include "extension_helper.h"
  71
  72 #define DRIVER_DATE     "20050831"
  73
  74 #include "vblank.h"
  75 #include "utils.h"
  76 #include "xmlpool.h" /* for symbolic values of enum-type options */
  77 #ifndef RADEON_DEBUG
  78 int RADEON_DEBUG = (0);
  79 #endif
  80
  81
  82 /* Return the width and height of the given buffer.
  83  */
  84 static void radeonGetBufferSize( GLframebuffer *buffer,
  85                                  GLuint *width, GLuint *height )
  86 {
  87    GET_CURRENT_CONTEXT(ctx);
  88    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  89
  90    LOCK_HARDWARE( rmesa );
  91    *width  = rmesa->dri.drawable->w;
  92    *height = rmesa->dri.drawable->h;
  93
  94    UNLOCK_HARDWARE( rmesa );
  95 }
  96
  97 /* Return various strings for glGetString().
  98  */
  99 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
 100 {
 101    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 102    static char buffer[128];
 103    unsigned   offset;
 104    GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
 105       rmesa->radeonScreen->AGPMode;
 106
 107    switch ( name ) {
 108    case GL_VENDOR:
 109       return (GLubyte *)"Tungsten Graphics, Inc.";
 110
 111    case GL_RENDERER:
 112       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
 113                                      agp_mode );
 114
 115       sprintf( & buffer[ offset ], " %sTCL",
 116                !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 117                ? "" : "NO-" );
 118
 119       return (GLubyte *)buffer;
 120
 121    default:
 122       return NULL;
 123    }
 124 }
 125
 126
 127 /* Extension strings exported by the R100 driver.
 128  */
 129 const struct dri_extension card_extensions[] =
 130 {
 131     { "GL_ARB_multisample",                GL_ARB_multisample_functions },
 132     { "GL_ARB_multitexture",               NULL },
 133     { "GL_ARB_texture_border_clamp",       NULL },
 134     { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
 135     { "GL_ARB_texture_env_add",            NULL },
 136     { "GL_ARB_texture_env_combine",        NULL },
 137     { "GL_ARB_texture_env_crossbar",       NULL },
 138     { "GL_ARB_texture_env_dot3",           NULL },
 139     { "GL_ARB_texture_mirrored_repeat",    NULL },
 140     { "GL_EXT_blend_logic_op",             NULL },
 141     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
 142     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
 143     { "GL_EXT_stencil_wrap",               NULL },
 144     { "GL_EXT_texture_edge_clamp",         NULL },
 145     { "GL_EXT_texture_env_combine",        NULL },
 146     { "GL_EXT_texture_env_dot3",           NULL },
 147     { "GL_EXT_texture_filter_anisotropic", NULL },
 148     { "GL_EXT_texture_lod_bias",           NULL },
 149     { "GL_EXT_texture_mirror_clamp",       NULL },
 150     { "GL_ATI_texture_env_combine3",       NULL },
 151     { "GL_ATI_texture_mirror_once",        NULL },
 152     { "GL_MESA_ycbcr_texture",             NULL },
 153     { "GL_NV_blend_square",                NULL },
 154     { "GL_SGIS_generate_mipmap",           NULL },
 155     { NULL,                                NULL }
 156 };
 157
 158 extern const struct tnl_pipeline_stage _radeon_texrect_stage;
 159 extern const struct tnl_pipeline_stage _radeon_render_stage;
 160 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 161
 162 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 163
 164    /* Try and go straight to t&l
 165     */
 166    &_radeon_tcl_stage,
 167
 168    /* Catch any t&l fallbacks
 169     */
 170    &_tnl_vertex_transform_stage,
 171    &_tnl_normal_transform_stage,
 172    &_tnl_lighting_stage,
 173    &_tnl_fog_coordinate_stage,
 174    &_tnl_texgen_stage,
 175    &_tnl_texture_transform_stage,
 176
 177    /* Scale texture rectangle to 0..1.
 178     */
 179    &_radeon_texrect_stage,
 180
 181    &_radeon_render_stage,
 182    &_tnl_render_stage,          /* FALLBACK:  */
 183    NULL,
 184 };
 185
 186
 187
 188 /* Initialize the driver's misc functions.
 189  */
 190 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 191 {
 192     functions->GetBufferSize    = radeonGetBufferSize;
 193     functions->ResizeBuffers    = _mesa_resize_framebuffer;
 194     functions->GetString        = radeonGetString;
 195 }
 196
 197 static const struct dri_debug_control debug_control[] =
 198 {
 199     { "fall",  DEBUG_FALLBACKS },
 200     { "tex",   DEBUG_TEXTURE },
 201     { "ioctl", DEBUG_IOCTL },
 202     { "prim",  DEBUG_PRIMS },
 203     { "vert",  DEBUG_VERTS },
 204     { "state", DEBUG_STATE },
 205     { "code",  DEBUG_CODEGEN },
 206     { "vfmt",  DEBUG_VFMT },
 207     { "vtxf",  DEBUG_VFMT },
 208     { "verb",  DEBUG_VERBOSE },
 209     { "dri",   DEBUG_DRI },
 210     { "dma",   DEBUG_DMA },
 211     { "san",   DEBUG_SANITY },
 212     { "sync",  DEBUG_SYNC },
 213     { NULL,    0 }
 214 };
 215
 216
 217 /* Create the device specific context.
 218  */
 219 GLboolean
 220 radeonCreateContext( const __GLcontextModes *glVisual,
 221                      __DRIcontextPrivate *driContextPriv,
 222                      void *sharedContextPrivate)
 223 {
 224    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 225    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 226    struct dd_function_table functions;
 227    radeonContextPtr rmesa;
 228    GLcontext *ctx, *shareCtx;
 229    int i;
 230    int tcl_mode, fthrottle_mode;
 231
 232    assert(glVisual);
 233    assert(driContextPriv);
 234    assert(screen);
 235
 236    /* Allocate the Radeon context */
 237    rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
 238    if ( !rmesa )
 239       return GL_FALSE;
 240
 241    /* Parse configuration files.
 242     * Do this here so that initialMaxAnisotropy is set before we create
 243     * the default textures.
 244     */
 245    driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
 246                         screen->driScreen->myNum, "radeon");
 247    rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
 248                                                  "def_max_anisotropy");
 249
 250    if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
 251       if ( sPriv->drmMinor < 13 )
 252          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 253                           "disabling.\n",sPriv->drmMinor );
 254       else
 255          rmesa->using_hyperz = GL_TRUE;
 256    }
 257
 258    if ( sPriv->drmMinor >= 15 )
 259       rmesa->texmicrotile = GL_TRUE;
 260
 261    /* Init default driver functions then plug in our Radeon-specific functions
 262     * (the texture functions are especially important)
 263     */
 264    _mesa_init_driver_functions( &functions );
 265    radeonInitDriverFuncs( &functions );
 266    radeonInitTextureFuncs( &functions );
 267
 268    /* Allocate the Mesa context */
 269    if (sharedContextPrivate)
 270       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
 271    else
 272       shareCtx = NULL;
 273    rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
 274                                        &functions, (void *) rmesa);
 275    if (!rmesa->glCtx) {
 276       FREE(rmesa);
 277       return GL_FALSE;
 278    }
 279    driContextPriv->driverPrivate = rmesa;
 280
 281    /* Init radeon context data */
 282    rmesa->dri.context = driContextPriv;
 283    rmesa->dri.screen = sPriv;
 284    rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
 285    rmesa->dri.hwContext = driContextPriv->hHWContext;
 286    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
 287    rmesa->dri.fd = sPriv->fd;
 288    rmesa->dri.drmMinor = sPriv->drmMinor;
 289
 290    rmesa->radeonScreen = screen;
 291    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 292                                        screen->sarea_priv_offset);
 293
 294
 295    rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
 296
 297    (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
 298    make_empty_list( & rmesa->swapped );
 299
 300    rmesa->nr_heaps = screen->numTexHeaps;
 301    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 302       rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 303             screen->texSize[i],
 304             12,
 305             RADEON_NR_TEX_REGIONS,
 306             (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
 307             & rmesa->sarea->tex_age[i],
 308             & rmesa->swapped,
 309             sizeof( radeonTexObj ),
 310             (destroy_texture_object_t *) radeonDestroyTexObj );
 311
 312       driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
 313                                         & rmesa->c_textureSwaps );
 314    }
 315    rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
 316                                            "texture_depth");
 317    if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 318       rmesa->texture_depth = ( screen->cpp == 4 ) ?
 319          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 320
 321    rmesa->swtcl.RenderIndex = ~0;
 322    rmesa->hw.all_dirty = GL_TRUE;
 323
 324    /* Set the maximum texture size small enough that we can guarentee that
 325     * all texture units can bind a maximal texture and have them both in
 326     * texturable memory at once.
 327     */
 328
 329    ctx = rmesa->glCtx;
 330    ctx->Const.MaxTextureUnits = 2;
 331    ctx->Const.MaxTextureImageUnits = 2;
 332    ctx->Const.MaxTextureCoordUnits = 2;
 333
 334    driCalculateMaxTextureLevels( rmesa->texture_heaps,
 335                                  rmesa->nr_heaps,
 336                                  & ctx->Const,
 337                                  4,
 338                                  11, /* max 2D texture size is 2048x2048 */
 339                                  0,  /* 3D textures unsupported. */
 340                                  0,  /* cube textures unsupported. */
 341                                  11, /* max rect texture size is 2048x2048. */
 342                                  12,
 343                                  GL_FALSE );
 344
 345    /* adjust max texture size a bit. Hack, but I really want to use larger textures
 346       which will work just fine in 99.999999% of all cases, especially with texture compression... */
 347    if (driQueryOptionb( &rmesa->optionCache, "texture_level_hack" ))
 348    {
 349      if (ctx->Const.MaxTextureLevels < 12) ctx->Const.MaxTextureLevels += 1;
 350    }
 351
 352    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 353
 354    /* No wide points.
 355     */
 356    ctx->Const.MinPointSize = 1.0;
 357    ctx->Const.MinPointSizeAA = 1.0;
 358    ctx->Const.MaxPointSize = 1.0;
 359    ctx->Const.MaxPointSizeAA = 1.0;
 360
 361    ctx->Const.MinLineWidth = 1.0;
 362    ctx->Const.MinLineWidthAA = 1.0;
 363    ctx->Const.MaxLineWidth = 10.0;
 364    ctx->Const.MaxLineWidthAA = 10.0;
 365    ctx->Const.LineWidthGranularity = 0.0625;
 366
 367    /* Set maxlocksize (and hence vb size) small enough to avoid
 368     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 369     * fit in a single dma buffer for indexed rendering of quad strips,
 370     * etc.
 371     */
 372    ctx->Const.MaxArrayLockSize =
 373       MIN2( ctx->Const.MaxArrayLockSize,
 374             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 375
 376    rmesa->boxes = 0;
 377
 378    /* Initialize the software rasterizer and helper modules.
 379     */
 380    _swrast_CreateContext( ctx );
 381    _ac_CreateContext( ctx );
 382    _tnl_CreateContext( ctx );
 383    _swsetup_CreateContext( ctx );
 384    _ae_create_context( ctx );
 385
 386    /* Install the customized pipeline:
 387     */
 388    _tnl_destroy_pipeline( ctx );
 389    _tnl_install_pipeline( ctx, radeon_pipeline );
 390    ctx->Driver.FlushVertices = radeonFlushVertices;
 391
 392    /* Try and keep materials and vertices separate:
 393     */
 394    _tnl_isolate_materials( ctx, GL_TRUE );
 395
 396 /*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
 397
 398    /* Configure swrast and T&L to match hardware characteristics:
 399     */
 400    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 401    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 402    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 403    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 404
 405
 406    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
 407    _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
 408    _math_matrix_ctr( &rmesa->tmpmat[0] );
 409    _math_matrix_ctr( &rmesa->tmpmat[1] );
 410    _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
 411    _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
 412    _math_matrix_set_identity( &rmesa->tmpmat[0] );
 413    _math_matrix_set_identity( &rmesa->tmpmat[1] );
 414
 415    driInitExtensions( ctx, card_extensions, GL_TRUE );
 416    if (rmesa->glCtx->Mesa_DXTn) {
 417       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 418       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 419    }
 420    else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
 421       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 422    }
 423
 424    if (rmesa->dri.drmMinor >= 9)
 425       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 426
 427    /* XXX these should really go right after _mesa_init_driver_functions() */
 428    radeonInitIoctlFuncs( ctx );
 429    radeonInitStateFuncs( ctx );
 430    radeonInitSpanFuncs( ctx );
 431    radeonInitState( rmesa );
 432    radeonInitSwtcl( ctx );
 433
 434    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 435                          ctx->Const.MaxArrayLockSize, 32 );
 436
 437    fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
 438    rmesa->iw.irq_seq = -1;
 439    rmesa->irqsEmitted = 0;
 440    rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
 441                      fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 442
 443    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 444
 445    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
 446        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
 447
 448    (*dri_interface->getUST)( & rmesa->swap_ust );
 449
 450
 451 #if DO_DEBUG
 452    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 453                                        debug_control );
 454 #endif
 455
 456    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 457    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
 458       fprintf(stderr, "disabling 3D acceleration\n");
 459       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 460    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 461               !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
 462       if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 463          rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
 464          fprintf(stderr, "Disabling HW TCL support\n");
 465       }
 466       TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 467    }
 468
 469    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 470       if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 471          radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
 472
 473       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
 474    }
 475    return GL_TRUE;
 476 }
 477
 478
 479 /* Destroy the device specific context.
 480  */
 481 /* Destroy the Mesa and driver specific context data.
 482  */
 483 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 484 {
 485    GET_CURRENT_CONTEXT(ctx);
 486    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 487    radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 488
 489    /* check if we're deleting the currently bound context */
 490    if (rmesa == current) {
 491       RADEON_FIREVERTICES( rmesa );
 492       _mesa_make_current(NULL, NULL, NULL);
 493    }
 494
 495    /* Free radeon context resources */
 496    assert(rmesa); /* should never be null */
 497    if ( rmesa ) {
 498       GLboolean   release_texture_heaps;
 499
 500
 501       release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
 502       _swsetup_DestroyContext( rmesa->glCtx );
 503       _tnl_DestroyContext( rmesa->glCtx );
 504       _ac_DestroyContext( rmesa->glCtx );
 505       _swrast_DestroyContext( rmesa->glCtx );
 506
 507       radeonDestroySwtcl( rmesa->glCtx );
 508       radeonReleaseArrays( rmesa->glCtx, ~0 );
 509       if (rmesa->dma.current.buf) {
 510          radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
 511          radeonFlushCmdBuf( rmesa, __FUNCTION__ );
 512       }
 513
 514       if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
 515          int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 516          if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 517             radeonVtxfmtDestroy( rmesa->glCtx );
 518       }
 519
 520       /* free the Mesa context */
 521       rmesa->glCtx->DriverCtx = NULL;
 522       _mesa_destroy_context( rmesa->glCtx );
 523
 524       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 525
 526       if (rmesa->state.scissor.pClipRects) {
 527          FREE(rmesa->state.scissor.pClipRects);
 528          rmesa->state.scissor.pClipRects = NULL;
 529       }
 530
 531       if ( release_texture_heaps ) {
 532          /* This share group is about to go away, free our private
 533           * texture object data.
 534           */
 535          int i;
 536
 537          for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 538             driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
 539             rmesa->texture_heaps[ i ] = NULL;
 540          }
 541
 542          assert( is_empty_list( & rmesa->swapped ) );
 543       }
 544
 545       /* free the option cache */
 546       driDestroyOptionCache (&rmesa->optionCache);
 547
 548       FREE( rmesa );
 549    }
 550 }
 551
 552
 553
 554
 555 void
 556 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
 557 {
 558
 559    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
 560       radeonContextPtr rmesa;
 561       GLcontext *ctx;
 562       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 563       ctx = rmesa->glCtx;
 564       if (ctx->Visual.doubleBufferMode) {
 565          _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
 566
 567          if ( rmesa->doPageFlip ) {
 568             radeonPageFlip( dPriv );
 569          }
 570          else {
 571             radeonCopyBuffer( dPriv );
 572          }
 573       }
 574    }
 575    else {
 576       /* XXX this shouldn't be an error but we can't handle it for now */
 577       _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
 578    }
 579 }
 580
 581
 582 /* Make context `c' the current context and bind it to the given
 583  * drawing and reading surfaces.
 584  */
 585 GLboolean
 586 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
 587                    __DRIdrawablePrivate *driDrawPriv,
 588                    __DRIdrawablePrivate *driReadPriv )
 589 {
 590    if ( driContextPriv ) {
 591       radeonContextPtr newCtx =
 592          (radeonContextPtr) driContextPriv->driverPrivate;
 593
 594       if (RADEON_DEBUG & DEBUG_DRI)
 595          fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 596
 597       if ( newCtx->dri.drawable != driDrawPriv ) {
 598          /* XXX we may need to validate the drawable here!!! */
 599          driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
 600          newCtx->dri.drawable = driDrawPriv;
 601          radeonUpdateWindow( newCtx->glCtx );
 602          radeonUpdateViewportOffset( newCtx->glCtx );
 603       }
 604
 605       _mesa_make_current( newCtx->glCtx,
 606                           (GLframebuffer *) driDrawPriv->driverPrivate,
 607                           (GLframebuffer *) driReadPriv->driverPrivate );
 608
 609       if (newCtx->vb.enabled)
 610          radeonVtxfmtMakeCurrent( newCtx->glCtx );
 611
 612    } else {
 613       if (RADEON_DEBUG & DEBUG_DRI)
 614          fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 615       _mesa_make_current( NULL, NULL, NULL );
 616    }
 617
 618    if (RADEON_DEBUG & DEBUG_DRI)
 619       fprintf(stderr, "End %s\n", __FUNCTION__);
 620    return GL_TRUE;
 621 }
 622
 623 /* Force the context `c' to be unbound from its buffer.
 624  */
 625 GLboolean
 626 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 627 {
 628    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 629
 630    if (RADEON_DEBUG & DEBUG_DRI)
 631       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 632
 633    return GL_TRUE;
 634 }