src/mesa/drivers/dri/radeon/radeon_context.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Kevin E. Martin <martin@valinux.com>
  33  *   Gareth Hughes <gareth@valinux.com>
  34  *   Keith Whitwell <keith@tungstengraphics.com>
  35  */
  36
  37 #include "main/glheader.h"
  38 #include "main/api_arrayelt.h"
  39 #include "main/context.h"
  40 #include "main/simple_list.h"
  41 #include "main/imports.h"
  42 #include "main/matrix.h"
  43 #include "main/extensions.h"
  44 #include "main/framebuffer.h"
  45 #include "main/state.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "vbo/vbo.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_common.h"
  57 #include "radeon_context.h"
  58 #include "radeon_ioctl.h"
  59 #include "radeon_state.h"
  60 #include "radeon_span.h"
  61 #include "radeon_tex.h"
  62 #include "radeon_swtcl.h"
  63 #include "radeon_tcl.h"
  64 #include "radeon_maos.h"
  65
  66 #define need_GL_EXT_blend_minmax
  67 #define need_GL_EXT_fog_coord
  68 #define need_GL_EXT_secondary_color
  69 #define need_GL_EXT_framebuffer_object
  70 #include "extension_helper.h"
  71
  72 #define DRIVER_DATE     "20061018"
  73
  74 #include "vblank.h"
  75 #include "utils.h"
  76 #include "xmlpool.h" /* for symbolic values of enum-type options */
  77
  78 /* Extension strings exported by the R100 driver.
  79  */
  80 const struct dri_extension card_extensions[] =
  81 {
  82     { "GL_ARB_multitexture",               NULL },
  83     { "GL_ARB_texture_border_clamp",       NULL },
  84     { "GL_ARB_texture_env_add",            NULL },
  85     { "GL_ARB_texture_env_combine",        NULL },
  86     { "GL_ARB_texture_env_crossbar",       NULL },
  87     { "GL_ARB_texture_env_dot3",           NULL },
  88     { "GL_ARB_texture_mirrored_repeat",    NULL },
  89     { "GL_EXT_blend_logic_op",             NULL },
  90     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
  91     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
  92     { "GL_EXT_packed_depth_stencil",       NULL},
  93     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
  94     { "GL_EXT_stencil_wrap",               NULL },
  95     { "GL_EXT_texture_edge_clamp",         NULL },
  96     { "GL_EXT_texture_env_combine",        NULL },
  97     { "GL_EXT_texture_env_dot3",           NULL },
  98     { "GL_EXT_texture_filter_anisotropic", NULL },
  99     { "GL_EXT_texture_lod_bias",           NULL },
 100     { "GL_EXT_texture_mirror_clamp",       NULL },
 101     { "GL_ATI_texture_env_combine3",       NULL },
 102     { "GL_ATI_texture_mirror_once",        NULL },
 103     { "GL_MESA_ycbcr_texture",             NULL },
 104     { "GL_NV_blend_square",                NULL },
 105     { "GL_SGIS_generate_mipmap",           NULL },
 106     { NULL,                                NULL }
 107 };
 108
 109 const struct dri_extension mm_extensions[] = {
 110   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 111   { NULL, NULL }
 112 };
 113
 114 extern const struct tnl_pipeline_stage _radeon_render_stage;
 115 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 116
 117 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 118
 119    /* Try and go straight to t&l
 120     */
 121    &_radeon_tcl_stage,
 122
 123    /* Catch any t&l fallbacks
 124     */
 125    &_tnl_vertex_transform_stage,
 126    &_tnl_normal_transform_stage,
 127    &_tnl_lighting_stage,
 128    &_tnl_fog_coordinate_stage,
 129    &_tnl_texgen_stage,
 130    &_tnl_texture_transform_stage,
 131
 132    &_radeon_render_stage,
 133    &_tnl_render_stage,          /* FALLBACK:  */
 134    NULL,
 135 };
 136
 137 static const struct dri_debug_control debug_control[] =
 138 {
 139     { "fall",  DEBUG_FALLBACKS },
 140     { "tex",   DEBUG_TEXTURE },
 141     { "ioctl", DEBUG_IOCTL },
 142     { "prim",  DEBUG_PRIMS },
 143     { "vert",  DEBUG_VERTS },
 144     { "state", DEBUG_STATE },
 145     { "code",  DEBUG_CODEGEN },
 146     { "vfmt",  DEBUG_VFMT },
 147     { "vtxf",  DEBUG_VFMT },
 148     { "verb",  DEBUG_VERBOSE },
 149     { "dri",   DEBUG_DRI },
 150     { "dma",   DEBUG_DMA },
 151     { "san",   DEBUG_SANITY },
 152     { "sync",  DEBUG_SYNC },
 153     { NULL,    0 }
 154 };
 155
 156 static void r100_get_lock(radeonContextPtr radeon)
 157 {
 158    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 159    drm_radeon_sarea_t *sarea = radeon->sarea;
 160
 161    RADEON_STATECHANGE(rmesa, ctx);
 162    if (rmesa->radeon.sarea->tiling_enabled) {
 163       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
 164          RADEON_COLOR_TILE_ENABLE;
 165    } else {
 166       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
 167          ~RADEON_COLOR_TILE_ENABLE;
 168    }
 169
 170    if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
 171       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 172
 173       if (!radeon->radeonScreen->kernel_mm)
 174          radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
 175    }
 176 }
 177
 178 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 179 {
 180 }
 181
 182 static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
 183 {
 184    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 185
 186    /* r100 always needs to emit ZBS to avoid TCL lockups */
 187    rmesa->hw.zbs.dirty = 1;
 188    radeon->hw.is_dirty = 1;
 189 }
 190
 191
 192 static void r100_init_vtbl(radeonContextPtr radeon)
 193 {
 194    radeon->vtbl.get_lock = r100_get_lock;
 195    radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
 196    radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
 197    radeon->vtbl.swtcl_flush = r100_swtcl_flush;
 198    radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
 199    radeon->vtbl.fallback = radeonFallback;
 200 }
 201
 202 /* Create the device specific context.
 203  */
 204 GLboolean
 205 radeonCreateContext( const __GLcontextModes *glVisual,
 206                      __DRIcontextPrivate *driContextPriv,
 207                      void *sharedContextPrivate)
 208 {
 209    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 210    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 211    struct dd_function_table functions;
 212    r100ContextPtr rmesa;
 213    GLcontext *ctx;
 214    int i;
 215    int tcl_mode, fthrottle_mode;
 216
 217    assert(glVisual);
 218    assert(driContextPriv);
 219    assert(screen);
 220
 221    /* Allocate the Radeon context */
 222    rmesa = (r100ContextPtr) CALLOC( sizeof(*rmesa) );
 223    if ( !rmesa )
 224       return GL_FALSE;
 225
 226    r100_init_vtbl(&rmesa->radeon);
 227
 228    /* init exp fog table data */
 229    radeonInitStaticFogData();
 230
 231    /* Parse configuration files.
 232     * Do this here so that initialMaxAnisotropy is set before we create
 233     * the default textures.
 234     */
 235    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 236                         screen->driScreen->myNum, "radeon");
 237    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 238                                                  "def_max_anisotropy");
 239
 240    if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 241       if ( sPriv->drm_version.minor < 13 )
 242          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 243                           "disabling.\n", sPriv->drm_version.minor );
 244       else
 245          rmesa->using_hyperz = GL_TRUE;
 246    }
 247
 248    if ( sPriv->drm_version.minor >= 15 )
 249       rmesa->texmicrotile = GL_TRUE;
 250
 251    /* Init default driver functions then plug in our Radeon-specific functions
 252     * (the texture functions are especially important)
 253     */
 254    _mesa_init_driver_functions( &functions );
 255    radeonInitTextureFuncs( &functions );
 256
 257    if (!radeonInitContext(&rmesa->radeon, &functions,
 258                           glVisual, driContextPriv,
 259                           sharedContextPrivate)) {
 260      FREE(rmesa);
 261      return GL_FALSE;
 262    }
 263
 264    rmesa->radeon.texture_depth = driQueryOptioni (&rmesa->radeon.optionCache,
 265                                            "texture_depth");
 266    if (rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 267       rmesa->radeon.texture_depth = ( screen->cpp == 4 ) ?
 268          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 269
 270    rmesa->radeon.swtcl.RenderIndex = ~0;
 271    rmesa->radeon.hw.all_dirty = GL_TRUE;
 272
 273    /* Set the maximum texture size small enough that we can guarentee that
 274     * all texture units can bind a maximal texture and have all of them in
 275     * texturable memory at once. Depending on the allow_large_textures driconf
 276     * setting allow larger textures.
 277     */
 278
 279    ctx = rmesa->radeon.glCtx;
 280    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 281                                                  "texture_units");
 282    ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 283    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 284
 285    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
 286
 287    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 288
 289    /* No wide points.
 290     */
 291    ctx->Const.MinPointSize = 1.0;
 292    ctx->Const.MinPointSizeAA = 1.0;
 293    ctx->Const.MaxPointSize = 1.0;
 294    ctx->Const.MaxPointSizeAA = 1.0;
 295
 296    ctx->Const.MinLineWidth = 1.0;
 297    ctx->Const.MinLineWidthAA = 1.0;
 298    ctx->Const.MaxLineWidth = 10.0;
 299    ctx->Const.MaxLineWidthAA = 10.0;
 300    ctx->Const.LineWidthGranularity = 0.0625;
 301
 302    /* Set maxlocksize (and hence vb size) small enough to avoid
 303     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 304     * fit in a single dma buffer for indexed rendering of quad strips,
 305     * etc.
 306     */
 307    ctx->Const.MaxArrayLockSize =
 308       MIN2( ctx->Const.MaxArrayLockSize,
 309             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 310
 311    rmesa->boxes = 0;
 312
 313    ctx->Const.MaxDrawBuffers = 1;
 314
 315    /* Initialize the software rasterizer and helper modules.
 316     */
 317    _swrast_CreateContext( ctx );
 318    _vbo_CreateContext( ctx );
 319    _tnl_CreateContext( ctx );
 320    _swsetup_CreateContext( ctx );
 321    _ae_create_context( ctx );
 322
 323    /* Install the customized pipeline:
 324     */
 325    _tnl_destroy_pipeline( ctx );
 326    _tnl_install_pipeline( ctx, radeon_pipeline );
 327
 328    /* Try and keep materials and vertices separate:
 329     */
 330 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 331
 332    /* Configure swrast and T&L to match hardware characteristics:
 333     */
 334    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 335    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 336    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 337    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 338
 339
 340    for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
 341       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 342       _math_matrix_ctr( &rmesa->tmpmat[i] );
 343       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 344       _math_matrix_set_identity( &rmesa->tmpmat[i] );
 345    }
 346
 347    driInitExtensions( ctx, card_extensions, GL_TRUE );
 348    if (rmesa->radeon.radeonScreen->kernel_mm)
 349      driInitExtensions(ctx, mm_extensions, GL_FALSE);
 350    if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100)
 351       _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
 352    if (rmesa->radeon.glCtx->Mesa_DXTn) {
 353       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 354       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 355    }
 356    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 357       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 358    }
 359
 360    if (rmesa->radeon.dri.drmMinor >= 9)
 361       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 362
 363    /* XXX these should really go right after _mesa_init_driver_functions() */
 364    radeon_fbo_init(&rmesa->radeon);
 365    radeonInitSpanFuncs( ctx );
 366    radeonInitIoctlFuncs( ctx );
 367    radeonInitStateFuncs( ctx );
 368    radeonInitState( rmesa );
 369    radeonInitSwtcl( ctx );
 370
 371    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 372                          ctx->Const.MaxArrayLockSize, 32 );
 373
 374    fthrottle_mode = driQueryOptioni(&rmesa->radeon.optionCache, "fthrottle_mode");
 375    rmesa->radeon.iw.irq_seq = -1;
 376    rmesa->radeon.irqsEmitted = 0;
 377    rmesa->radeon.do_irqs = (rmesa->radeon.radeonScreen->irq != 0 &&
 378                             fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 379
 380    rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 381
 382
 383 #if DO_DEBUG
 384    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 385                                        debug_control );
 386 #endif
 387
 388    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 389    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 390       fprintf(stderr, "disabling 3D acceleration\n");
 391       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 392    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 393               !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 394       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 395          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 396          fprintf(stderr, "Disabling HW TCL support\n");
 397       }
 398       TCL_FALLBACK(rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 399    }
 400
 401    if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 402 /*       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
 403    }
 404    return GL_TRUE;
 405 }
 406
 407
 408 /* Destroy the device specific context.
 409  */
 410 /* Destroy the Mesa and driver specific context data.
 411  */
 412 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 413 {
 414    GET_CURRENT_CONTEXT(ctx);
 415    r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
 416    r100ContextPtr current = ctx ? R100_CONTEXT(ctx) : NULL;
 417
 418    /* check if we're deleting the currently bound context */
 419    if (rmesa == current) {
 420       radeon_firevertices(&rmesa->radeon);
 421       _mesa_make_current(NULL, NULL, NULL);
 422    }
 423
 424    /* Free radeon context resources */
 425    assert(rmesa); /* should never be null */
 426    if ( rmesa ) {
 427
 428       _swsetup_DestroyContext( rmesa->radeon.glCtx );
 429       _tnl_DestroyContext( rmesa->radeon.glCtx );
 430       _vbo_DestroyContext( rmesa->radeon.glCtx );
 431       _swrast_DestroyContext( rmesa->radeon.glCtx );
 432
 433       radeonDestroySwtcl( rmesa->radeon.glCtx );
 434       radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
 435       if (rmesa->radeon.dma.current) {
 436          radeonReleaseDmaRegion( &rmesa->radeon );
 437          rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
 438       }
 439
 440       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 441
 442       if (rmesa->radeon.state.scissor.pClipRects) {
 443          FREE(rmesa->radeon.state.scissor.pClipRects);
 444          rmesa->radeon.state.scissor.pClipRects = NULL;
 445       }
 446
 447       radeonCleanupContext(&rmesa->radeon);
 448
 449       FREE( rmesa );
 450    }
 451 }
 452