src/mesa/drivers/dri/radeon/radeon_context.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *   Keith Whitwell <keith@tungstengraphics.com>
  36  */
  37
  38 #include "glheader.h"
  39 #include "api_arrayelt.h"
  40 #include "context.h"
  41 #include "simple_list.h"
  42 #include "imports.h"
  43 #include "matrix.h"
  44 #include "extensions.h"
  45 #include "framebuffer.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "array_cache/acache.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_context.h"
  57 #include "radeon_ioctl.h"
  58 #include "radeon_state.h"
  59 #include "radeon_span.h"
  60 #include "radeon_tex.h"
  61 #include "radeon_swtcl.h"
  62 #include "radeon_tcl.h"
  63 #include "radeon_vtxfmt.h"
  64 #include "radeon_maos.h"
  65
  66 #define need_GL_ARB_multisample
  67 #define need_GL_ARB_texture_compression
  68 #define need_GL_EXT_blend_minmax
  69 #define need_GL_EXT_secondary_color
  70 #include "extension_helper.h"
  71
  72 #define DRIVER_DATE     "20050831"
  73
  74 #include "vblank.h"
  75 #include "utils.h"
  76 #include "xmlpool.h" /* for symbolic values of enum-type options */
  77 #ifndef RADEON_DEBUG
  78 int RADEON_DEBUG = (0);
  79 #endif
  80
  81
  82 /* Return the width and height of the given buffer.
  83  */
  84 static void radeonGetBufferSize( GLframebuffer *buffer,
  85                                  GLuint *width, GLuint *height )
  86 {
  87    GET_CURRENT_CONTEXT(ctx);
  88    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  89
  90    LOCK_HARDWARE( rmesa );
  91    *width  = rmesa->dri.drawable->w;
  92    *height = rmesa->dri.drawable->h;
  93    UNLOCK_HARDWARE( rmesa );
  94 }
  95
  96 /* Return various strings for glGetString().
  97  */
  98 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
  99 {
 100    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 101    static char buffer[128];
 102    unsigned   offset;
 103    GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
 104       rmesa->radeonScreen->AGPMode;
 105
 106    switch ( name ) {
 107    case GL_VENDOR:
 108       return (GLubyte *)"Tungsten Graphics, Inc.";
 109
 110    case GL_RENDERER:
 111       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
 112                                      agp_mode );
 113
 114       sprintf( & buffer[ offset ], " %sTCL",
 115                !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 116                ? "" : "NO-" );
 117
 118       return (GLubyte *)buffer;
 119
 120    default:
 121       return NULL;
 122    }
 123 }
 124
 125
 126 /* Extension strings exported by the R100 driver.
 127  */
 128 const struct dri_extension card_extensions[] =
 129 {
 130     { "GL_ARB_multisample",                GL_ARB_multisample_functions },
 131     { "GL_ARB_multitexture",               NULL },
 132     { "GL_ARB_texture_border_clamp",       NULL },
 133     { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
 134     { "GL_ARB_texture_env_add",            NULL },
 135     { "GL_ARB_texture_env_combine",        NULL },
 136     { "GL_ARB_texture_env_crossbar",       NULL },
 137     { "GL_ARB_texture_env_dot3",           NULL },
 138     { "GL_ARB_texture_mirrored_repeat",    NULL },
 139     { "GL_EXT_blend_logic_op",             NULL },
 140     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
 141     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
 142     { "GL_EXT_stencil_wrap",               NULL },
 143     { "GL_EXT_texture_edge_clamp",         NULL },
 144     { "GL_EXT_texture_env_combine",        NULL },
 145     { "GL_EXT_texture_env_dot3",           NULL },
 146     { "GL_EXT_texture_filter_anisotropic", NULL },
 147     { "GL_EXT_texture_lod_bias",           NULL },
 148     { "GL_EXT_texture_mirror_clamp",       NULL },
 149     { "GL_ATI_texture_env_combine3",       NULL },
 150     { "GL_ATI_texture_mirror_once",        NULL },
 151     { "GL_MESA_ycbcr_texture",             NULL },
 152     { "GL_NV_blend_square",                NULL },
 153     { "GL_SGIS_generate_mipmap",           NULL },
 154     { NULL,                                NULL }
 155 };
 156
 157 extern const struct tnl_pipeline_stage _radeon_texrect_stage;
 158 extern const struct tnl_pipeline_stage _radeon_render_stage;
 159 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 160
 161 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 162
 163    /* Try and go straight to t&l
 164     */
 165    &_radeon_tcl_stage,
 166
 167    /* Catch any t&l fallbacks
 168     */
 169    &_tnl_vertex_transform_stage,
 170    &_tnl_normal_transform_stage,
 171    &_tnl_lighting_stage,
 172    &_tnl_fog_coordinate_stage,
 173    &_tnl_texgen_stage,
 174    &_tnl_texture_transform_stage,
 175
 176    /* Scale texture rectangle to 0..1.
 177     */
 178    &_radeon_texrect_stage,
 179
 180    &_radeon_render_stage,
 181    &_tnl_render_stage,          /* FALLBACK:  */
 182    NULL,
 183 };
 184
 185
 186
 187 /* Initialize the driver's misc functions.
 188  */
 189 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 190 {
 191     functions->GetBufferSize    = radeonGetBufferSize;
 192     functions->ResizeBuffers    = _mesa_resize_framebuffer;
 193     functions->GetString        = radeonGetString;
 194 }
 195
 196 static const struct dri_debug_control debug_control[] =
 197 {
 198     { "fall",  DEBUG_FALLBACKS },
 199     { "tex",   DEBUG_TEXTURE },
 200     { "ioctl", DEBUG_IOCTL },
 201     { "prim",  DEBUG_PRIMS },
 202     { "vert",  DEBUG_VERTS },
 203     { "state", DEBUG_STATE },
 204     { "code",  DEBUG_CODEGEN },
 205     { "vfmt",  DEBUG_VFMT },
 206     { "vtxf",  DEBUG_VFMT },
 207     { "verb",  DEBUG_VERBOSE },
 208     { "dri",   DEBUG_DRI },
 209     { "dma",   DEBUG_DMA },
 210     { "san",   DEBUG_SANITY },
 211     { "sync",  DEBUG_SYNC },
 212     { NULL,    0 }
 213 };
 214
 215
 216 /* Create the device specific context.
 217  */
 218 GLboolean
 219 radeonCreateContext( const __GLcontextModes *glVisual,
 220                      __DRIcontextPrivate *driContextPriv,
 221                      void *sharedContextPrivate)
 222 {
 223    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 224    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 225    struct dd_function_table functions;
 226    radeonContextPtr rmesa;
 227    GLcontext *ctx, *shareCtx;
 228    int i;
 229    int tcl_mode, fthrottle_mode;
 230
 231    assert(glVisual);
 232    assert(driContextPriv);
 233    assert(screen);
 234
 235    /* Allocate the Radeon context */
 236    rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
 237    if ( !rmesa )
 238       return GL_FALSE;
 239
 240    /* Parse configuration files.
 241     * Do this here so that initialMaxAnisotropy is set before we create
 242     * the default textures.
 243     */
 244    driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
 245                         screen->driScreen->myNum, "radeon");
 246    rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
 247                                                  "def_max_anisotropy");
 248
 249    if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
 250       if ( sPriv->drmMinor < 13 )
 251          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 252                           "disabling.\n",sPriv->drmMinor );
 253       else
 254          rmesa->using_hyperz = GL_TRUE;
 255    }
 256
 257    if ( sPriv->drmMinor >= 15 )
 258       rmesa->texmicrotile = GL_TRUE;
 259
 260    /* Init default driver functions then plug in our Radeon-specific functions
 261     * (the texture functions are especially important)
 262     */
 263    _mesa_init_driver_functions( &functions );
 264    radeonInitDriverFuncs( &functions );
 265    radeonInitTextureFuncs( &functions );
 266
 267    /* Allocate the Mesa context */
 268    if (sharedContextPrivate)
 269       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
 270    else
 271       shareCtx = NULL;
 272    rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
 273                                        &functions, (void *) rmesa);
 274    if (!rmesa->glCtx) {
 275       FREE(rmesa);
 276       return GL_FALSE;
 277    }
 278    driContextPriv->driverPrivate = rmesa;
 279
 280    /* Init radeon context data */
 281    rmesa->dri.context = driContextPriv;
 282    rmesa->dri.screen = sPriv;
 283    rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
 284    rmesa->dri.hwContext = driContextPriv->hHWContext;
 285    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
 286    rmesa->dri.fd = sPriv->fd;
 287    rmesa->dri.drmMinor = sPriv->drmMinor;
 288
 289    rmesa->radeonScreen = screen;
 290    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 291                                        screen->sarea_priv_offset);
 292
 293
 294    rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
 295
 296    (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
 297    make_empty_list( & rmesa->swapped );
 298
 299    rmesa->nr_heaps = screen->numTexHeaps;
 300    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 301       rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 302             screen->texSize[i],
 303             12,
 304             RADEON_NR_TEX_REGIONS,
 305             (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
 306             & rmesa->sarea->tex_age[i],
 307             & rmesa->swapped,
 308             sizeof( radeonTexObj ),
 309             (destroy_texture_object_t *) radeonDestroyTexObj );
 310
 311       driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
 312                                         & rmesa->c_textureSwaps );
 313    }
 314    rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
 315                                            "texture_depth");
 316    if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 317       rmesa->texture_depth = ( screen->cpp == 4 ) ?
 318          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 319
 320    rmesa->swtcl.RenderIndex = ~0;
 321    rmesa->hw.all_dirty = GL_TRUE;
 322
 323    /* Set the maximum texture size small enough that we can guarentee that
 324     * all texture units can bind a maximal texture and have them both in
 325     * texturable memory at once.
 326     */
 327
 328    ctx = rmesa->glCtx;
 329    ctx->Const.MaxTextureUnits = 2;
 330    ctx->Const.MaxTextureImageUnits = 2;
 331    ctx->Const.MaxTextureCoordUnits = 2;
 332
 333    driCalculateMaxTextureLevels( rmesa->texture_heaps,
 334                                  rmesa->nr_heaps,
 335                                  & ctx->Const,
 336                                  4,
 337                                  11, /* max 2D texture size is 2048x2048 */
 338                                  0,  /* 3D textures unsupported. */
 339                                  0,  /* cube textures unsupported. */
 340                                  11, /* max rect texture size is 2048x2048. */
 341                                  12,
 342                                  GL_FALSE );
 343
 344    /* adjust max texture size a bit. Hack, but I really want to use larger textures
 345       which will work just fine in 99.999999% of all cases, especially with texture compression... */
 346    if (driQueryOptionb( &rmesa->optionCache, "texture_level_hack" ))
 347    {
 348      if (ctx->Const.MaxTextureLevels < 12) ctx->Const.MaxTextureLevels += 1;
 349    }
 350
 351    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 352
 353    /* No wide points.
 354     */
 355    ctx->Const.MinPointSize = 1.0;
 356    ctx->Const.MinPointSizeAA = 1.0;
 357    ctx->Const.MaxPointSize = 1.0;
 358    ctx->Const.MaxPointSizeAA = 1.0;
 359
 360    ctx->Const.MinLineWidth = 1.0;
 361    ctx->Const.MinLineWidthAA = 1.0;
 362    ctx->Const.MaxLineWidth = 10.0;
 363    ctx->Const.MaxLineWidthAA = 10.0;
 364    ctx->Const.LineWidthGranularity = 0.0625;
 365
 366    /* Set maxlocksize (and hence vb size) small enough to avoid
 367     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 368     * fit in a single dma buffer for indexed rendering of quad strips,
 369     * etc.
 370     */
 371    ctx->Const.MaxArrayLockSize =
 372       MIN2( ctx->Const.MaxArrayLockSize,
 373             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 374
 375    rmesa->boxes = 0;
 376
 377    /* Initialize the software rasterizer and helper modules.
 378     */
 379    _swrast_CreateContext( ctx );
 380    _ac_CreateContext( ctx );
 381    _tnl_CreateContext( ctx );
 382    _swsetup_CreateContext( ctx );
 383    _ae_create_context( ctx );
 384
 385    /* Install the customized pipeline:
 386     */
 387    _tnl_destroy_pipeline( ctx );
 388    _tnl_install_pipeline( ctx, radeon_pipeline );
 389    ctx->Driver.FlushVertices = radeonFlushVertices;
 390
 391    /* Try and keep materials and vertices separate:
 392     */
 393    _tnl_isolate_materials( ctx, GL_TRUE );
 394
 395 /*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
 396
 397    /* Configure swrast and T&L to match hardware characteristics:
 398     */
 399    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 400    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 401    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 402    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 403
 404
 405    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
 406    _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
 407    _math_matrix_ctr( &rmesa->tmpmat );
 408    _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
 409    _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
 410    _math_matrix_set_identity( &rmesa->tmpmat );
 411
 412    driInitExtensions( ctx, card_extensions, GL_TRUE );
 413    if (rmesa->glCtx->Mesa_DXTn) {
 414       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 415       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 416    }
 417    else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
 418       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 419    }
 420
 421    if (rmesa->dri.drmMinor >= 9)
 422       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 423
 424    /* XXX these should really go right after _mesa_init_driver_functions() */
 425    radeonInitIoctlFuncs( ctx );
 426    radeonInitStateFuncs( ctx );
 427    radeonInitSpanFuncs( ctx );
 428    radeonInitState( rmesa );
 429    radeonInitSwtcl( ctx );
 430
 431    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 432                          ctx->Const.MaxArrayLockSize, 32 );
 433
 434    fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
 435    rmesa->iw.irq_seq = -1;
 436    rmesa->irqsEmitted = 0;
 437    rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
 438                      fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 439
 440    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 441
 442    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
 443        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
 444
 445    (*dri_interface->getUST)( & rmesa->swap_ust );
 446
 447
 448 #if DO_DEBUG
 449    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 450                                        debug_control );
 451 #endif
 452
 453    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 454    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
 455       fprintf(stderr, "disabling 3D acceleration\n");
 456       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 457    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 458               !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
 459       if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 460          rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
 461          fprintf(stderr, "Disabling HW TCL support\n");
 462       }
 463       TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 464    }
 465
 466    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 467       if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 468          radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
 469
 470       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
 471    }
 472    return GL_TRUE;
 473 }
 474
 475
 476 /* Destroy the device specific context.
 477  */
 478 /* Destroy the Mesa and driver specific context data.
 479  */
 480 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 481 {
 482    GET_CURRENT_CONTEXT(ctx);
 483    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 484    radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 485
 486    /* check if we're deleting the currently bound context */
 487    if (rmesa == current) {
 488       RADEON_FIREVERTICES( rmesa );
 489       _mesa_make_current(NULL, NULL, NULL);
 490    }
 491
 492    /* Free radeon context resources */
 493    assert(rmesa); /* should never be null */
 494    if ( rmesa ) {
 495       GLboolean   release_texture_heaps;
 496
 497
 498       release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
 499       _swsetup_DestroyContext( rmesa->glCtx );
 500       _tnl_DestroyContext( rmesa->glCtx );
 501       _ac_DestroyContext( rmesa->glCtx );
 502       _swrast_DestroyContext( rmesa->glCtx );
 503
 504       radeonDestroySwtcl( rmesa->glCtx );
 505       radeonReleaseArrays( rmesa->glCtx, ~0 );
 506       if (rmesa->dma.current.buf) {
 507          radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
 508          radeonFlushCmdBuf( rmesa, __FUNCTION__ );
 509       }
 510
 511       if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
 512          int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 513          if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 514             radeonVtxfmtDestroy( rmesa->glCtx );
 515       }
 516
 517       /* free the Mesa context */
 518       rmesa->glCtx->DriverCtx = NULL;
 519       _mesa_destroy_context( rmesa->glCtx );
 520
 521       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 522
 523       if (rmesa->state.scissor.pClipRects) {
 524          FREE(rmesa->state.scissor.pClipRects);
 525          rmesa->state.scissor.pClipRects = NULL;
 526       }
 527
 528       if ( release_texture_heaps ) {
 529          /* This share group is about to go away, free our private
 530           * texture object data.
 531           */
 532          int i;
 533
 534          for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 535             driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
 536             rmesa->texture_heaps[ i ] = NULL;
 537          }
 538
 539          assert( is_empty_list( & rmesa->swapped ) );
 540       }
 541
 542       /* free the option cache */
 543       driDestroyOptionCache (&rmesa->optionCache);
 544
 545       FREE( rmesa );
 546    }
 547 }
 548
 549
 550
 551
 552 void
 553 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
 554 {
 555
 556    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
 557       radeonContextPtr rmesa;
 558       GLcontext *ctx;
 559       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 560       ctx = rmesa->glCtx;
 561       if (ctx->Visual.doubleBufferMode) {
 562          _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
 563
 564          if ( rmesa->doPageFlip ) {
 565             radeonPageFlip( dPriv );
 566          }
 567          else {
 568             radeonCopyBuffer( dPriv );
 569          }
 570       }
 571    }
 572    else {
 573       /* XXX this shouldn't be an error but we can't handle it for now */
 574       _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
 575    }
 576 }
 577
 578
 579 /* Force the context `c' to be the current context and associate with it
 580  * buffer `b'.
 581  */
 582 GLboolean
 583 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
 584                    __DRIdrawablePrivate *driDrawPriv,
 585                    __DRIdrawablePrivate *driReadPriv )
 586 {
 587    if ( driContextPriv ) {
 588       radeonContextPtr newCtx =
 589          (radeonContextPtr) driContextPriv->driverPrivate;
 590
 591       if (RADEON_DEBUG & DEBUG_DRI)
 592          fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 593
 594       if ( newCtx->dri.drawable != driDrawPriv ) {
 595          driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
 596          newCtx->dri.drawable = driDrawPriv;
 597          radeonUpdateWindow( newCtx->glCtx );
 598          radeonUpdateViewportOffset( newCtx->glCtx );
 599       }
 600
 601       _mesa_make_current( newCtx->glCtx,
 602                           (GLframebuffer *) driDrawPriv->driverPrivate,
 603                           (GLframebuffer *) driReadPriv->driverPrivate );
 604
 605       if (newCtx->vb.enabled)
 606          radeonVtxfmtMakeCurrent( newCtx->glCtx );
 607
 608    } else {
 609       if (RADEON_DEBUG & DEBUG_DRI)
 610          fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 611       _mesa_make_current( NULL, NULL, NULL );
 612    }
 613
 614    if (RADEON_DEBUG & DEBUG_DRI)
 615       fprintf(stderr, "End %s\n", __FUNCTION__);
 616    return GL_TRUE;
 617 }
 618
 619 /* Force the context `c' to be unbound from its buffer.
 620  */
 621 GLboolean
 622 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 623 {
 624    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 625
 626    if (RADEON_DEBUG & DEBUG_DRI)
 627       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 628
 629    return GL_TRUE;
 630 }