src/mesa/drivers/dri/radeon/radeon_context.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Kevin E. Martin <martin@valinux.com>
  33  *   Gareth Hughes <gareth@valinux.com>
  34  *   Keith Whitwell <keith@tungstengraphics.com>
  35  */
  36
  37 #include "main/glheader.h"
  38 #include "main/api_arrayelt.h"
  39 #include "main/context.h"
  40 #include "main/simple_list.h"
  41 #include "main/imports.h"
  42 #include "main/matrix.h"
  43 #include "main/extensions.h"
  44 #include "main/framebuffer.h"
  45 #include "main/state.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "vbo/vbo.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_common.h"
  57 #include "radeon_context.h"
  58 #include "radeon_ioctl.h"
  59 #include "radeon_state.h"
  60 #include "radeon_span.h"
  61 #include "radeon_tex.h"
  62 #include "radeon_swtcl.h"
  63 #include "radeon_tcl.h"
  64 #include "radeon_maos.h"
  65
  66 #define need_GL_EXT_blend_minmax
  67 #define need_GL_EXT_fog_coord
  68 #define need_GL_EXT_secondary_color
  69 #include "extension_helper.h"
  70
  71 #define DRIVER_DATE     "20061018"
  72
  73 #include "vblank.h"
  74 #include "utils.h"
  75 #include "xmlpool.h" /* for symbolic values of enum-type options */
  76
  77 /* Extension strings exported by the R100 driver.
  78  */
  79 const struct dri_extension card_extensions[] =
  80 {
  81     { "GL_ARB_multitexture",               NULL },
  82     { "GL_ARB_texture_border_clamp",       NULL },
  83     { "GL_ARB_texture_env_add",            NULL },
  84     { "GL_ARB_texture_env_combine",        NULL },
  85     { "GL_ARB_texture_env_crossbar",       NULL },
  86     { "GL_ARB_texture_env_dot3",           NULL },
  87     { "GL_ARB_texture_mirrored_repeat",    NULL },
  88     { "GL_EXT_blend_logic_op",             NULL },
  89     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
  90     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
  91     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
  92     { "GL_EXT_stencil_wrap",               NULL },
  93     { "GL_EXT_texture_edge_clamp",         NULL },
  94     { "GL_EXT_texture_env_combine",        NULL },
  95     { "GL_EXT_texture_env_dot3",           NULL },
  96     { "GL_EXT_texture_filter_anisotropic", NULL },
  97     { "GL_EXT_texture_lod_bias",           NULL },
  98     { "GL_EXT_texture_mirror_clamp",       NULL },
  99     { "GL_ATI_texture_env_combine3",       NULL },
 100     { "GL_ATI_texture_mirror_once",        NULL },
 101     { "GL_MESA_ycbcr_texture",             NULL },
 102     { "GL_NV_blend_square",                NULL },
 103     { "GL_SGIS_generate_mipmap",           NULL },
 104     { NULL,                                NULL }
 105 };
 106
 107 extern const struct tnl_pipeline_stage _radeon_render_stage;
 108 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 109
 110 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 111
 112    /* Try and go straight to t&l
 113     */
 114    &_radeon_tcl_stage,
 115
 116    /* Catch any t&l fallbacks
 117     */
 118    &_tnl_vertex_transform_stage,
 119    &_tnl_normal_transform_stage,
 120    &_tnl_lighting_stage,
 121    &_tnl_fog_coordinate_stage,
 122    &_tnl_texgen_stage,
 123    &_tnl_texture_transform_stage,
 124
 125    &_radeon_render_stage,
 126    &_tnl_render_stage,          /* FALLBACK:  */
 127    NULL,
 128 };
 129
 130 static const struct dri_debug_control debug_control[] =
 131 {
 132     { "fall",  DEBUG_FALLBACKS },
 133     { "tex",   DEBUG_TEXTURE },
 134     { "ioctl", DEBUG_IOCTL },
 135     { "prim",  DEBUG_PRIMS },
 136     { "vert",  DEBUG_VERTS },
 137     { "state", DEBUG_STATE },
 138     { "code",  DEBUG_CODEGEN },
 139     { "vfmt",  DEBUG_VFMT },
 140     { "vtxf",  DEBUG_VFMT },
 141     { "verb",  DEBUG_VERBOSE },
 142     { "dri",   DEBUG_DRI },
 143     { "dma",   DEBUG_DMA },
 144     { "san",   DEBUG_SANITY },
 145     { "sync",  DEBUG_SYNC },
 146     { NULL,    0 }
 147 };
 148
 149 static void r100_get_lock(radeonContextPtr radeon)
 150 {
 151    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 152    drm_radeon_sarea_t *sarea = radeon->sarea;
 153
 154    RADEON_STATECHANGE(rmesa, ctx);
 155    if (rmesa->radeon.sarea->tiling_enabled) {
 156       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
 157          RADEON_COLOR_TILE_ENABLE;
 158    } else {
 159       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
 160          ~RADEON_COLOR_TILE_ENABLE;
 161    }
 162
 163    if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
 164       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 165
 166       if (!radeon->radeonScreen->kernel_mm)
 167          radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
 168    }
 169 }
 170
 171 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 172 {
 173 }
 174
 175 static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
 176 {
 177    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 178
 179    /* r100 always needs to emit ZBS to avoid TCL lockups */
 180    rmesa->hw.zbs.dirty = 1;
 181    radeon->hw.is_dirty = 1;
 182 }
 183
 184
 185 static void r100_init_vtbl(radeonContextPtr radeon)
 186 {
 187    radeon->vtbl.get_lock = r100_get_lock;
 188    radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
 189    radeon->vtbl.update_draw_buffer = radeonUpdateDrawBuffer;
 190    radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
 191    radeon->vtbl.swtcl_flush = r100_swtcl_flush;
 192    radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
 193 }
 194
 195 /* Create the device specific context.
 196  */
 197 GLboolean
 198 radeonCreateContext( const __GLcontextModes *glVisual,
 199                      __DRIcontextPrivate *driContextPriv,
 200                      void *sharedContextPrivate)
 201 {
 202    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 203    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 204    struct dd_function_table functions;
 205    r100ContextPtr rmesa;
 206    GLcontext *ctx;
 207    int i;
 208    int tcl_mode, fthrottle_mode;
 209
 210    assert(glVisual);
 211    assert(driContextPriv);
 212    assert(screen);
 213
 214    /* Allocate the Radeon context */
 215    rmesa = (r100ContextPtr) CALLOC( sizeof(*rmesa) );
 216    if ( !rmesa )
 217       return GL_FALSE;
 218
 219    r100_init_vtbl(&rmesa->radeon);
 220
 221    /* init exp fog table data */
 222    radeonInitStaticFogData();
 223
 224    /* Parse configuration files.
 225     * Do this here so that initialMaxAnisotropy is set before we create
 226     * the default textures.
 227     */
 228    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 229                         screen->driScreen->myNum, "radeon");
 230    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 231                                                  "def_max_anisotropy");
 232
 233    if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 234       if ( sPriv->drm_version.minor < 13 )
 235          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 236                           "disabling.\n", sPriv->drm_version.minor );
 237       else
 238          rmesa->using_hyperz = GL_TRUE;
 239    }
 240
 241    if ( sPriv->drm_version.minor >= 15 )
 242       rmesa->texmicrotile = GL_TRUE;
 243
 244    /* Init default driver functions then plug in our Radeon-specific functions
 245     * (the texture functions are especially important)
 246     */
 247    _mesa_init_driver_functions( &functions );
 248    radeonInitTextureFuncs( &functions );
 249
 250    if (!radeonInitContext(&rmesa->radeon, &functions,
 251                           glVisual, driContextPriv,
 252                           sharedContextPrivate)) {
 253      FREE(rmesa);
 254      return GL_FALSE;
 255    }
 256
 257    rmesa->radeon.texture_depth = driQueryOptioni (&rmesa->radeon.optionCache,
 258                                            "texture_depth");
 259    if (rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 260       rmesa->radeon.texture_depth = ( screen->cpp == 4 ) ?
 261          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 262
 263    rmesa->radeon.swtcl.RenderIndex = ~0;
 264    rmesa->radeon.hw.all_dirty = GL_TRUE;
 265
 266    /* Set the maximum texture size small enough that we can guarentee that
 267     * all texture units can bind a maximal texture and have all of them in
 268     * texturable memory at once. Depending on the allow_large_textures driconf
 269     * setting allow larger textures.
 270     */
 271
 272    ctx = rmesa->radeon.glCtx;
 273    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 274                                                  "texture_units");
 275    ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 276    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 277
 278    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
 279
 280    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 281
 282    /* No wide points.
 283     */
 284    ctx->Const.MinPointSize = 1.0;
 285    ctx->Const.MinPointSizeAA = 1.0;
 286    ctx->Const.MaxPointSize = 1.0;
 287    ctx->Const.MaxPointSizeAA = 1.0;
 288
 289    ctx->Const.MinLineWidth = 1.0;
 290    ctx->Const.MinLineWidthAA = 1.0;
 291    ctx->Const.MaxLineWidth = 10.0;
 292    ctx->Const.MaxLineWidthAA = 10.0;
 293    ctx->Const.LineWidthGranularity = 0.0625;
 294
 295    /* Set maxlocksize (and hence vb size) small enough to avoid
 296     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 297     * fit in a single dma buffer for indexed rendering of quad strips,
 298     * etc.
 299     */
 300    ctx->Const.MaxArrayLockSize =
 301       MIN2( ctx->Const.MaxArrayLockSize,
 302             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 303
 304    rmesa->boxes = 0;
 305
 306    ctx->Const.MaxDrawBuffers = 1;
 307
 308    /* Initialize the software rasterizer and helper modules.
 309     */
 310    _swrast_CreateContext( ctx );
 311    _vbo_CreateContext( ctx );
 312    _tnl_CreateContext( ctx );
 313    _swsetup_CreateContext( ctx );
 314    _ae_create_context( ctx );
 315
 316    /* Install the customized pipeline:
 317     */
 318    _tnl_destroy_pipeline( ctx );
 319    _tnl_install_pipeline( ctx, radeon_pipeline );
 320
 321    /* Try and keep materials and vertices separate:
 322     */
 323 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 324
 325    /* Configure swrast and T&L to match hardware characteristics:
 326     */
 327    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 328    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 329    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 330    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 331
 332
 333    for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
 334       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 335       _math_matrix_ctr( &rmesa->tmpmat[i] );
 336       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 337       _math_matrix_set_identity( &rmesa->tmpmat[i] );
 338    }
 339
 340    driInitExtensions( ctx, card_extensions, GL_TRUE );
 341    if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100)
 342       _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
 343    if (rmesa->radeon.glCtx->Mesa_DXTn) {
 344       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 345       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 346    }
 347    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 348       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 349    }
 350
 351    if (rmesa->radeon.dri.drmMinor >= 9)
 352       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 353
 354    /* XXX these should really go right after _mesa_init_driver_functions() */
 355    radeonInitSpanFuncs( ctx );
 356    radeonInitIoctlFuncs( ctx );
 357    radeonInitStateFuncs( ctx );
 358    radeonInitState( rmesa );
 359    radeonInitSwtcl( ctx );
 360
 361    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 362                          ctx->Const.MaxArrayLockSize, 32 );
 363
 364    fthrottle_mode = driQueryOptioni(&rmesa->radeon.optionCache, "fthrottle_mode");
 365    rmesa->radeon.iw.irq_seq = -1;
 366    rmesa->radeon.irqsEmitted = 0;
 367    rmesa->radeon.do_irqs = (rmesa->radeon.radeonScreen->irq != 0 &&
 368                             fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 369
 370    rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 371
 372    (*sPriv->systemTime->getUST)( & rmesa->radeon.swap_ust );
 373
 374
 375 #if DO_DEBUG
 376    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 377                                        debug_control );
 378 #endif
 379
 380    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 381    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 382       fprintf(stderr, "disabling 3D acceleration\n");
 383       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 384    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 385               !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 386       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 387          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 388          fprintf(stderr, "Disabling HW TCL support\n");
 389       }
 390       TCL_FALLBACK(rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 391    }
 392
 393    if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 394 /*       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
 395    }
 396    return GL_TRUE;
 397 }
 398
 399
 400 /* Destroy the device specific context.
 401  */
 402 /* Destroy the Mesa and driver specific context data.
 403  */
 404 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 405 {
 406    GET_CURRENT_CONTEXT(ctx);
 407    r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
 408    r100ContextPtr current = ctx ? R100_CONTEXT(ctx) : NULL;
 409
 410    /* check if we're deleting the currently bound context */
 411    if (rmesa == current) {
 412       radeon_firevertices(&rmesa->radeon);
 413       _mesa_make_current(NULL, NULL, NULL);
 414    }
 415
 416    /* Free radeon context resources */
 417    assert(rmesa); /* should never be null */
 418    if ( rmesa ) {
 419
 420       _swsetup_DestroyContext( rmesa->radeon.glCtx );
 421       _tnl_DestroyContext( rmesa->radeon.glCtx );
 422       _vbo_DestroyContext( rmesa->radeon.glCtx );
 423       _swrast_DestroyContext( rmesa->radeon.glCtx );
 424
 425       radeonDestroySwtcl( rmesa->radeon.glCtx );
 426       radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
 427       if (rmesa->radeon.dma.current) {
 428          radeonReleaseDmaRegion( &rmesa->radeon );
 429          rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
 430       }
 431
 432       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 433
 434       if (rmesa->radeon.state.scissor.pClipRects) {
 435          FREE(rmesa->radeon.state.scissor.pClipRects);
 436          rmesa->radeon.state.scissor.pClipRects = NULL;
 437       }
 438
 439       radeonCleanupContext(&rmesa->radeon);
 440
 441       FREE( rmesa );
 442    }
 443 }
 444