src/mesa/drivers/dri/radeon/radeon_context.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *   Keith Whitwell <keith@tungstengraphics.com>
  36  */
  37
  38 #include "glheader.h"
  39 #include "api_arrayelt.h"
  40 #include "context.h"
  41 #include "simple_list.h"
  42 #include "imports.h"
  43 #include "matrix.h"
  44 #include "extensions.h"
  45 #include "framebuffer.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "array_cache/acache.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_context.h"
  57 #include "radeon_ioctl.h"
  58 #include "radeon_state.h"
  59 #include "radeon_span.h"
  60 #include "radeon_tex.h"
  61 #include "radeon_swtcl.h"
  62 #include "radeon_tcl.h"
  63 #include "radeon_vtxfmt.h"
  64 #include "radeon_maos.h"
  65
  66 #define need_GL_ARB_multisample
  67 #define need_GL_ARB_texture_compression
  68 #define need_GL_EXT_blend_minmax
  69 #define need_GL_EXT_secondary_color
  70 #include "extension_helper.h"
  71
  72 #define DRIVER_DATE     "20050528"
  73
  74 #include "vblank.h"
  75 #include "utils.h"
  76 #include "xmlpool.h" /* for symbolic values of enum-type options */
  77 #ifndef RADEON_DEBUG
  78 int RADEON_DEBUG = (0);
  79 #endif
  80
  81
  82 /* Return the width and height of the given buffer.
  83  */
  84 static void radeonGetBufferSize( GLframebuffer *buffer,
  85                                  GLuint *width, GLuint *height )
  86 {
  87    GET_CURRENT_CONTEXT(ctx);
  88    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
  89
  90    LOCK_HARDWARE( rmesa );
  91    *width  = rmesa->dri.drawable->w;
  92    *height = rmesa->dri.drawable->h;
  93    UNLOCK_HARDWARE( rmesa );
  94 }
  95
  96 /* Return various strings for glGetString().
  97  */
  98 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
  99 {
 100    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 101    static char buffer[128];
 102    unsigned   offset;
 103    GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
 104       rmesa->radeonScreen->AGPMode;
 105
 106    switch ( name ) {
 107    case GL_VENDOR:
 108       return (GLubyte *)"Tungsten Graphics, Inc.";
 109
 110    case GL_RENDERER:
 111       offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
 112                                      agp_mode );
 113
 114       sprintf( & buffer[ offset ], " %sTCL",
 115                !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
 116                ? "" : "NO-" );
 117
 118       return (GLubyte *)buffer;
 119
 120    default:
 121       return NULL;
 122    }
 123 }
 124
 125
 126 /* Extension strings exported by the R100 driver.
 127  */
 128 static const struct dri_extension card_extensions[] =
 129 {
 130     { "GL_ARB_multisample",                GL_ARB_multisample_functions },
 131     { "GL_ARB_multitexture",               NULL },
 132     { "GL_ARB_texture_border_clamp",       NULL },
 133     { "GL_ARB_texture_compression",        GL_ARB_texture_compression_functions },
 134     { "GL_ARB_texture_env_add",            NULL },
 135     { "GL_ARB_texture_env_combine",        NULL },
 136     { "GL_ARB_texture_env_crossbar",       NULL },
 137     { "GL_ARB_texture_env_dot3",           NULL },
 138     { "GL_ARB_texture_mirrored_repeat",    NULL },
 139     { "GL_EXT_blend_logic_op",             NULL },
 140     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
 141     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
 142     { "GL_EXT_stencil_wrap",               NULL },
 143     { "GL_EXT_texture_edge_clamp",         NULL },
 144     { "GL_EXT_texture_env_combine",        NULL },
 145     { "GL_EXT_texture_env_dot3",           NULL },
 146     { "GL_EXT_texture_filter_anisotropic", NULL },
 147     { "GL_EXT_texture_lod_bias",           NULL },
 148     { "GL_EXT_texture_mirror_clamp",       NULL },
 149     { "GL_ATI_texture_env_combine3",       NULL },
 150     { "GL_ATI_texture_mirror_once",        NULL },
 151     { "GL_MESA_ycbcr_texture",             NULL },
 152     { "GL_NV_blend_square",                NULL },
 153     { "GL_SGIS_generate_mipmap",           NULL },
 154     { NULL,                                NULL }
 155 };
 156
 157 extern const struct tnl_pipeline_stage _radeon_texrect_stage;
 158 extern const struct tnl_pipeline_stage _radeon_render_stage;
 159 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 160
 161 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 162
 163    /* Try and go straight to t&l
 164     */
 165    &_radeon_tcl_stage,
 166
 167    /* Catch any t&l fallbacks
 168     */
 169    &_tnl_vertex_transform_stage,
 170    &_tnl_normal_transform_stage,
 171    &_tnl_lighting_stage,
 172    &_tnl_fog_coordinate_stage,
 173    &_tnl_texgen_stage,
 174    &_tnl_texture_transform_stage,
 175
 176    /* Scale texture rectangle to 0..1.
 177     */
 178    &_radeon_texrect_stage,
 179
 180    &_radeon_render_stage,
 181    &_tnl_render_stage,          /* FALLBACK:  */
 182    NULL,
 183 };
 184
 185
 186
 187 /* Initialize the driver's misc functions.
 188  */
 189 static void radeonInitDriverFuncs( struct dd_function_table *functions )
 190 {
 191     functions->GetBufferSize    = radeonGetBufferSize;
 192     functions->ResizeBuffers    = _mesa_resize_framebuffer;
 193     functions->GetString        = radeonGetString;
 194 }
 195
 196 static const struct dri_debug_control debug_control[] =
 197 {
 198     { "fall",  DEBUG_FALLBACKS },
 199     { "tex",   DEBUG_TEXTURE },
 200     { "ioctl", DEBUG_IOCTL },
 201     { "prim",  DEBUG_PRIMS },
 202     { "vert",  DEBUG_VERTS },
 203     { "state", DEBUG_STATE },
 204     { "code",  DEBUG_CODEGEN },
 205     { "vfmt",  DEBUG_VFMT },
 206     { "vtxf",  DEBUG_VFMT },
 207     { "verb",  DEBUG_VERBOSE },
 208     { "dri",   DEBUG_DRI },
 209     { "dma",   DEBUG_DMA },
 210     { "san",   DEBUG_SANITY },
 211     { "sync",  DEBUG_SYNC },
 212     { NULL,    0 }
 213 };
 214
 215
 216 static int
 217 get_ust_nop( int64_t * ust )
 218 {
 219    *ust = 1;
 220    return 0;
 221 }
 222
 223
 224 /* Create the device specific context.
 225  */
 226 GLboolean
 227 radeonCreateContext( const __GLcontextModes *glVisual,
 228                      __DRIcontextPrivate *driContextPriv,
 229                      void *sharedContextPrivate)
 230 {
 231    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 232    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 233    struct dd_function_table functions;
 234    radeonContextPtr rmesa;
 235    GLcontext *ctx, *shareCtx;
 236    int i;
 237    int tcl_mode, fthrottle_mode;
 238
 239    assert(glVisual);
 240    assert(driContextPriv);
 241    assert(screen);
 242
 243    /* Allocate the Radeon context */
 244    rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
 245    if ( !rmesa )
 246       return GL_FALSE;
 247
 248    /* Parse configuration files.
 249     * Do this here so that initialMaxAnisotropy is set before we create
 250     * the default textures.
 251     */
 252    driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
 253                         screen->driScreen->myNum, "radeon");
 254    rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
 255                                                  "def_max_anisotropy");
 256
 257    if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
 258       if ( sPriv->drmMinor < 13 )
 259          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 260                           "disabling.\n",sPriv->drmMinor );
 261       else
 262          rmesa->using_hyperz = GL_TRUE;
 263    }
 264
 265    if ( sPriv->drmMinor >= 15 )
 266       rmesa->texmicrotile = GL_TRUE;
 267
 268    /* Init default driver functions then plug in our Radeon-specific functions
 269     * (the texture functions are especially important)
 270     */
 271    _mesa_init_driver_functions( &functions );
 272    radeonInitDriverFuncs( &functions );
 273    radeonInitTextureFuncs( &functions );
 274
 275    /* Allocate the Mesa context */
 276    if (sharedContextPrivate)
 277       shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
 278    else
 279       shareCtx = NULL;
 280    rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
 281                                        &functions, (void *) rmesa);
 282    if (!rmesa->glCtx) {
 283       FREE(rmesa);
 284       return GL_FALSE;
 285    }
 286    driContextPriv->driverPrivate = rmesa;
 287
 288    /* Init radeon context data */
 289    rmesa->dri.context = driContextPriv;
 290    rmesa->dri.screen = sPriv;
 291    rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
 292    rmesa->dri.hwContext = driContextPriv->hHWContext;
 293    rmesa->dri.hwLock = &sPriv->pSAREA->lock;
 294    rmesa->dri.fd = sPriv->fd;
 295    rmesa->dri.drmMinor = sPriv->drmMinor;
 296
 297    rmesa->radeonScreen = screen;
 298    rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 299                                        screen->sarea_priv_offset);
 300
 301
 302    rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
 303
 304    (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
 305    make_empty_list( & rmesa->swapped );
 306
 307    rmesa->nr_heaps = screen->numTexHeaps;
 308    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 309       rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
 310             screen->texSize[i],
 311             12,
 312             RADEON_NR_TEX_REGIONS,
 313             (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
 314             & rmesa->sarea->tex_age[i],
 315             & rmesa->swapped,
 316             sizeof( radeonTexObj ),
 317             (destroy_texture_object_t *) radeonDestroyTexObj );
 318
 319       driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
 320                                         & rmesa->c_textureSwaps );
 321    }
 322    rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
 323                                            "texture_depth");
 324    if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 325       rmesa->texture_depth = ( screen->cpp == 4 ) ?
 326          DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
 327
 328    rmesa->swtcl.RenderIndex = ~0;
 329    rmesa->hw.all_dirty = GL_TRUE;
 330
 331    /* Set the maximum texture size small enough that we can guarentee that
 332     * all texture units can bind a maximal texture and have them both in
 333     * texturable memory at once.
 334     */
 335
 336    ctx = rmesa->glCtx;
 337    ctx->Const.MaxTextureUnits = 2;
 338    ctx->Const.MaxTextureImageUnits = 2;
 339    ctx->Const.MaxTextureCoordUnits = 2;
 340
 341    driCalculateMaxTextureLevels( rmesa->texture_heaps,
 342                                  rmesa->nr_heaps,
 343                                  & ctx->Const,
 344                                  4,
 345                                  11, /* max 2D texture size is 2048x2048 */
 346                                  0,  /* 3D textures unsupported. */
 347                                  0,  /* cube textures unsupported. */
 348                                  11, /* max rect texture size is 2048x2048. */
 349                                  12,
 350                                  GL_FALSE );
 351
 352    /* adjust max texture size a bit. Hack, but I really want to use larger textures
 353       which will work just fine in 99.999999% of all cases, especially with texture compression... */
 354    if (driQueryOptionb( &rmesa->optionCache, "texture_level_hack" ))
 355    {
 356      if (ctx->Const.MaxTextureLevels < 12) ctx->Const.MaxTextureLevels += 1;
 357    }
 358
 359    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 360
 361    /* No wide points.
 362     */
 363    ctx->Const.MinPointSize = 1.0;
 364    ctx->Const.MinPointSizeAA = 1.0;
 365    ctx->Const.MaxPointSize = 1.0;
 366    ctx->Const.MaxPointSizeAA = 1.0;
 367
 368    ctx->Const.MinLineWidth = 1.0;
 369    ctx->Const.MinLineWidthAA = 1.0;
 370    ctx->Const.MaxLineWidth = 10.0;
 371    ctx->Const.MaxLineWidthAA = 10.0;
 372    ctx->Const.LineWidthGranularity = 0.0625;
 373
 374    /* Set maxlocksize (and hence vb size) small enough to avoid
 375     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 376     * fit in a single dma buffer for indexed rendering of quad strips,
 377     * etc.
 378     */
 379    ctx->Const.MaxArrayLockSize =
 380       MIN2( ctx->Const.MaxArrayLockSize,
 381             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 382
 383    rmesa->boxes = 0;
 384
 385    /* Initialize the software rasterizer and helper modules.
 386     */
 387    _swrast_CreateContext( ctx );
 388    _ac_CreateContext( ctx );
 389    _tnl_CreateContext( ctx );
 390    _swsetup_CreateContext( ctx );
 391    _ae_create_context( ctx );
 392
 393    /* Install the customized pipeline:
 394     */
 395    _tnl_destroy_pipeline( ctx );
 396    _tnl_install_pipeline( ctx, radeon_pipeline );
 397    ctx->Driver.FlushVertices = radeonFlushVertices;
 398
 399    /* Try and keep materials and vertices separate:
 400     */
 401    _tnl_isolate_materials( ctx, GL_TRUE );
 402
 403 /*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
 404
 405    /* Configure swrast and T&L to match hardware characteristics:
 406     */
 407    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 408    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 409    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 410    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 411
 412
 413    _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
 414    _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
 415    _math_matrix_ctr( &rmesa->tmpmat );
 416    _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
 417    _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
 418    _math_matrix_set_identity( &rmesa->tmpmat );
 419
 420    driInitExtensions( ctx, card_extensions, GL_TRUE );
 421    if (rmesa->glCtx->Mesa_DXTn) {
 422       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 423       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 424    }
 425    else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
 426       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 427    }
 428
 429    if (rmesa->dri.drmMinor >= 9)
 430       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 431
 432    /* XXX these should really go right after _mesa_init_driver_functions() */
 433    radeonInitIoctlFuncs( ctx );
 434    radeonInitStateFuncs( ctx );
 435    radeonInitSpanFuncs( ctx );
 436    radeonInitState( rmesa );
 437    radeonInitSwtcl( ctx );
 438
 439    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 440                          ctx->Const.MaxArrayLockSize, 32 );
 441
 442    fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
 443    rmesa->iw.irq_seq = -1;
 444    rmesa->irqsEmitted = 0;
 445    rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
 446                      fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 447
 448    rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 449
 450    rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
 451        ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
 452
 453    rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
 454    if ( rmesa->get_ust == NULL ) {
 455       rmesa->get_ust = get_ust_nop;
 456    }
 457    (*rmesa->get_ust)( & rmesa->swap_ust );
 458
 459
 460 #if DO_DEBUG
 461    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 462                                        debug_control );
 463 #endif
 464
 465    tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 466    if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
 467       fprintf(stderr, "disabling 3D acceleration\n");
 468       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 469    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 470               !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
 471       if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 472          rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
 473          fprintf(stderr, "Disabling HW TCL support\n");
 474       }
 475       TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 476    }
 477
 478    if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
 479       if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 480          radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
 481
 482       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
 483    }
 484    return GL_TRUE;
 485 }
 486
 487
 488 /* Destroy the device specific context.
 489  */
 490 /* Destroy the Mesa and driver specific context data.
 491  */
 492 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
 493 {
 494    GET_CURRENT_CONTEXT(ctx);
 495    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 496    radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 497
 498    /* check if we're deleting the currently bound context */
 499    if (rmesa == current) {
 500       RADEON_FIREVERTICES( rmesa );
 501       _mesa_make_current(NULL, NULL, NULL);
 502    }
 503
 504    /* Free radeon context resources */
 505    assert(rmesa); /* should never be null */
 506    if ( rmesa ) {
 507       GLboolean   release_texture_heaps;
 508
 509
 510       release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
 511       _swsetup_DestroyContext( rmesa->glCtx );
 512       _tnl_DestroyContext( rmesa->glCtx );
 513       _ac_DestroyContext( rmesa->glCtx );
 514       _swrast_DestroyContext( rmesa->glCtx );
 515
 516       radeonDestroySwtcl( rmesa->glCtx );
 517       radeonReleaseArrays( rmesa->glCtx, ~0 );
 518       if (rmesa->dma.current.buf) {
 519          radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
 520          radeonFlushCmdBuf( rmesa, __FUNCTION__ );
 521       }
 522
 523       if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
 524          int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
 525          if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
 526             radeonVtxfmtDestroy( rmesa->glCtx );
 527       }
 528
 529       /* free the Mesa context */
 530       rmesa->glCtx->DriverCtx = NULL;
 531       _mesa_destroy_context( rmesa->glCtx );
 532
 533       _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 534
 535       if (rmesa->state.scissor.pClipRects) {
 536          FREE(rmesa->state.scissor.pClipRects);
 537          rmesa->state.scissor.pClipRects = NULL;
 538       }
 539
 540       if ( release_texture_heaps ) {
 541          /* This share group is about to go away, free our private
 542           * texture object data.
 543           */
 544          int i;
 545
 546          for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 547             driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
 548             rmesa->texture_heaps[ i ] = NULL;
 549          }
 550
 551          assert( is_empty_list( & rmesa->swapped ) );
 552       }
 553
 554       /* free the option cache */
 555       driDestroyOptionCache (&rmesa->optionCache);
 556
 557       FREE( rmesa );
 558    }
 559 }
 560
 561
 562
 563
 564 void
 565 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
 566 {
 567
 568    if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
 569       radeonContextPtr rmesa;
 570       GLcontext *ctx;
 571       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 572       ctx = rmesa->glCtx;
 573       if (ctx->Visual.doubleBufferMode) {
 574          _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
 575
 576          if ( rmesa->doPageFlip ) {
 577             radeonPageFlip( dPriv );
 578          }
 579          else {
 580             radeonCopyBuffer( dPriv );
 581          }
 582       }
 583    }
 584    else {
 585       /* XXX this shouldn't be an error but we can't handle it for now */
 586       _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
 587    }
 588 }
 589
 590
 591 /* Force the context `c' to be the current context and associate with it
 592  * buffer `b'.
 593  */
 594 GLboolean
 595 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
 596                    __DRIdrawablePrivate *driDrawPriv,
 597                    __DRIdrawablePrivate *driReadPriv )
 598 {
 599    if ( driContextPriv ) {
 600       radeonContextPtr newCtx =
 601          (radeonContextPtr) driContextPriv->driverPrivate;
 602
 603       if (RADEON_DEBUG & DEBUG_DRI)
 604          fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
 605
 606       if ( newCtx->dri.drawable != driDrawPriv ) {
 607          driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
 608          newCtx->dri.drawable = driDrawPriv;
 609          radeonUpdateWindow( newCtx->glCtx );
 610          radeonUpdateViewportOffset( newCtx->glCtx );
 611       }
 612
 613       _mesa_make_current( newCtx->glCtx,
 614                           (GLframebuffer *) driDrawPriv->driverPrivate,
 615                           (GLframebuffer *) driReadPriv->driverPrivate );
 616
 617       if (newCtx->vb.enabled)
 618          radeonVtxfmtMakeCurrent( newCtx->glCtx );
 619
 620    } else {
 621       if (RADEON_DEBUG & DEBUG_DRI)
 622          fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 623       _mesa_make_current( NULL, NULL, NULL );
 624    }
 625
 626    if (RADEON_DEBUG & DEBUG_DRI)
 627       fprintf(stderr, "End %s\n", __FUNCTION__);
 628    return GL_TRUE;
 629 }
 630
 631 /* Force the context `c' to be unbound from its buffer.
 632  */
 633 GLboolean
 634 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
 635 {
 636    radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
 637
 638    if (RADEON_DEBUG & DEBUG_DRI)
 639       fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
 640
 641    return GL_TRUE;
 642 }