i965: fix bugs in projective texture coordinates
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_context.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Kevin E. Martin <martin@valinux.com>
33 * Gareth Hughes <gareth@valinux.com>
34 * Keith Whitwell <keith@tungstengraphics.com>
35 */
36
37 #include "main/glheader.h"
38 #include "main/api_arrayelt.h"
39 #include "main/context.h"
40 #include "main/simple_list.h"
41 #include "main/imports.h"
42 #include "main/matrix.h"
43 #include "main/extensions.h"
44 #include "main/framebuffer.h"
45 #include "main/state.h"
46
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "vbo/vbo.h"
50
51 #include "tnl/tnl.h"
52 #include "tnl/t_pipeline.h"
53
54 #include "drivers/common/driverfuncs.h"
55
56 #include "radeon_context.h"
57 #include "radeon_ioctl.h"
58 #include "radeon_state.h"
59 #include "radeon_span.h"
60 #include "radeon_tex.h"
61 #include "radeon_swtcl.h"
62 #include "radeon_tcl.h"
63 #include "radeon_maos.h"
64
65 #define need_GL_EXT_blend_minmax
66 #define need_GL_EXT_fog_coord
67 #define need_GL_EXT_secondary_color
68 #include "extension_helper.h"
69
70 #define DRIVER_DATE "20061018"
71
72 #include "vblank.h"
73 #include "utils.h"
74 #include "xmlpool.h" /* for symbolic values of enum-type options */
75 #ifndef RADEON_DEBUG
76 int RADEON_DEBUG = (0);
77 #endif
78
79
80 /* Return various strings for glGetString().
81 */
82 static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
83 {
84 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
85 static char buffer[128];
86 unsigned offset;
87 GLuint agp_mode = (rmesa->radeonScreen->card_type==RADEON_CARD_PCI) ? 0 :
88 rmesa->radeonScreen->AGPMode;
89
90 switch ( name ) {
91 case GL_VENDOR:
92 return (GLubyte *)"Tungsten Graphics, Inc.";
93
94 case GL_RENDERER:
95 offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
96 agp_mode );
97
98 sprintf( & buffer[ offset ], " %sTCL",
99 !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
100 ? "" : "NO-" );
101
102 return (GLubyte *)buffer;
103
104 default:
105 return NULL;
106 }
107 }
108
109
110 /* Extension strings exported by the R100 driver.
111 */
112 const struct dri_extension card_extensions[] =
113 {
114 { "GL_ARB_multitexture", NULL },
115 { "GL_ARB_texture_border_clamp", NULL },
116 { "GL_ARB_texture_env_add", NULL },
117 { "GL_ARB_texture_env_combine", NULL },
118 { "GL_ARB_texture_env_crossbar", NULL },
119 { "GL_ARB_texture_env_dot3", NULL },
120 { "GL_ARB_texture_mirrored_repeat", NULL },
121 { "GL_EXT_blend_logic_op", NULL },
122 { "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions },
123 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
124 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
125 { "GL_EXT_stencil_wrap", NULL },
126 { "GL_EXT_texture_edge_clamp", NULL },
127 { "GL_EXT_texture_env_combine", NULL },
128 { "GL_EXT_texture_env_dot3", NULL },
129 { "GL_EXT_texture_filter_anisotropic", NULL },
130 { "GL_EXT_texture_lod_bias", NULL },
131 { "GL_EXT_texture_mirror_clamp", NULL },
132 { "GL_ATI_texture_env_combine3", NULL },
133 { "GL_ATI_texture_mirror_once", NULL },
134 { "GL_MESA_ycbcr_texture", NULL },
135 { "GL_NV_blend_square", NULL },
136 { "GL_SGIS_generate_mipmap", NULL },
137 { NULL, NULL }
138 };
139
140 extern const struct tnl_pipeline_stage _radeon_render_stage;
141 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
142
143 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
144
145 /* Try and go straight to t&l
146 */
147 &_radeon_tcl_stage,
148
149 /* Catch any t&l fallbacks
150 */
151 &_tnl_vertex_transform_stage,
152 &_tnl_normal_transform_stage,
153 &_tnl_lighting_stage,
154 &_tnl_fog_coordinate_stage,
155 &_tnl_texgen_stage,
156 &_tnl_texture_transform_stage,
157
158 &_radeon_render_stage,
159 &_tnl_render_stage, /* FALLBACK: */
160 NULL,
161 };
162
163
164
165 /* Initialize the driver's misc functions.
166 */
167 static void radeonInitDriverFuncs( struct dd_function_table *functions )
168 {
169 functions->GetString = radeonGetString;
170 }
171
172 static const struct dri_debug_control debug_control[] =
173 {
174 { "fall", DEBUG_FALLBACKS },
175 { "tex", DEBUG_TEXTURE },
176 { "ioctl", DEBUG_IOCTL },
177 { "prim", DEBUG_PRIMS },
178 { "vert", DEBUG_VERTS },
179 { "state", DEBUG_STATE },
180 { "code", DEBUG_CODEGEN },
181 { "vfmt", DEBUG_VFMT },
182 { "vtxf", DEBUG_VFMT },
183 { "verb", DEBUG_VERBOSE },
184 { "dri", DEBUG_DRI },
185 { "dma", DEBUG_DMA },
186 { "san", DEBUG_SANITY },
187 { "sync", DEBUG_SYNC },
188 { NULL, 0 }
189 };
190
191
192 /* Create the device specific context.
193 */
194 GLboolean
195 radeonCreateContext( const __GLcontextModes *glVisual,
196 __DRIcontextPrivate *driContextPriv,
197 void *sharedContextPrivate)
198 {
199 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
200 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
201 struct dd_function_table functions;
202 radeonContextPtr rmesa;
203 GLcontext *ctx, *shareCtx;
204 int i;
205 int tcl_mode, fthrottle_mode;
206
207 assert(glVisual);
208 assert(driContextPriv);
209 assert(screen);
210
211 /* Allocate the Radeon context */
212 rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
213 if ( !rmesa )
214 return GL_FALSE;
215
216 /* init exp fog table data */
217 radeonInitStaticFogData();
218
219 /* Parse configuration files.
220 * Do this here so that initialMaxAnisotropy is set before we create
221 * the default textures.
222 */
223 driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
224 screen->driScreen->myNum, "radeon");
225 rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
226 "def_max_anisotropy");
227
228 if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
229 if ( sPriv->drm_version.minor < 13 )
230 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
231 "disabling.\n", sPriv->drm_version.minor );
232 else
233 rmesa->using_hyperz = GL_TRUE;
234 }
235
236 if ( sPriv->drm_version.minor >= 15 )
237 rmesa->texmicrotile = GL_TRUE;
238
239 /* Init default driver functions then plug in our Radeon-specific functions
240 * (the texture functions are especially important)
241 */
242 _mesa_init_driver_functions( &functions );
243 radeonInitDriverFuncs( &functions );
244 radeonInitTextureFuncs( &functions );
245
246 /* Allocate the Mesa context */
247 if (sharedContextPrivate)
248 shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
249 else
250 shareCtx = NULL;
251 rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
252 &functions, (void *) rmesa);
253 if (!rmesa->glCtx) {
254 FREE(rmesa);
255 return GL_FALSE;
256 }
257 driContextPriv->driverPrivate = rmesa;
258
259 /* Init radeon context data */
260 rmesa->dri.context = driContextPriv;
261 rmesa->dri.screen = sPriv;
262 rmesa->dri.drawable = NULL;
263 rmesa->dri.readable = NULL;
264 rmesa->dri.hwContext = driContextPriv->hHWContext;
265 rmesa->dri.hwLock = &sPriv->pSAREA->lock;
266 rmesa->dri.fd = sPriv->fd;
267 rmesa->dri.drmMinor = sPriv->drm_version.minor;
268
269 rmesa->radeonScreen = screen;
270 rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
271 screen->sarea_priv_offset);
272
273
274 rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
275
276 (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
277 make_empty_list( & rmesa->swapped );
278
279 rmesa->nr_heaps = screen->numTexHeaps;
280 for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
281 rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
282 screen->texSize[i],
283 12,
284 RADEON_NR_TEX_REGIONS,
285 (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
286 & rmesa->sarea->tex_age[i],
287 & rmesa->swapped,
288 sizeof( radeonTexObj ),
289 (destroy_texture_object_t *) radeonDestroyTexObj );
290
291 driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
292 & rmesa->c_textureSwaps );
293 }
294 rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
295 "texture_depth");
296 if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
297 rmesa->texture_depth = ( screen->cpp == 4 ) ?
298 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
299
300 rmesa->swtcl.RenderIndex = ~0;
301 rmesa->hw.all_dirty = GL_TRUE;
302
303 /* Set the maximum texture size small enough that we can guarentee that
304 * all texture units can bind a maximal texture and have all of them in
305 * texturable memory at once. Depending on the allow_large_textures driconf
306 * setting allow larger textures.
307 */
308
309 ctx = rmesa->glCtx;
310 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->optionCache,
311 "texture_units");
312 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
313 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
314
315 i = driQueryOptioni( &rmesa->optionCache, "allow_large_textures");
316
317 driCalculateMaxTextureLevels( rmesa->texture_heaps,
318 rmesa->nr_heaps,
319 & ctx->Const,
320 4,
321 11, /* max 2D texture size is 2048x2048 */
322 8, /* 256^3 */
323 9, /* \todo: max cube texture size seems to be 512x512(x6) */
324 11, /* max rect texture size is 2048x2048. */
325 12,
326 GL_FALSE,
327 i );
328
329
330 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
331
332 /* No wide points.
333 */
334 ctx->Const.MinPointSize = 1.0;
335 ctx->Const.MinPointSizeAA = 1.0;
336 ctx->Const.MaxPointSize = 1.0;
337 ctx->Const.MaxPointSizeAA = 1.0;
338
339 ctx->Const.MinLineWidth = 1.0;
340 ctx->Const.MinLineWidthAA = 1.0;
341 ctx->Const.MaxLineWidth = 10.0;
342 ctx->Const.MaxLineWidthAA = 10.0;
343 ctx->Const.LineWidthGranularity = 0.0625;
344
345 /* Set maxlocksize (and hence vb size) small enough to avoid
346 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
347 * fit in a single dma buffer for indexed rendering of quad strips,
348 * etc.
349 */
350 ctx->Const.MaxArrayLockSize =
351 MIN2( ctx->Const.MaxArrayLockSize,
352 RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
353
354 rmesa->boxes = 0;
355
356 ctx->Const.MaxDrawBuffers = 1;
357
358 /* Initialize the software rasterizer and helper modules.
359 */
360 _swrast_CreateContext( ctx );
361 _vbo_CreateContext( ctx );
362 _tnl_CreateContext( ctx );
363 _swsetup_CreateContext( ctx );
364 _ae_create_context( ctx );
365
366 /* Install the customized pipeline:
367 */
368 _tnl_destroy_pipeline( ctx );
369 _tnl_install_pipeline( ctx, radeon_pipeline );
370
371 /* Try and keep materials and vertices separate:
372 */
373 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
374
375 /* Configure swrast and T&L to match hardware characteristics:
376 */
377 _swrast_allow_pixel_fog( ctx, GL_FALSE );
378 _swrast_allow_vertex_fog( ctx, GL_TRUE );
379 _tnl_allow_pixel_fog( ctx, GL_FALSE );
380 _tnl_allow_vertex_fog( ctx, GL_TRUE );
381
382
383 for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
384 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
385 _math_matrix_ctr( &rmesa->tmpmat[i] );
386 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
387 _math_matrix_set_identity( &rmesa->tmpmat[i] );
388 }
389
390 driInitExtensions( ctx, card_extensions, GL_TRUE );
391 if (rmesa->radeonScreen->drmSupportsCubeMapsR100)
392 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
393 if (rmesa->glCtx->Mesa_DXTn) {
394 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
395 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
396 }
397 else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
398 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
399 }
400
401 if (rmesa->dri.drmMinor >= 9)
402 _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
403
404 /* XXX these should really go right after _mesa_init_driver_functions() */
405 radeonInitIoctlFuncs( ctx );
406 radeonInitStateFuncs( ctx );
407 radeonInitSpanFuncs( ctx );
408 radeonInitState( rmesa );
409 radeonInitSwtcl( ctx );
410
411 _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
412 ctx->Const.MaxArrayLockSize, 32 );
413
414 fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
415 rmesa->iw.irq_seq = -1;
416 rmesa->irqsEmitted = 0;
417 rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
418 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
419
420 rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
421
422 (*sPriv->systemTime->getUST)( & rmesa->swap_ust );
423
424
425 #if DO_DEBUG
426 RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
427 debug_control );
428 #endif
429
430 tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
431 if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
432 fprintf(stderr, "disabling 3D acceleration\n");
433 FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
434 } else if (tcl_mode == DRI_CONF_TCL_SW ||
435 !(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
436 if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
437 rmesa->radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
438 fprintf(stderr, "Disabling HW TCL support\n");
439 }
440 TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
441 }
442
443 if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
444 /* _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
445 }
446 return GL_TRUE;
447 }
448
449
450 /* Destroy the device specific context.
451 */
452 /* Destroy the Mesa and driver specific context data.
453 */
454 void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
455 {
456 GET_CURRENT_CONTEXT(ctx);
457 radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
458 radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
459
460 /* check if we're deleting the currently bound context */
461 if (rmesa == current) {
462 RADEON_FIREVERTICES( rmesa );
463 _mesa_make_current(NULL, NULL, NULL);
464 }
465
466 /* Free radeon context resources */
467 assert(rmesa); /* should never be null */
468 if ( rmesa ) {
469 GLboolean release_texture_heaps;
470
471
472 release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
473 _swsetup_DestroyContext( rmesa->glCtx );
474 _tnl_DestroyContext( rmesa->glCtx );
475 _vbo_DestroyContext( rmesa->glCtx );
476 _swrast_DestroyContext( rmesa->glCtx );
477
478 radeonDestroySwtcl( rmesa->glCtx );
479 radeonReleaseArrays( rmesa->glCtx, ~0 );
480 if (rmesa->dma.current.buf) {
481 radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
482 radeonFlushCmdBuf( rmesa, __FUNCTION__ );
483 }
484
485 _mesa_vector4f_free( &rmesa->tcl.ObjClean );
486
487 if (rmesa->state.scissor.pClipRects) {
488 FREE(rmesa->state.scissor.pClipRects);
489 rmesa->state.scissor.pClipRects = NULL;
490 }
491
492 if ( release_texture_heaps ) {
493 /* This share group is about to go away, free our private
494 * texture object data.
495 */
496 int i;
497
498 for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
499 driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
500 rmesa->texture_heaps[ i ] = NULL;
501 }
502
503 assert( is_empty_list( & rmesa->swapped ) );
504 }
505
506 /* free the Mesa context */
507 rmesa->glCtx->DriverCtx = NULL;
508 _mesa_destroy_context( rmesa->glCtx );
509
510 /* free the option cache */
511 driDestroyOptionCache (&rmesa->optionCache);
512
513 FREE( rmesa );
514 }
515 }
516
517
518
519
520 void
521 radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
522 {
523
524 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
525 radeonContextPtr rmesa;
526 GLcontext *ctx;
527 rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
528 ctx = rmesa->glCtx;
529 if (ctx->Visual.doubleBufferMode) {
530 _mesa_notifySwapBuffers( ctx ); /* flush pending rendering comands */
531
532 if ( rmesa->doPageFlip ) {
533 radeonPageFlip( dPriv );
534 }
535 else {
536 radeonCopyBuffer( dPriv, NULL );
537 }
538 }
539 }
540 else {
541 /* XXX this shouldn't be an error but we can't handle it for now */
542 _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
543 }
544 }
545
546 void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv,
547 int x, int y, int w, int h )
548 {
549 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
550 radeonContextPtr radeon;
551 GLcontext *ctx;
552
553 radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
554 ctx = radeon->glCtx;
555
556 if (ctx->Visual.doubleBufferMode) {
557 drm_clip_rect_t rect;
558 rect.x1 = x + dPriv->x;
559 rect.y1 = (dPriv->h - y - h) + dPriv->y;
560 rect.x2 = rect.x1 + w;
561 rect.y2 = rect.y1 + h;
562 _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */
563 radeonCopyBuffer(dPriv, &rect);
564 }
565 } else {
566 /* XXX this shouldn't be an error but we can't handle it for now */
567 _mesa_problem(NULL, "%s: drawable has no context!",
568 __FUNCTION__);
569 }
570 }
571
572 /* Make context `c' the current context and bind it to the given
573 * drawing and reading surfaces.
574 */
575 GLboolean
576 radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
577 __DRIdrawablePrivate *driDrawPriv,
578 __DRIdrawablePrivate *driReadPriv )
579 {
580 if ( driContextPriv ) {
581 radeonContextPtr newCtx =
582 (radeonContextPtr) driContextPriv->driverPrivate;
583
584 if (RADEON_DEBUG & DEBUG_DRI)
585 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) newCtx->glCtx);
586
587 newCtx->dri.readable = driReadPriv;
588
589 if ( (newCtx->dri.drawable != driDrawPriv) ||
590 newCtx->lastStamp != driDrawPriv->lastStamp ) {
591 if (driDrawPriv->swap_interval == (unsigned)-1) {
592 driDrawPriv->vblFlags = (newCtx->radeonScreen->irq != 0)
593 ? driGetDefaultVBlankFlags(&newCtx->optionCache)
594 : VBLANK_FLAG_NO_IRQ;
595
596 driDrawableInitVBlank( driDrawPriv );
597 }
598
599 newCtx->dri.drawable = driDrawPriv;
600
601 radeonSetCliprects(newCtx);
602 radeonUpdateViewportOffset( newCtx->glCtx );
603 }
604
605 _mesa_make_current( newCtx->glCtx,
606 (GLframebuffer *) driDrawPriv->driverPrivate,
607 (GLframebuffer *) driReadPriv->driverPrivate );
608
609 _mesa_update_state( newCtx->glCtx );
610 } else {
611 if (RADEON_DEBUG & DEBUG_DRI)
612 fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
613 _mesa_make_current( NULL, NULL, NULL );
614 }
615
616 if (RADEON_DEBUG & DEBUG_DRI)
617 fprintf(stderr, "End %s\n", __FUNCTION__);
618 return GL_TRUE;
619 }
620
621 /* Force the context `c' to be unbound from its buffer.
622 */
623 GLboolean
624 radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
625 {
626 radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
627
628 if (RADEON_DEBUG & DEBUG_DRI)
629 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *) rmesa->glCtx);
630
631 return GL_TRUE;
632 }