1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
48 #include "array_cache/acache.h"
51 #include "tnl/t_pipeline.h"
53 #include "drivers/common/driverfuncs.h"
55 #include "radeon_context.h"
56 #include "radeon_ioctl.h"
57 #include "radeon_state.h"
58 #include "radeon_span.h"
59 #include "radeon_tex.h"
60 #include "radeon_swtcl.h"
61 #include "radeon_tcl.h"
62 #include "radeon_vtxfmt.h"
63 #include "radeon_maos.h"
65 #define DRIVER_DATE "20041007"
69 #include "xmlpool.h" /* for symbolic values of enum-type options */
71 int RADEON_DEBUG
= (0);
75 /* Return the width and height of the given buffer.
77 static void radeonGetBufferSize( GLframebuffer
*buffer
,
78 GLuint
*width
, GLuint
*height
)
80 GET_CURRENT_CONTEXT(ctx
);
81 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
83 LOCK_HARDWARE( rmesa
);
84 *width
= rmesa
->dri
.drawable
->w
;
85 *height
= rmesa
->dri
.drawable
->h
;
86 UNLOCK_HARDWARE( rmesa
);
89 /* Return various strings for glGetString().
91 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
93 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
94 static char buffer
[128];
96 GLuint agp_mode
= rmesa
->radeonScreen
->IsPCI
? 0 :
97 rmesa
->radeonScreen
->AGPMode
;
101 return (GLubyte
*)"Tungsten Graphics, Inc.";
104 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
107 sprintf( & buffer
[ offset
], " %sTCL",
108 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
111 return (GLubyte
*)buffer
;
119 /* Extension strings exported by the R100 driver.
121 static const char * const card_extensions
[] =
123 "GL_ARB_multisample",
124 "GL_ARB_multitexture",
125 "GL_ARB_texture_border_clamp",
126 "GL_ARB_texture_compression",
127 "GL_ARB_texture_env_add",
128 "GL_ARB_texture_env_combine",
129 "GL_ARB_texture_env_crossbar",
130 "GL_ARB_texture_env_dot3",
131 "GL_ARB_texture_mirrored_repeat",
132 "GL_EXT_blend_logic_op",
133 "GL_EXT_blend_subtract",
134 "GL_EXT_secondary_color",
135 "GL_EXT_texture_edge_clamp",
136 "GL_EXT_texture_env_combine",
137 "GL_EXT_texture_env_dot3",
138 "GL_EXT_texture_filter_anisotropic",
139 "GL_EXT_texture_lod_bias",
140 "GL_EXT_texture_mirror_clamp",
141 "GL_ATI_texture_env_combine3",
142 "GL_ATI_texture_mirror_once",
143 "GL_MESA_ycbcr_texture",
144 "GL_NV_blend_square",
145 "GL_SGIS_generate_mipmap",
149 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
150 extern const struct tnl_pipeline_stage _radeon_render_stage
;
151 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
153 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
155 /* Try and go straight to t&l
159 /* Catch any t&l fallbacks
161 &_tnl_vertex_transform_stage
,
162 &_tnl_normal_transform_stage
,
163 &_tnl_lighting_stage
,
164 &_tnl_fog_coordinate_stage
,
166 &_tnl_texture_transform_stage
,
168 /* Scale texture rectangle to 0..1.
170 &_radeon_texrect_stage
,
172 &_radeon_render_stage
,
173 &_tnl_render_stage
, /* FALLBACK: */
179 /* Initialize the driver's misc functions.
181 static void radeonInitDriverFuncs( struct dd_function_table
*functions
)
183 functions
->GetBufferSize
= radeonGetBufferSize
;
184 functions
->ResizeBuffers
= _swrast_alloc_buffers
;
185 functions
->GetString
= radeonGetString
;
188 static const struct dri_debug_control debug_control
[] =
190 { "fall", DEBUG_FALLBACKS
},
191 { "tex", DEBUG_TEXTURE
},
192 { "ioctl", DEBUG_IOCTL
},
193 { "prim", DEBUG_PRIMS
},
194 { "vert", DEBUG_VERTS
},
195 { "state", DEBUG_STATE
},
196 { "code", DEBUG_CODEGEN
},
197 { "vfmt", DEBUG_VFMT
},
198 { "vtxf", DEBUG_VFMT
},
199 { "verb", DEBUG_VERBOSE
},
200 { "dri", DEBUG_DRI
},
201 { "dma", DEBUG_DMA
},
202 { "san", DEBUG_SANITY
},
208 get_ust_nop( int64_t * ust
)
215 /* Create the device specific context.
218 radeonCreateContext( const __GLcontextModes
*glVisual
,
219 __DRIcontextPrivate
*driContextPriv
,
220 void *sharedContextPrivate
)
222 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
223 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
224 struct dd_function_table functions
;
225 radeonContextPtr rmesa
;
226 GLcontext
*ctx
, *shareCtx
;
228 int tcl_mode
, fthrottle_mode
;
231 assert(driContextPriv
);
234 /* Allocate the Radeon context */
235 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
239 /* Parse configuration files.
240 * Do this here so that initialMaxAnisotropy is set before we create
241 * the default textures.
243 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
244 screen
->driScreen
->myNum
, "radeon");
245 rmesa
->initialMaxAnisotropy
= driQueryOptionf(&rmesa
->optionCache
,
246 "def_max_anisotropy");
248 /* Init default driver functions then plug in our Radeon-specific functions
249 * (the texture functions are especially important)
251 _mesa_init_driver_functions( &functions
);
252 radeonInitDriverFuncs( &functions
);
253 radeonInitTextureFuncs( &functions
);
255 /* Allocate the Mesa context */
256 if (sharedContextPrivate
)
257 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
260 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
261 &functions
, (void *) rmesa
);
266 driContextPriv
->driverPrivate
= rmesa
;
268 /* Init radeon context data */
269 rmesa
->dri
.context
= driContextPriv
;
270 rmesa
->dri
.screen
= sPriv
;
271 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
272 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
273 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
274 rmesa
->dri
.fd
= sPriv
->fd
;
275 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
277 rmesa
->radeonScreen
= screen
;
278 rmesa
->sarea
= (drm_radeon_sarea_t
*)((GLubyte
*)sPriv
->pSAREA
+
279 screen
->sarea_priv_offset
);
282 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
284 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
285 make_empty_list( & rmesa
->swapped
);
287 rmesa
->nr_heaps
= screen
->numTexHeaps
;
288 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
289 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
292 RADEON_NR_TEX_REGIONS
,
293 (drmTextureRegionPtr
)rmesa
->sarea
->tex_list
[i
],
294 & rmesa
->sarea
->tex_age
[i
],
296 sizeof( radeonTexObj
),
297 (destroy_texture_object_t
*) radeonDestroyTexObj
);
299 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
300 & rmesa
->c_textureSwaps
);
302 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
304 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
305 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
306 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
308 rmesa
->swtcl
.RenderIndex
= ~0;
309 rmesa
->hw
.all_dirty
= GL_TRUE
;
311 /* Set the maximum texture size small enough that we can guarentee that
312 * all texture units can bind a maximal texture and have them both in
313 * texturable memory at once.
317 ctx
->Const
.MaxTextureUnits
= 2;
318 ctx
->Const
.MaxTextureImageUnits
= 2;
319 ctx
->Const
.MaxTextureCoordUnits
= 2;
321 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
325 11, /* max 2D texture size is 2048x2048 */
326 0, /* 3D textures unsupported. */
327 0, /* cube textures unsupported. */
328 11, /* max rect texture size is 2048x2048. */
332 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
336 ctx
->Const
.MinPointSize
= 1.0;
337 ctx
->Const
.MinPointSizeAA
= 1.0;
338 ctx
->Const
.MaxPointSize
= 1.0;
339 ctx
->Const
.MaxPointSizeAA
= 1.0;
341 ctx
->Const
.MinLineWidth
= 1.0;
342 ctx
->Const
.MinLineWidthAA
= 1.0;
343 ctx
->Const
.MaxLineWidth
= 10.0;
344 ctx
->Const
.MaxLineWidthAA
= 10.0;
345 ctx
->Const
.LineWidthGranularity
= 0.0625;
347 /* Set maxlocksize (and hence vb size) small enough to avoid
348 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
349 * fit in a single dma buffer for indexed rendering of quad strips,
352 ctx
->Const
.MaxArrayLockSize
=
353 MIN2( ctx
->Const
.MaxArrayLockSize
,
354 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
358 /* Initialize the software rasterizer and helper modules.
360 _swrast_CreateContext( ctx
);
361 _ac_CreateContext( ctx
);
362 _tnl_CreateContext( ctx
);
363 _swsetup_CreateContext( ctx
);
364 _ae_create_context( ctx
);
366 /* Install the customized pipeline:
368 _tnl_destroy_pipeline( ctx
);
369 _tnl_install_pipeline( ctx
, radeon_pipeline
);
370 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
372 /* Try and keep materials and vertices separate:
374 _tnl_isolate_materials( ctx
, GL_TRUE
);
377 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
379 /* Try and keep materials and vertices separate:
381 _tnl_isolate_materials( ctx
, GL_TRUE
);
384 /* Configure swrast and T&L to match hardware characteristics:
386 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
387 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
388 _tnl_allow_pixel_fog( ctx
, GL_FALSE
);
389 _tnl_allow_vertex_fog( ctx
, GL_TRUE
);
392 _math_matrix_ctr( &rmesa
->TexGenMatrix
[0] );
393 _math_matrix_ctr( &rmesa
->TexGenMatrix
[1] );
394 _math_matrix_ctr( &rmesa
->tmpmat
);
395 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[0] );
396 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[1] );
397 _math_matrix_set_identity( &rmesa
->tmpmat
);
399 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
400 if (rmesa
->glCtx
->Mesa_DXTn
) {
401 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
402 _mesa_enable_extension( ctx
, "GL_S3_s3tc" );
404 else if (driQueryOptionb (&rmesa
->optionCache
, "force_s3tc_enable")) {
405 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
408 if (rmesa
->dri
.drmMinor
>= 9)
409 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
411 /* XXX these should really go right after _mesa_init_driver_functions() */
412 radeonInitIoctlFuncs( ctx
);
413 radeonInitStateFuncs( ctx
);
414 radeonInitSpanFuncs( ctx
);
415 radeonInitState( rmesa
);
416 radeonInitSwtcl( ctx
);
418 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
419 ctx
->Const
.MaxArrayLockSize
, 32 );
421 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
422 rmesa
->iw
.irq_seq
= -1;
423 rmesa
->irqsEmitted
= 0;
424 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
425 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
427 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
429 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
430 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
432 rmesa
->get_ust
= (PFNGLXGETUSTPROC
) glXGetProcAddress( (const GLubyte
*) "__glXGetUST" );
433 if ( rmesa
->get_ust
== NULL
) {
434 rmesa
->get_ust
= get_ust_nop
;
436 (*rmesa
->get_ust
)( & rmesa
->swap_ust
);
440 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
444 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
445 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
446 fprintf(stderr
, "disabling 3D acceleration\n");
447 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
448 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
449 !(rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
)) {
450 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
451 rmesa
->radeonScreen
->chipset
&= ~RADEON_CHIPSET_TCL
;
452 fprintf(stderr
, "Disabling HW TCL support\n");
454 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
457 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
458 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
459 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
461 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
467 /* Destroy the device specific context.
469 /* Destroy the Mesa and driver specific context data.
471 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
473 GET_CURRENT_CONTEXT(ctx
);
474 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
475 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
477 /* check if we're deleting the currently bound context */
478 if (rmesa
== current
) {
479 RADEON_FIREVERTICES( rmesa
);
480 _mesa_make_current2(NULL
, NULL
, NULL
);
483 /* Free radeon context resources */
484 assert(rmesa
); /* should never be null */
486 GLboolean release_texture_heaps
;
489 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
490 _swsetup_DestroyContext( rmesa
->glCtx
);
491 _tnl_DestroyContext( rmesa
->glCtx
);
492 _ac_DestroyContext( rmesa
->glCtx
);
493 _swrast_DestroyContext( rmesa
->glCtx
);
495 radeonDestroySwtcl( rmesa
->glCtx
);
496 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
497 if (rmesa
->dma
.current
.buf
) {
498 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
499 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
502 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
503 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
504 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
505 radeonVtxfmtDestroy( rmesa
->glCtx
);
508 /* free the Mesa context */
509 rmesa
->glCtx
->DriverCtx
= NULL
;
510 _mesa_destroy_context( rmesa
->glCtx
);
512 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
514 if (rmesa
->state
.scissor
.pClipRects
) {
515 FREE(rmesa
->state
.scissor
.pClipRects
);
516 rmesa
->state
.scissor
.pClipRects
= 0;
519 if ( release_texture_heaps
) {
520 /* This share group is about to go away, free our private
521 * texture object data.
525 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
526 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
527 rmesa
->texture_heaps
[ i
] = NULL
;
530 assert( is_empty_list( & rmesa
->swapped
) );
533 /* free the option cache */
534 driDestroyOptionCache (&rmesa
->optionCache
);
544 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
547 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
548 radeonContextPtr rmesa
;
550 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
552 if (ctx
->Visual
.doubleBufferMode
) {
553 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
555 if ( rmesa
->doPageFlip
) {
556 radeonPageFlip( dPriv
);
559 radeonCopyBuffer( dPriv
);
564 /* XXX this shouldn't be an error but we can't handle it for now */
565 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
570 /* Force the context `c' to be the current context and associate with it
574 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
575 __DRIdrawablePrivate
*driDrawPriv
,
576 __DRIdrawablePrivate
*driReadPriv
)
578 if ( driContextPriv
) {
579 radeonContextPtr newCtx
=
580 (radeonContextPtr
) driContextPriv
->driverPrivate
;
582 if (RADEON_DEBUG
& DEBUG_DRI
)
583 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) newCtx
->glCtx
);
585 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
586 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
587 newCtx
->dri
.drawable
= driDrawPriv
;
588 radeonUpdateWindow( newCtx
->glCtx
);
589 radeonUpdateViewportOffset( newCtx
->glCtx
);
592 _mesa_make_current2( newCtx
->glCtx
,
593 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
594 (GLframebuffer
*) driReadPriv
->driverPrivate
);
596 if ( !newCtx
->glCtx
->Viewport
.Width
) {
597 _mesa_set_viewport( newCtx
->glCtx
, 0, 0,
598 driDrawPriv
->w
, driDrawPriv
->h
);
601 if (newCtx
->vb
.enabled
)
602 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
605 if (RADEON_DEBUG
& DEBUG_DRI
)
606 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
607 _mesa_make_current( 0, 0 );
610 if (RADEON_DEBUG
& DEBUG_DRI
)
611 fprintf(stderr
, "End %s\n", __FUNCTION__
);
615 /* Force the context `c' to be unbound from its buffer.
618 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
620 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
622 if (RADEON_DEBUG
& DEBUG_DRI
)
623 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) rmesa
->glCtx
);