1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
48 #include "array_cache/acache.h"
51 #include "tnl/t_pipeline.h"
53 #include "drivers/common/driverfuncs.h"
55 #include "radeon_context.h"
56 #include "radeon_ioctl.h"
57 #include "radeon_state.h"
58 #include "radeon_span.h"
59 #include "radeon_tex.h"
60 #include "radeon_swtcl.h"
61 #include "radeon_tcl.h"
62 #include "radeon_vtxfmt.h"
63 #include "radeon_maos.h"
65 #define DRIVER_DATE "20041207"
69 #include "xmlpool.h" /* for symbolic values of enum-type options */
71 int RADEON_DEBUG
= (0);
75 /* Return the width and height of the given buffer.
77 static void radeonGetBufferSize( GLframebuffer
*buffer
,
78 GLuint
*width
, GLuint
*height
)
80 GET_CURRENT_CONTEXT(ctx
);
81 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
83 LOCK_HARDWARE( rmesa
);
84 *width
= rmesa
->dri
.drawable
->w
;
85 *height
= rmesa
->dri
.drawable
->h
;
86 UNLOCK_HARDWARE( rmesa
);
89 /* Return various strings for glGetString().
91 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
93 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
94 static char buffer
[128];
96 GLuint agp_mode
= rmesa
->radeonScreen
->IsPCI
? 0 :
97 rmesa
->radeonScreen
->AGPMode
;
101 return (GLubyte
*)"Tungsten Graphics, Inc.";
104 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
107 sprintf( & buffer
[ offset
], " %sTCL",
108 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
111 return (GLubyte
*)buffer
;
119 /* Extension strings exported by the R100 driver.
121 static const char * const card_extensions
[] =
123 "GL_ARB_multisample",
124 "GL_ARB_multitexture",
125 "GL_ARB_texture_border_clamp",
126 "GL_ARB_texture_compression",
127 "GL_ARB_texture_env_add",
128 "GL_ARB_texture_env_combine",
129 "GL_ARB_texture_env_crossbar",
130 "GL_ARB_texture_env_dot3",
131 "GL_ARB_texture_mirrored_repeat",
132 "GL_EXT_blend_logic_op",
133 "GL_EXT_blend_subtract",
134 "GL_EXT_secondary_color",
135 "GL_EXT_stencil_wrap",
136 "GL_EXT_texture_edge_clamp",
137 "GL_EXT_texture_env_combine",
138 "GL_EXT_texture_env_dot3",
139 "GL_EXT_texture_filter_anisotropic",
140 "GL_EXT_texture_lod_bias",
141 "GL_EXT_texture_mirror_clamp",
142 "GL_ATI_texture_env_combine3",
143 "GL_ATI_texture_mirror_once",
144 "GL_MESA_ycbcr_texture",
145 "GL_NV_blend_square",
146 "GL_SGIS_generate_mipmap",
150 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
151 extern const struct tnl_pipeline_stage _radeon_render_stage
;
152 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
154 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
156 /* Try and go straight to t&l
160 /* Catch any t&l fallbacks
162 &_tnl_vertex_transform_stage
,
163 &_tnl_normal_transform_stage
,
164 &_tnl_lighting_stage
,
165 &_tnl_fog_coordinate_stage
,
167 &_tnl_texture_transform_stage
,
169 /* Scale texture rectangle to 0..1.
171 &_radeon_texrect_stage
,
173 &_radeon_render_stage
,
174 &_tnl_render_stage
, /* FALLBACK: */
180 /* Initialize the driver's misc functions.
182 static void radeonInitDriverFuncs( struct dd_function_table
*functions
)
184 functions
->GetBufferSize
= radeonGetBufferSize
;
185 functions
->ResizeBuffers
= _swrast_alloc_buffers
;
186 functions
->GetString
= radeonGetString
;
189 static const struct dri_debug_control debug_control
[] =
191 { "fall", DEBUG_FALLBACKS
},
192 { "tex", DEBUG_TEXTURE
},
193 { "ioctl", DEBUG_IOCTL
},
194 { "prim", DEBUG_PRIMS
},
195 { "vert", DEBUG_VERTS
},
196 { "state", DEBUG_STATE
},
197 { "code", DEBUG_CODEGEN
},
198 { "vfmt", DEBUG_VFMT
},
199 { "vtxf", DEBUG_VFMT
},
200 { "verb", DEBUG_VERBOSE
},
201 { "dri", DEBUG_DRI
},
202 { "dma", DEBUG_DMA
},
203 { "san", DEBUG_SANITY
},
204 { "sync", DEBUG_SYNC
},
210 get_ust_nop( int64_t * ust
)
217 /* Create the device specific context.
220 radeonCreateContext( const __GLcontextModes
*glVisual
,
221 __DRIcontextPrivate
*driContextPriv
,
222 void *sharedContextPrivate
)
224 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
225 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
226 struct dd_function_table functions
;
227 radeonContextPtr rmesa
;
228 GLcontext
*ctx
, *shareCtx
;
230 int tcl_mode
, fthrottle_mode
;
233 assert(driContextPriv
);
236 /* Allocate the Radeon context */
237 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
241 /* Parse configuration files.
242 * Do this here so that initialMaxAnisotropy is set before we create
243 * the default textures.
245 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
246 screen
->driScreen
->myNum
, "radeon");
247 rmesa
->initialMaxAnisotropy
= driQueryOptionf(&rmesa
->optionCache
,
248 "def_max_anisotropy");
250 if ( driQueryOptionb( &rmesa
->optionCache
, "hyperz" ) ) {
251 if ( sPriv
->drmMinor
< 13 )
252 fprintf( stderr
, "DRM version 1.%d too old to support HyperZ, "
253 "disabling.\n",sPriv
->drmMinor
);
255 rmesa
->using_hyperz
= GL_TRUE
;
258 if ( sPriv
->drmMinor
>= 15 )
259 rmesa
->texmicrotile
= GL_TRUE
;
261 /* Init default driver functions then plug in our Radeon-specific functions
262 * (the texture functions are especially important)
264 _mesa_init_driver_functions( &functions
);
265 radeonInitDriverFuncs( &functions
);
266 radeonInitTextureFuncs( &functions
);
268 /* Allocate the Mesa context */
269 if (sharedContextPrivate
)
270 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
273 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
274 &functions
, (void *) rmesa
);
279 driContextPriv
->driverPrivate
= rmesa
;
281 /* Init radeon context data */
282 rmesa
->dri
.context
= driContextPriv
;
283 rmesa
->dri
.screen
= sPriv
;
284 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
285 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
286 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
287 rmesa
->dri
.fd
= sPriv
->fd
;
288 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
290 rmesa
->radeonScreen
= screen
;
291 rmesa
->sarea
= (drm_radeon_sarea_t
*)((GLubyte
*)sPriv
->pSAREA
+
292 screen
->sarea_priv_offset
);
295 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
297 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
298 make_empty_list( & rmesa
->swapped
);
300 rmesa
->nr_heaps
= screen
->numTexHeaps
;
301 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
302 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
305 RADEON_NR_TEX_REGIONS
,
306 (drmTextureRegionPtr
)rmesa
->sarea
->tex_list
[i
],
307 & rmesa
->sarea
->tex_age
[i
],
309 sizeof( radeonTexObj
),
310 (destroy_texture_object_t
*) radeonDestroyTexObj
);
312 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
313 & rmesa
->c_textureSwaps
);
315 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
317 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
318 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
319 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
321 rmesa
->swtcl
.RenderIndex
= ~0;
322 rmesa
->hw
.all_dirty
= GL_TRUE
;
324 /* Set the maximum texture size small enough that we can guarentee that
325 * all texture units can bind a maximal texture and have them both in
326 * texturable memory at once.
330 ctx
->Const
.MaxTextureUnits
= 2;
331 ctx
->Const
.MaxTextureImageUnits
= 2;
332 ctx
->Const
.MaxTextureCoordUnits
= 2;
334 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
338 11, /* max 2D texture size is 2048x2048 */
339 0, /* 3D textures unsupported. */
340 0, /* cube textures unsupported. */
341 11, /* max rect texture size is 2048x2048. */
345 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
349 ctx
->Const
.MinPointSize
= 1.0;
350 ctx
->Const
.MinPointSizeAA
= 1.0;
351 ctx
->Const
.MaxPointSize
= 1.0;
352 ctx
->Const
.MaxPointSizeAA
= 1.0;
354 ctx
->Const
.MinLineWidth
= 1.0;
355 ctx
->Const
.MinLineWidthAA
= 1.0;
356 ctx
->Const
.MaxLineWidth
= 10.0;
357 ctx
->Const
.MaxLineWidthAA
= 10.0;
358 ctx
->Const
.LineWidthGranularity
= 0.0625;
360 /* Set maxlocksize (and hence vb size) small enough to avoid
361 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
362 * fit in a single dma buffer for indexed rendering of quad strips,
365 ctx
->Const
.MaxArrayLockSize
=
366 MIN2( ctx
->Const
.MaxArrayLockSize
,
367 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
371 /* Initialize the software rasterizer and helper modules.
373 _swrast_CreateContext( ctx
);
374 _ac_CreateContext( ctx
);
375 _tnl_CreateContext( ctx
);
376 _swsetup_CreateContext( ctx
);
377 _ae_create_context( ctx
);
379 /* Install the customized pipeline:
381 _tnl_destroy_pipeline( ctx
);
382 _tnl_install_pipeline( ctx
, radeon_pipeline
);
383 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
385 /* Try and keep materials and vertices separate:
387 _tnl_isolate_materials( ctx
, GL_TRUE
);
390 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
392 /* Try and keep materials and vertices separate:
394 _tnl_isolate_materials( ctx
, GL_TRUE
);
397 /* Configure swrast and T&L to match hardware characteristics:
399 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
400 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
401 _tnl_allow_pixel_fog( ctx
, GL_FALSE
);
402 _tnl_allow_vertex_fog( ctx
, GL_TRUE
);
405 _math_matrix_ctr( &rmesa
->TexGenMatrix
[0] );
406 _math_matrix_ctr( &rmesa
->TexGenMatrix
[1] );
407 _math_matrix_ctr( &rmesa
->tmpmat
);
408 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[0] );
409 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[1] );
410 _math_matrix_set_identity( &rmesa
->tmpmat
);
412 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
413 if (rmesa
->glCtx
->Mesa_DXTn
) {
414 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
415 _mesa_enable_extension( ctx
, "GL_S3_s3tc" );
417 else if (driQueryOptionb (&rmesa
->optionCache
, "force_s3tc_enable")) {
418 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
421 if (rmesa
->dri
.drmMinor
>= 9)
422 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
424 /* XXX these should really go right after _mesa_init_driver_functions() */
425 radeonInitIoctlFuncs( ctx
);
426 radeonInitStateFuncs( ctx
);
427 radeonInitSpanFuncs( ctx
);
428 radeonInitState( rmesa
);
429 radeonInitSwtcl( ctx
);
431 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
432 ctx
->Const
.MaxArrayLockSize
, 32 );
434 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
435 rmesa
->iw
.irq_seq
= -1;
436 rmesa
->irqsEmitted
= 0;
437 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
438 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
440 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
442 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
443 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
445 rmesa
->get_ust
= (PFNGLXGETUSTPROC
) glXGetProcAddress( (const GLubyte
*) "__glXGetUST" );
446 if ( rmesa
->get_ust
== NULL
) {
447 rmesa
->get_ust
= get_ust_nop
;
449 (*rmesa
->get_ust
)( & rmesa
->swap_ust
);
453 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
457 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
458 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
459 fprintf(stderr
, "disabling 3D acceleration\n");
460 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
461 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
462 !(rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
)) {
463 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
464 rmesa
->radeonScreen
->chipset
&= ~RADEON_CHIPSET_TCL
;
465 fprintf(stderr
, "Disabling HW TCL support\n");
467 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
470 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
471 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
472 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
474 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
480 /* Destroy the device specific context.
482 /* Destroy the Mesa and driver specific context data.
484 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
486 GET_CURRENT_CONTEXT(ctx
);
487 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
488 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
490 /* check if we're deleting the currently bound context */
491 if (rmesa
== current
) {
492 RADEON_FIREVERTICES( rmesa
);
493 _mesa_make_current2(NULL
, NULL
, NULL
);
496 /* Free radeon context resources */
497 assert(rmesa
); /* should never be null */
499 GLboolean release_texture_heaps
;
502 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
503 _swsetup_DestroyContext( rmesa
->glCtx
);
504 _tnl_DestroyContext( rmesa
->glCtx
);
505 _ac_DestroyContext( rmesa
->glCtx
);
506 _swrast_DestroyContext( rmesa
->glCtx
);
508 radeonDestroySwtcl( rmesa
->glCtx
);
509 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
510 if (rmesa
->dma
.current
.buf
) {
511 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
512 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
515 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
516 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
517 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
518 radeonVtxfmtDestroy( rmesa
->glCtx
);
521 /* free the Mesa context */
522 rmesa
->glCtx
->DriverCtx
= NULL
;
523 _mesa_destroy_context( rmesa
->glCtx
);
525 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
527 if (rmesa
->state
.scissor
.pClipRects
) {
528 FREE(rmesa
->state
.scissor
.pClipRects
);
529 rmesa
->state
.scissor
.pClipRects
= NULL
;
532 if ( release_texture_heaps
) {
533 /* This share group is about to go away, free our private
534 * texture object data.
538 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
539 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
540 rmesa
->texture_heaps
[ i
] = NULL
;
543 assert( is_empty_list( & rmesa
->swapped
) );
546 /* free the option cache */
547 driDestroyOptionCache (&rmesa
->optionCache
);
557 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
560 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
561 radeonContextPtr rmesa
;
563 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
565 if (ctx
->Visual
.doubleBufferMode
) {
566 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
568 if ( rmesa
->doPageFlip
) {
569 radeonPageFlip( dPriv
);
572 radeonCopyBuffer( dPriv
);
577 /* XXX this shouldn't be an error but we can't handle it for now */
578 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
583 /* Force the context `c' to be the current context and associate with it
587 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
588 __DRIdrawablePrivate
*driDrawPriv
,
589 __DRIdrawablePrivate
*driReadPriv
)
591 if ( driContextPriv
) {
592 radeonContextPtr newCtx
=
593 (radeonContextPtr
) driContextPriv
->driverPrivate
;
595 if (RADEON_DEBUG
& DEBUG_DRI
)
596 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) newCtx
->glCtx
);
598 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
599 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
600 newCtx
->dri
.drawable
= driDrawPriv
;
601 radeonUpdateWindow( newCtx
->glCtx
);
602 radeonUpdateViewportOffset( newCtx
->glCtx
);
605 _mesa_make_current2( newCtx
->glCtx
,
606 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
607 (GLframebuffer
*) driReadPriv
->driverPrivate
);
609 if (newCtx
->vb
.enabled
)
610 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
613 if (RADEON_DEBUG
& DEBUG_DRI
)
614 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
615 _mesa_make_current( NULL
, NULL
);
618 if (RADEON_DEBUG
& DEBUG_DRI
)
619 fprintf(stderr
, "End %s\n", __FUNCTION__
);
623 /* Force the context `c' to be unbound from its buffer.
626 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
628 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
630 if (RADEON_DEBUG
& DEBUG_DRI
)
631 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) rmesa
->glCtx
);