1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Kevin E. Martin <martin@valinux.com>
33 * Gareth Hughes <gareth@valinux.com>
34 * Keith Whitwell <keith@tungstengraphics.com>
37 #include "main/glheader.h"
38 #include "main/api_arrayelt.h"
39 #include "main/context.h"
40 #include "main/simple_list.h"
41 #include "main/imports.h"
42 #include "main/matrix.h"
43 #include "main/extensions.h"
44 #include "main/framebuffer.h"
45 #include "main/state.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
52 #include "tnl/t_pipeline.h"
54 #include "drivers/common/driverfuncs.h"
56 #include "radeon_context.h"
57 #include "radeon_ioctl.h"
58 #include "radeon_state.h"
59 #include "radeon_span.h"
60 #include "radeon_tex.h"
61 #include "radeon_swtcl.h"
62 #include "radeon_tcl.h"
63 #include "radeon_maos.h"
65 #define need_GL_ARB_multisample
66 #define need_GL_ARB_vertex_buffer_object
67 #define need_GL_EXT_blend_minmax
68 #define need_GL_EXT_fog_coord
69 #define need_GL_EXT_secondary_color
70 #include "extension_helper.h"
72 #define DRIVER_DATE "20061018"
76 #include "xmlpool.h" /* for symbolic values of enum-type options */
78 int RADEON_DEBUG
= (0);
82 /* Return various strings for glGetString().
84 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
86 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
87 static char buffer
[128];
89 GLuint agp_mode
= (rmesa
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
90 rmesa
->radeonScreen
->AGPMode
;
94 return (GLubyte
*)"Tungsten Graphics, Inc.";
97 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
100 sprintf( & buffer
[ offset
], " %sTCL",
101 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
104 return (GLubyte
*)buffer
;
112 /* Extension strings exported by the R100 driver.
114 const struct dri_extension card_extensions
[] =
116 { "GL_ARB_multisample", GL_ARB_multisample_functions
},
117 { "GL_ARB_multitexture", NULL
},
118 { "GL_ARB_texture_border_clamp", NULL
},
119 { "GL_ARB_texture_env_add", NULL
},
120 { "GL_ARB_texture_env_combine", NULL
},
121 { "GL_ARB_texture_env_crossbar", NULL
},
122 { "GL_ARB_texture_env_dot3", NULL
},
123 { "GL_ARB_texture_mirrored_repeat", NULL
},
124 { "GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions
},
125 { "GL_EXT_blend_logic_op", NULL
},
126 { "GL_EXT_blend_subtract", GL_EXT_blend_minmax_functions
},
127 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions
},
128 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions
},
129 { "GL_EXT_stencil_wrap", NULL
},
130 { "GL_EXT_texture_edge_clamp", NULL
},
131 { "GL_EXT_texture_env_combine", NULL
},
132 { "GL_EXT_texture_env_dot3", NULL
},
133 { "GL_EXT_texture_filter_anisotropic", NULL
},
134 { "GL_EXT_texture_lod_bias", NULL
},
135 { "GL_EXT_texture_mirror_clamp", NULL
},
136 { "GL_ATI_texture_env_combine3", NULL
},
137 { "GL_ATI_texture_mirror_once", NULL
},
138 { "GL_MESA_ycbcr_texture", NULL
},
139 { "GL_NV_blend_square", NULL
},
140 { "GL_SGIS_generate_mipmap", NULL
},
144 extern const struct tnl_pipeline_stage _radeon_render_stage
;
145 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
147 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
149 /* Try and go straight to t&l
153 /* Catch any t&l fallbacks
155 &_tnl_vertex_transform_stage
,
156 &_tnl_normal_transform_stage
,
157 &_tnl_lighting_stage
,
158 &_tnl_fog_coordinate_stage
,
160 &_tnl_texture_transform_stage
,
162 &_radeon_render_stage
,
163 &_tnl_render_stage
, /* FALLBACK: */
169 /* Initialize the driver's misc functions.
171 static void radeonInitDriverFuncs( struct dd_function_table
*functions
)
173 functions
->GetString
= radeonGetString
;
176 static const struct dri_debug_control debug_control
[] =
178 { "fall", DEBUG_FALLBACKS
},
179 { "tex", DEBUG_TEXTURE
},
180 { "ioctl", DEBUG_IOCTL
},
181 { "prim", DEBUG_PRIMS
},
182 { "vert", DEBUG_VERTS
},
183 { "state", DEBUG_STATE
},
184 { "code", DEBUG_CODEGEN
},
185 { "vfmt", DEBUG_VFMT
},
186 { "vtxf", DEBUG_VFMT
},
187 { "verb", DEBUG_VERBOSE
},
188 { "dri", DEBUG_DRI
},
189 { "dma", DEBUG_DMA
},
190 { "san", DEBUG_SANITY
},
191 { "sync", DEBUG_SYNC
},
196 /* Create the device specific context.
199 radeonCreateContext( const __GLcontextModes
*glVisual
,
200 __DRIcontextPrivate
*driContextPriv
,
201 void *sharedContextPrivate
)
203 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
204 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
205 struct dd_function_table functions
;
206 radeonContextPtr rmesa
;
207 GLcontext
*ctx
, *shareCtx
;
209 int tcl_mode
, fthrottle_mode
;
212 assert(driContextPriv
);
215 /* Allocate the Radeon context */
216 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
220 /* init exp fog table data */
221 radeonInitStaticFogData();
223 /* Parse configuration files.
224 * Do this here so that initialMaxAnisotropy is set before we create
225 * the default textures.
227 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
228 screen
->driScreen
->myNum
, "radeon");
229 rmesa
->initialMaxAnisotropy
= driQueryOptionf(&rmesa
->optionCache
,
230 "def_max_anisotropy");
232 if ( driQueryOptionb( &rmesa
->optionCache
, "hyperz" ) ) {
233 if ( sPriv
->drm_version
.minor
< 13 )
234 fprintf( stderr
, "DRM version 1.%d too old to support HyperZ, "
235 "disabling.\n", sPriv
->drm_version
.minor
);
237 rmesa
->using_hyperz
= GL_TRUE
;
240 if ( sPriv
->drm_version
.minor
>= 15 )
241 rmesa
->texmicrotile
= GL_TRUE
;
243 /* Init default driver functions then plug in our Radeon-specific functions
244 * (the texture functions are especially important)
246 _mesa_init_driver_functions( &functions
);
247 radeonInitDriverFuncs( &functions
);
248 radeonInitTextureFuncs( &functions
);
250 /* Allocate the Mesa context */
251 if (sharedContextPrivate
)
252 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
255 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
256 &functions
, (void *) rmesa
);
261 driContextPriv
->driverPrivate
= rmesa
;
263 /* Init radeon context data */
264 rmesa
->dri
.context
= driContextPriv
;
265 rmesa
->dri
.screen
= sPriv
;
266 rmesa
->dri
.drawable
= NULL
;
267 rmesa
->dri
.readable
= NULL
;
268 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
269 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
270 rmesa
->dri
.fd
= sPriv
->fd
;
271 rmesa
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
273 rmesa
->radeonScreen
= screen
;
274 rmesa
->sarea
= (drm_radeon_sarea_t
*)((GLubyte
*)sPriv
->pSAREA
+
275 screen
->sarea_priv_offset
);
278 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
280 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
281 make_empty_list( & rmesa
->swapped
);
283 rmesa
->nr_heaps
= screen
->numTexHeaps
;
284 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
285 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
288 RADEON_NR_TEX_REGIONS
,
289 (drmTextureRegionPtr
)rmesa
->sarea
->tex_list
[i
],
290 & rmesa
->sarea
->tex_age
[i
],
292 sizeof( radeonTexObj
),
293 (destroy_texture_object_t
*) radeonDestroyTexObj
);
295 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
296 & rmesa
->c_textureSwaps
);
298 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
300 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
301 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
302 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
304 rmesa
->swtcl
.RenderIndex
= ~0;
305 rmesa
->hw
.all_dirty
= GL_TRUE
;
307 /* Set the maximum texture size small enough that we can guarentee that
308 * all texture units can bind a maximal texture and have all of them in
309 * texturable memory at once. Depending on the allow_large_textures driconf
310 * setting allow larger textures.
314 ctx
->Const
.MaxTextureUnits
= driQueryOptioni (&rmesa
->optionCache
,
316 ctx
->Const
.MaxTextureImageUnits
= ctx
->Const
.MaxTextureUnits
;
317 ctx
->Const
.MaxTextureCoordUnits
= ctx
->Const
.MaxTextureUnits
;
319 i
= driQueryOptioni( &rmesa
->optionCache
, "allow_large_textures");
321 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
325 11, /* max 2D texture size is 2048x2048 */
327 9, /* \todo: max cube texture size seems to be 512x512(x6) */
328 11, /* max rect texture size is 2048x2048. */
334 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
338 ctx
->Const
.MinPointSize
= 1.0;
339 ctx
->Const
.MinPointSizeAA
= 1.0;
340 ctx
->Const
.MaxPointSize
= 1.0;
341 ctx
->Const
.MaxPointSizeAA
= 1.0;
343 ctx
->Const
.MinLineWidth
= 1.0;
344 ctx
->Const
.MinLineWidthAA
= 1.0;
345 ctx
->Const
.MaxLineWidth
= 10.0;
346 ctx
->Const
.MaxLineWidthAA
= 10.0;
347 ctx
->Const
.LineWidthGranularity
= 0.0625;
349 /* Set maxlocksize (and hence vb size) small enough to avoid
350 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
351 * fit in a single dma buffer for indexed rendering of quad strips,
354 ctx
->Const
.MaxArrayLockSize
=
355 MIN2( ctx
->Const
.MaxArrayLockSize
,
356 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
360 /* Initialize the software rasterizer and helper modules.
362 _swrast_CreateContext( ctx
);
363 _vbo_CreateContext( ctx
);
364 _tnl_CreateContext( ctx
);
365 _swsetup_CreateContext( ctx
);
366 _ae_create_context( ctx
);
368 /* Install the customized pipeline:
370 _tnl_destroy_pipeline( ctx
);
371 _tnl_install_pipeline( ctx
, radeon_pipeline
);
373 /* Try and keep materials and vertices separate:
375 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
377 /* Configure swrast and T&L to match hardware characteristics:
379 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
380 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
381 _tnl_allow_pixel_fog( ctx
, GL_FALSE
);
382 _tnl_allow_vertex_fog( ctx
, GL_TRUE
);
385 for ( i
= 0 ; i
< RADEON_MAX_TEXTURE_UNITS
; i
++ ) {
386 _math_matrix_ctr( &rmesa
->TexGenMatrix
[i
] );
387 _math_matrix_ctr( &rmesa
->tmpmat
[i
] );
388 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[i
] );
389 _math_matrix_set_identity( &rmesa
->tmpmat
[i
] );
392 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
393 if (rmesa
->radeonScreen
->drmSupportsCubeMapsR100
)
394 _mesa_enable_extension( ctx
, "GL_ARB_texture_cube_map" );
395 if (rmesa
->glCtx
->Mesa_DXTn
) {
396 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
397 _mesa_enable_extension( ctx
, "GL_S3_s3tc" );
399 else if (driQueryOptionb (&rmesa
->optionCache
, "force_s3tc_enable")) {
400 _mesa_enable_extension( ctx
, "GL_EXT_texture_compression_s3tc" );
403 if (rmesa
->dri
.drmMinor
>= 9)
404 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
406 /* XXX these should really go right after _mesa_init_driver_functions() */
407 radeonInitIoctlFuncs( ctx
);
408 radeonInitStateFuncs( ctx
);
409 radeonInitSpanFuncs( ctx
);
410 radeonInitState( rmesa
);
411 radeonInitSwtcl( ctx
);
413 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
414 ctx
->Const
.MaxArrayLockSize
, 32 );
416 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
417 rmesa
->iw
.irq_seq
= -1;
418 rmesa
->irqsEmitted
= 0;
419 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
420 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
422 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
424 (*sPriv
->systemTime
->getUST
)( & rmesa
->swap_ust
);
428 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
432 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
433 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
434 fprintf(stderr
, "disabling 3D acceleration\n");
435 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
436 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
437 !(rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)) {
438 if (rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
439 rmesa
->radeonScreen
->chip_flags
&= ~RADEON_CHIPSET_TCL
;
440 fprintf(stderr
, "Disabling HW TCL support\n");
442 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
445 if (rmesa
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
446 /* _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
452 /* Destroy the device specific context.
454 /* Destroy the Mesa and driver specific context data.
456 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
458 GET_CURRENT_CONTEXT(ctx
);
459 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
460 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
462 /* check if we're deleting the currently bound context */
463 if (rmesa
== current
) {
464 RADEON_FIREVERTICES( rmesa
);
465 _mesa_make_current(NULL
, NULL
, NULL
);
468 /* Free radeon context resources */
469 assert(rmesa
); /* should never be null */
471 GLboolean release_texture_heaps
;
474 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
475 _swsetup_DestroyContext( rmesa
->glCtx
);
476 _tnl_DestroyContext( rmesa
->glCtx
);
477 _vbo_DestroyContext( rmesa
->glCtx
);
478 _swrast_DestroyContext( rmesa
->glCtx
);
480 radeonDestroySwtcl( rmesa
->glCtx
);
481 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
482 if (rmesa
->dma
.current
.buf
) {
483 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
484 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
487 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
489 if (rmesa
->state
.scissor
.pClipRects
) {
490 FREE(rmesa
->state
.scissor
.pClipRects
);
491 rmesa
->state
.scissor
.pClipRects
= NULL
;
494 if ( release_texture_heaps
) {
495 /* This share group is about to go away, free our private
496 * texture object data.
500 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
501 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
502 rmesa
->texture_heaps
[ i
] = NULL
;
505 assert( is_empty_list( & rmesa
->swapped
) );
508 /* free the Mesa context */
509 rmesa
->glCtx
->DriverCtx
= NULL
;
510 _mesa_destroy_context( rmesa
->glCtx
);
512 /* free the option cache */
513 driDestroyOptionCache (&rmesa
->optionCache
);
523 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
526 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
527 radeonContextPtr rmesa
;
529 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
531 if (ctx
->Visual
.doubleBufferMode
) {
532 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
534 if ( rmesa
->doPageFlip
) {
535 radeonPageFlip( dPriv
);
538 radeonCopyBuffer( dPriv
, NULL
);
543 /* XXX this shouldn't be an error but we can't handle it for now */
544 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
548 void radeonCopySubBuffer(__DRIdrawablePrivate
* dPriv
,
549 int x
, int y
, int w
, int h
)
551 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
552 radeonContextPtr radeon
;
555 radeon
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
558 if (ctx
->Visual
.doubleBufferMode
) {
559 drm_clip_rect_t rect
;
560 rect
.x1
= x
+ dPriv
->x
;
561 rect
.y1
= (dPriv
->h
- y
- h
) + dPriv
->y
;
562 rect
.x2
= rect
.x1
+ w
;
563 rect
.y2
= rect
.y1
+ h
;
564 _mesa_notifySwapBuffers(ctx
); /* flush pending rendering comands */
565 radeonCopyBuffer(dPriv
, &rect
);
568 /* XXX this shouldn't be an error but we can't handle it for now */
569 _mesa_problem(NULL
, "%s: drawable has no context!",
574 /* Make context `c' the current context and bind it to the given
575 * drawing and reading surfaces.
578 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
579 __DRIdrawablePrivate
*driDrawPriv
,
580 __DRIdrawablePrivate
*driReadPriv
)
582 if ( driContextPriv
) {
583 radeonContextPtr newCtx
=
584 (radeonContextPtr
) driContextPriv
->driverPrivate
;
586 if (RADEON_DEBUG
& DEBUG_DRI
)
587 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) newCtx
->glCtx
);
589 newCtx
->dri
.readable
= driReadPriv
;
591 if ( (newCtx
->dri
.drawable
!= driDrawPriv
) ||
592 newCtx
->lastStamp
!= driDrawPriv
->lastStamp
) {
593 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
594 driDrawPriv
->vblFlags
= (newCtx
->radeonScreen
->irq
!= 0)
595 ? driGetDefaultVBlankFlags(&newCtx
->optionCache
)
596 : VBLANK_FLAG_NO_IRQ
;
598 driDrawableInitVBlank( driDrawPriv
);
601 newCtx
->dri
.drawable
= driDrawPriv
;
603 radeonSetCliprects(newCtx
);
604 radeonUpdateViewportOffset( newCtx
->glCtx
);
607 _mesa_make_current( newCtx
->glCtx
,
608 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
609 (GLframebuffer
*) driReadPriv
->driverPrivate
);
611 _mesa_update_state( newCtx
->glCtx
);
613 if (RADEON_DEBUG
& DEBUG_DRI
)
614 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
615 _mesa_make_current( NULL
, NULL
, NULL
);
618 if (RADEON_DEBUG
& DEBUG_DRI
)
619 fprintf(stderr
, "End %s\n", __FUNCTION__
);
623 /* Force the context `c' to be unbound from its buffer.
626 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
628 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
630 if (RADEON_DEBUG
& DEBUG_DRI
)
631 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, (void *) rmesa
->glCtx
);