1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
48 #include "array_cache/acache.h"
51 #include "tnl/t_pipeline.h"
53 #include "radeon_context.h"
54 #include "radeon_ioctl.h"
55 #include "radeon_state.h"
56 #include "radeon_span.h"
57 #include "radeon_tex.h"
58 #include "radeon_swtcl.h"
59 #include "radeon_tcl.h"
60 #include "radeon_vtxfmt.h"
61 #include "radeon_maos.h"
63 #define DRIVER_DATE "20030328"
67 #include "xmlpool.h" /* for symbolic values of enum-type options */
69 int RADEON_DEBUG
= (0);
73 /* Return the width and height of the given buffer.
75 static void radeonGetBufferSize( GLframebuffer
*buffer
,
76 GLuint
*width
, GLuint
*height
)
78 GET_CURRENT_CONTEXT(ctx
);
79 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
81 LOCK_HARDWARE( rmesa
);
82 *width
= rmesa
->dri
.drawable
->w
;
83 *height
= rmesa
->dri
.drawable
->h
;
84 UNLOCK_HARDWARE( rmesa
);
87 /* Return various strings for glGetString().
89 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
91 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
92 static char buffer
[128];
94 GLuint agp_mode
= rmesa
->radeonScreen
->IsPCI
? 0 :
95 rmesa
->radeonScreen
->AGPMode
;
99 return (GLubyte
*)"Tungsten Graphics, Inc.";
102 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
105 sprintf( & buffer
[ offset
], "%sTCL",
106 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
109 return (GLubyte
*)buffer
;
117 /* Extension strings exported by the R100 driver.
119 static const char * const card_extensions
[] =
121 "GL_ARB_multisample",
122 "GL_ARB_multitexture",
123 "GL_ARB_texture_border_clamp",
124 "GL_ARB_texture_compression",
125 "GL_ARB_texture_env_add",
126 "GL_ARB_texture_env_combine",
127 "GL_ARB_texture_env_dot3",
128 "GL_ARB_texture_mirrored_repeat",
129 "GL_EXT_blend_logic_op",
130 "GL_EXT_blend_subtract",
131 "GL_EXT_secondary_color",
132 "GL_EXT_texture_edge_clamp",
133 "GL_EXT_texture_env_combine",
134 "GL_EXT_texture_env_dot3",
135 "GL_EXT_texture_filter_anisotropic",
136 "GL_EXT_texture_lod_bias",
137 "GL_ATI_texture_env_combine3",
138 "GL_ATI_texture_mirror_once",
139 "GL_MESA_ycbcr_texture",
140 "GL_NV_blend_square",
141 "GL_SGIS_generate_mipmap",
145 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
146 extern const struct tnl_pipeline_stage _radeon_render_stage
;
147 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
149 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
151 /* Try and go straight to t&l
155 /* Catch any t&l fallbacks
157 &_tnl_vertex_transform_stage
,
158 &_tnl_normal_transform_stage
,
159 &_tnl_lighting_stage
,
160 &_tnl_fog_coordinate_stage
,
162 &_tnl_texture_transform_stage
,
164 /* Scale texture rectangle to 0..1.
166 &_radeon_texrect_stage
,
168 &_radeon_render_stage
,
169 &_tnl_render_stage
, /* FALLBACK: */
175 /* Initialize the driver's misc functions.
177 static void radeonInitDriverFuncs( GLcontext
*ctx
)
179 ctx
->Driver
.GetBufferSize
= radeonGetBufferSize
;
180 ctx
->Driver
.ResizeBuffers
= _swrast_alloc_buffers
;
181 ctx
->Driver
.GetString
= radeonGetString
;
183 ctx
->Driver
.Error
= NULL
;
184 ctx
->Driver
.DrawPixels
= NULL
;
185 ctx
->Driver
.Bitmap
= NULL
;
188 static const struct dri_debug_control debug_control
[] =
190 { "fall", DEBUG_FALLBACKS
},
191 { "tex", DEBUG_TEXTURE
},
192 { "ioctl", DEBUG_IOCTL
},
193 { "prim", DEBUG_PRIMS
},
194 { "vert", DEBUG_VERTS
},
195 { "state", DEBUG_STATE
},
196 { "code", DEBUG_CODEGEN
},
197 { "vfmt", DEBUG_VFMT
},
198 { "vtxf", DEBUG_VFMT
},
199 { "verb", DEBUG_VERBOSE
},
200 { "dri", DEBUG_DRI
},
201 { "dma", DEBUG_DMA
},
202 { "san", DEBUG_SANITY
},
208 get_ust_nop( int64_t * ust
)
215 /* Create the device specific context.
218 radeonCreateContext( const __GLcontextModes
*glVisual
,
219 __DRIcontextPrivate
*driContextPriv
,
220 void *sharedContextPrivate
)
222 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
223 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
224 radeonContextPtr rmesa
;
225 GLcontext
*ctx
, *shareCtx
;
227 int tcl_mode
, fthrottle_mode
;
230 assert(driContextPriv
);
233 /* Allocate the Radeon context */
234 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
238 /* Allocate the Mesa context */
239 if (sharedContextPrivate
)
240 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
243 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
, (void *) rmesa
, GL_TRUE
);
248 driContextPriv
->driverPrivate
= rmesa
;
250 /* Init radeon context data */
251 rmesa
->dri
.context
= driContextPriv
;
252 rmesa
->dri
.screen
= sPriv
;
253 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
254 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
255 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
256 rmesa
->dri
.fd
= sPriv
->fd
;
257 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
259 /* Parse configuration files */
260 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
261 screen
->driScreen
->myNum
, "radeon");
263 rmesa
->radeonScreen
= screen
;
264 rmesa
->sarea
= (RADEONSAREAPrivPtr
)((GLubyte
*)sPriv
->pSAREA
+
265 screen
->sarea_priv_offset
);
268 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
270 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
271 make_empty_list( & rmesa
->swapped
);
273 rmesa
->nr_heaps
= screen
->numTexHeaps
;
274 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
275 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
278 RADEON_NR_TEX_REGIONS
,
279 rmesa
->sarea
->texList
[i
],
280 & rmesa
->sarea
->texAge
[i
],
282 sizeof( radeonTexObj
),
283 (destroy_texture_object_t
*) radeonDestroyTexObj
);
285 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
286 & rmesa
->c_textureSwaps
);
288 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
290 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
291 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
292 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
294 rmesa
->swtcl
.RenderIndex
= ~0;
295 rmesa
->lost_context
= 1;
297 /* Set the maximum texture size small enough that we can guarentee that
298 * all texture units can bind a maximal texture and have them both in
299 * texturable memory at once.
303 ctx
->Const
.MaxTextureUnits
= 2;
304 ctx
->Const
.MaxTextureImageUnits
= 2;
305 ctx
->Const
.MaxTextureCoordUnits
= 2;
307 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
311 11, /* max 2D texture size is 2048x2048 */
312 0, /* 3D textures unsupported. */
313 0, /* cube textures unsupported. */
314 11, /* max rect texture size is 2048x2048. */
318 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
322 ctx
->Const
.MinPointSize
= 1.0;
323 ctx
->Const
.MinPointSizeAA
= 1.0;
324 ctx
->Const
.MaxPointSize
= 1.0;
325 ctx
->Const
.MaxPointSizeAA
= 1.0;
327 ctx
->Const
.MinLineWidth
= 1.0;
328 ctx
->Const
.MinLineWidthAA
= 1.0;
329 ctx
->Const
.MaxLineWidth
= 10.0;
330 ctx
->Const
.MaxLineWidthAA
= 10.0;
331 ctx
->Const
.LineWidthGranularity
= 0.0625;
333 /* Set maxlocksize (and hence vb size) small enough to avoid
334 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
335 * fit in a single dma buffer for indexed rendering of quad strips,
338 ctx
->Const
.MaxArrayLockSize
=
339 MIN2( ctx
->Const
.MaxArrayLockSize
,
340 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
344 /* Initialize the software rasterizer and helper modules.
346 _swrast_CreateContext( ctx
);
347 _ac_CreateContext( ctx
);
348 _tnl_CreateContext( ctx
);
349 _swsetup_CreateContext( ctx
);
350 _ae_create_context( ctx
);
352 /* Install the customized pipeline:
354 _tnl_destroy_pipeline( ctx
);
355 _tnl_install_pipeline( ctx
, radeon_pipeline
);
356 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
358 /* Try and keep materials and vertices separate:
360 _tnl_isolate_materials( ctx
, GL_TRUE
);
363 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
365 /* Try and keep materials and vertices separate:
367 _tnl_isolate_materials( ctx
, GL_TRUE
);
370 /* Configure swrast to match hardware characteristics:
372 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
373 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
376 _math_matrix_ctr( &rmesa
->TexGenMatrix
[0] );
377 _math_matrix_ctr( &rmesa
->TexGenMatrix
[1] );
378 _math_matrix_ctr( &rmesa
->tmpmat
);
379 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[0] );
380 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[1] );
381 _math_matrix_set_identity( &rmesa
->tmpmat
);
383 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
385 if (rmesa
->dri
.drmMinor
>= 9)
386 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
388 radeonInitDriverFuncs( ctx
);
389 radeonInitIoctlFuncs( ctx
);
390 radeonInitStateFuncs( ctx
);
391 radeonInitSpanFuncs( ctx
);
392 radeonInitTextureFuncs( ctx
);
393 radeonInitState( rmesa
);
394 radeonInitSwtcl( ctx
);
396 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
397 ctx
->Const
.MaxArrayLockSize
, 32 );
399 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
400 rmesa
->iw
.irq_seq
= -1;
401 rmesa
->irqsEmitted
= 0;
402 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
403 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
405 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
407 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
408 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
410 rmesa
->get_ust
= (PFNGLXGETUSTPROC
) glXGetProcAddress( (const GLubyte
*) "__glXGetUST" );
411 if ( rmesa
->get_ust
== NULL
) {
412 rmesa
->get_ust
= get_ust_nop
;
415 rmesa
->get_ust
= get_ust_nop
;
418 (*rmesa
->get_ust
)( & rmesa
->swap_ust
);
422 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
426 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
427 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
428 fprintf(stderr
, "disabling 3D acceleration\n");
429 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
430 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
431 !(rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
)) {
432 rmesa
->radeonScreen
->chipset
&= ~RADEON_CHIPSET_TCL
;
433 fprintf(stderr
, "disabling TCL support\n");
434 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
437 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
438 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
439 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
441 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
447 /* Destroy the device specific context.
449 /* Destroy the Mesa and driver specific context data.
451 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
453 GET_CURRENT_CONTEXT(ctx
);
454 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
455 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
457 /* check if we're deleting the currently bound context */
458 if (rmesa
== current
) {
459 RADEON_FIREVERTICES( rmesa
);
460 _mesa_make_current2(NULL
, NULL
, NULL
);
463 /* Free radeon context resources */
464 assert(rmesa
); /* should never be null */
466 GLboolean release_texture_heaps
;
469 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
470 _swsetup_DestroyContext( rmesa
->glCtx
);
471 _tnl_DestroyContext( rmesa
->glCtx
);
472 _ac_DestroyContext( rmesa
->glCtx
);
473 _swrast_DestroyContext( rmesa
->glCtx
);
475 radeonDestroySwtcl( rmesa
->glCtx
);
476 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
477 if (rmesa
->dma
.current
.buf
) {
478 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
479 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
482 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
483 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
484 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
485 radeonVtxfmtDestroy( rmesa
->glCtx
);
488 /* free the Mesa context */
489 rmesa
->glCtx
->DriverCtx
= NULL
;
490 _mesa_destroy_context( rmesa
->glCtx
);
492 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
494 if (rmesa
->state
.scissor
.pClipRects
) {
495 FREE(rmesa
->state
.scissor
.pClipRects
);
496 rmesa
->state
.scissor
.pClipRects
= 0;
499 if ( release_texture_heaps
) {
500 /* This share group is about to go away, free our private
501 * texture object data.
505 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
506 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
507 rmesa
->texture_heaps
[ i
] = NULL
;
510 assert( is_empty_list( & rmesa
->swapped
) );
513 /* free the option cache */
514 driDestroyOptionCache (&rmesa
->optionCache
);
524 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
527 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
528 radeonContextPtr rmesa
;
530 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
532 if (ctx
->Visual
.doubleBufferMode
) {
533 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
535 if ( rmesa
->doPageFlip
) {
536 radeonPageFlip( dPriv
);
539 radeonCopyBuffer( dPriv
);
544 /* XXX this shouldn't be an error but we can't handle it for now */
545 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
550 /* Force the context `c' to be the current context and associate with it
554 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
555 __DRIdrawablePrivate
*driDrawPriv
,
556 __DRIdrawablePrivate
*driReadPriv
)
558 if ( driContextPriv
) {
559 radeonContextPtr newCtx
=
560 (radeonContextPtr
) driContextPriv
->driverPrivate
;
562 if (RADEON_DEBUG
& DEBUG_DRI
)
563 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, newCtx
->glCtx
);
565 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
566 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
567 newCtx
->dri
.drawable
= driDrawPriv
;
568 radeonUpdateWindow( newCtx
->glCtx
);
569 radeonUpdateViewportOffset( newCtx
->glCtx
);
572 _mesa_make_current2( newCtx
->glCtx
,
573 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
574 (GLframebuffer
*) driReadPriv
->driverPrivate
);
576 if ( !newCtx
->glCtx
->Viewport
.Width
) {
577 _mesa_set_viewport( newCtx
->glCtx
, 0, 0,
578 driDrawPriv
->w
, driDrawPriv
->h
);
581 if (newCtx
->vb
.enabled
)
582 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
585 if (RADEON_DEBUG
& DEBUG_DRI
)
586 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
587 _mesa_make_current( 0, 0 );
590 if (RADEON_DEBUG
& DEBUG_DRI
)
591 fprintf(stderr
, "End %s\n", __FUNCTION__
);
595 /* Force the context `c' to be unbound from its buffer.
598 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
600 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
602 if (RADEON_DEBUG
& DEBUG_DRI
)
603 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, rmesa
->glCtx
);