src/mesa/drivers/dri/radeon/radeon_context.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Kevin E. Martin <martin@valinux.com>
  33  *   Gareth Hughes <gareth@valinux.com>
  34  *   Keith Whitwell <keith@tungstengraphics.com>
  35  */
  36
  37 #include "main/glheader.h"
  38 #include "main/api_arrayelt.h"
  39 #include "main/context.h"
  40 #include "main/simple_list.h"
  41 #include "main/imports.h"
  42 #include "main/matrix.h"
  43 #include "main/extensions.h"
  44 #include "main/framebuffer.h"
  45 #include "main/state.h"
  46
  47 #include "swrast/swrast.h"
  48 #include "swrast_setup/swrast_setup.h"
  49 #include "vbo/vbo.h"
  50
  51 #include "tnl/tnl.h"
  52 #include "tnl/t_pipeline.h"
  53
  54 #include "drivers/common/driverfuncs.h"
  55
  56 #include "radeon_common.h"
  57 #include "radeon_context.h"
  58 #include "radeon_ioctl.h"
  59 #include "radeon_state.h"
  60 #include "radeon_span.h"
  61 #include "radeon_tex.h"
  62 #include "radeon_swtcl.h"
  63 #include "radeon_tcl.h"
  64 #include "radeon_maos.h"
  65 #include "radeon_queryobj.h"
  66
  67 #define need_GL_ARB_occlusion_query
  68 #define need_GL_EXT_blend_minmax
  69 #define need_GL_EXT_fog_coord
  70 #define need_GL_EXT_secondary_color
  71 #define need_GL_EXT_framebuffer_object
  72 #include "extension_helper.h"
  73
  74 #define DRIVER_DATE     "20061018"
  75
  76 #include "vblank.h"
  77 #include "utils.h"
  78 #include "xmlpool.h" /* for symbolic values of enum-type options */
  79
  80 /* Extension strings exported by the R100 driver.
  81  */
  82 const struct dri_extension card_extensions[] =
  83 {
  84     { "GL_ARB_multitexture",               NULL },
  85     { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
  86     { "GL_ARB_texture_border_clamp",       NULL },
  87     { "GL_ARB_texture_env_add",            NULL },
  88     { "GL_ARB_texture_env_combine",        NULL },
  89     { "GL_ARB_texture_env_crossbar",       NULL },
  90     { "GL_ARB_texture_env_dot3",           NULL },
  91     { "GL_ARB_texture_mirrored_repeat",    NULL },
  92     { "GL_EXT_blend_logic_op",             NULL },
  93     { "GL_EXT_blend_subtract",             GL_EXT_blend_minmax_functions },
  94     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
  95     { "GL_EXT_packed_depth_stencil",       NULL},
  96     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
  97     { "GL_EXT_stencil_wrap",               NULL },
  98     { "GL_EXT_texture_edge_clamp",         NULL },
  99     { "GL_EXT_texture_env_combine",        NULL },
 100     { "GL_EXT_texture_env_dot3",           NULL },
 101     { "GL_EXT_texture_filter_anisotropic", NULL },
 102     { "GL_EXT_texture_lod_bias",           NULL },
 103     { "GL_EXT_texture_mirror_clamp",       NULL },
 104     { "GL_ATI_texture_env_combine3",       NULL },
 105     { "GL_ATI_texture_mirror_once",        NULL },
 106     { "GL_MESA_ycbcr_texture",             NULL },
 107     { "GL_NV_blend_square",                NULL },
 108     { "GL_SGIS_generate_mipmap",           NULL },
 109     { NULL,                                NULL }
 110 };
 111
 112 const struct dri_extension mm_extensions[] = {
 113   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 114   { NULL, NULL }
 115 };
 116
 117 extern const struct tnl_pipeline_stage _radeon_render_stage;
 118 extern const struct tnl_pipeline_stage _radeon_tcl_stage;
 119
 120 static const struct tnl_pipeline_stage *radeon_pipeline[] = {
 121
 122    /* Try and go straight to t&l
 123     */
 124    &_radeon_tcl_stage,
 125
 126    /* Catch any t&l fallbacks
 127     */
 128    &_tnl_vertex_transform_stage,
 129    &_tnl_normal_transform_stage,
 130    &_tnl_lighting_stage,
 131    &_tnl_fog_coordinate_stage,
 132    &_tnl_texgen_stage,
 133    &_tnl_texture_transform_stage,
 134
 135    &_radeon_render_stage,
 136    &_tnl_render_stage,          /* FALLBACK:  */
 137    NULL,
 138 };
 139
 140 static void r100_get_lock(radeonContextPtr radeon)
 141 {
 142    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 143    drm_radeon_sarea_t *sarea = radeon->sarea;
 144
 145    RADEON_STATECHANGE(rmesa, ctx);
 146    if (rmesa->radeon.sarea->tiling_enabled) {
 147       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
 148          RADEON_COLOR_TILE_ENABLE;
 149    } else {
 150       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
 151          ~RADEON_COLOR_TILE_ENABLE;
 152    }
 153
 154    if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
 155       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 156
 157       if (!radeon->radeonScreen->kernel_mm)
 158          radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
 159    }
 160 }
 161
 162 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 163 {
 164 }
 165
 166 static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
 167 {
 168    r100ContextPtr rmesa = (r100ContextPtr)radeon;
 169
 170    /* r100 always needs to emit ZBS to avoid TCL lockups */
 171    rmesa->hw.zbs.dirty = 1;
 172    radeon->hw.is_dirty = 1;
 173 }
 174
 175 static void r100_vtbl_free_context(GLcontext *ctx)
 176 {
 177    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 178    _mesa_vector4f_free( &rmesa->tcl.ObjClean );
 179 }
 180
 181 static void r100_emit_query_finish(radeonContextPtr radeon)
 182 {
 183    BATCH_LOCALS(radeon);
 184    struct radeon_query_object *query = radeon->query.current;
 185
 186    BEGIN_BATCH_NO_AUTOSTATE(4);
 187    OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
 188    OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
 189    END_BATCH();
 190    query->curr_offset += sizeof(uint32_t);
 191    assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 192    query->emitted_begin = GL_FALSE;
 193 }
 194
 195 static void r100_init_vtbl(radeonContextPtr radeon)
 196 {
 197    radeon->vtbl.get_lock = r100_get_lock;
 198    radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
 199    radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
 200    radeon->vtbl.swtcl_flush = r100_swtcl_flush;
 201    radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
 202    radeon->vtbl.fallback = radeonFallback;
 203    radeon->vtbl.free_context = r100_vtbl_free_context;
 204    radeon->vtbl.emit_query_finish = r100_emit_query_finish;
 205 }
 206
 207 /* Create the device specific context.
 208  */
 209 GLboolean
 210 r100CreateContext( const __GLcontextModes *glVisual,
 211                      __DRIcontextPrivate *driContextPriv,
 212                      void *sharedContextPrivate)
 213 {
 214    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 215    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 216    struct dd_function_table functions;
 217    r100ContextPtr rmesa;
 218    GLcontext *ctx;
 219    int i;
 220    int tcl_mode, fthrottle_mode;
 221
 222    assert(glVisual);
 223    assert(driContextPriv);
 224    assert(screen);
 225
 226    /* Allocate the Radeon context */
 227    rmesa = (r100ContextPtr) CALLOC( sizeof(*rmesa) );
 228    if ( !rmesa )
 229       return GL_FALSE;
 230
 231    r100_init_vtbl(&rmesa->radeon);
 232
 233    /* init exp fog table data */
 234    radeonInitStaticFogData();
 235
 236    /* Parse configuration files.
 237     * Do this here so that initialMaxAnisotropy is set before we create
 238     * the default textures.
 239     */
 240    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 241                         screen->driScreen->myNum, "radeon");
 242    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 243                                                  "def_max_anisotropy");
 244
 245    if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 246       if ( sPriv->drm_version.minor < 13 )
 247          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 248                           "disabling.\n", sPriv->drm_version.minor );
 249       else
 250          rmesa->using_hyperz = GL_TRUE;
 251    }
 252
 253    if ( sPriv->drm_version.minor >= 15 )
 254       rmesa->texmicrotile = GL_TRUE;
 255
 256    /* Init default driver functions then plug in our Radeon-specific functions
 257     * (the texture functions are especially important)
 258     */
 259    _mesa_init_driver_functions( &functions );
 260    radeonInitTextureFuncs( &functions );
 261    radeonInitQueryObjFunctions(&functions);
 262
 263    if (!radeonInitContext(&rmesa->radeon, &functions,
 264                           glVisual, driContextPriv,
 265                           sharedContextPrivate)) {
 266      FREE(rmesa);
 267      return GL_FALSE;
 268    }
 269
 270    rmesa->radeon.swtcl.RenderIndex = ~0;
 271    rmesa->radeon.hw.all_dirty = GL_TRUE;
 272
 273    /* Set the maximum texture size small enough that we can guarentee that
 274     * all texture units can bind a maximal texture and have all of them in
 275     * texturable memory at once. Depending on the allow_large_textures driconf
 276     * setting allow larger textures.
 277     */
 278
 279    ctx = rmesa->radeon.glCtx;
 280    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 281                                                  "texture_units");
 282    ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 283    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 284
 285    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
 286
 287    /* FIXME: When no memory manager is available we should set this
 288     * to some reasonable value based on texture memory pool size */
 289    ctx->Const.MaxTextureLevels = 12;
 290    ctx->Const.Max3DTextureLevels = 9;
 291    ctx->Const.MaxCubeTextureLevels = 12;
 292    ctx->Const.MaxTextureRectSize = 2048;
 293
 294    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 295
 296    /* No wide points.
 297     */
 298    ctx->Const.MinPointSize = 1.0;
 299    ctx->Const.MinPointSizeAA = 1.0;
 300    ctx->Const.MaxPointSize = 1.0;
 301    ctx->Const.MaxPointSizeAA = 1.0;
 302
 303    ctx->Const.MinLineWidth = 1.0;
 304    ctx->Const.MinLineWidthAA = 1.0;
 305    ctx->Const.MaxLineWidth = 10.0;
 306    ctx->Const.MaxLineWidthAA = 10.0;
 307    ctx->Const.LineWidthGranularity = 0.0625;
 308
 309    /* Set maxlocksize (and hence vb size) small enough to avoid
 310     * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
 311     * fit in a single dma buffer for indexed rendering of quad strips,
 312     * etc.
 313     */
 314    ctx->Const.MaxArrayLockSize =
 315       MIN2( ctx->Const.MaxArrayLockSize,
 316             RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
 317
 318    rmesa->boxes = 0;
 319
 320    ctx->Const.MaxDrawBuffers = 1;
 321
 322    _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 323
 324    /* Initialize the software rasterizer and helper modules.
 325     */
 326    _swrast_CreateContext( ctx );
 327    _vbo_CreateContext( ctx );
 328    _tnl_CreateContext( ctx );
 329    _swsetup_CreateContext( ctx );
 330    _ae_create_context( ctx );
 331
 332    /* Install the customized pipeline:
 333     */
 334    _tnl_destroy_pipeline( ctx );
 335    _tnl_install_pipeline( ctx, radeon_pipeline );
 336
 337    /* Try and keep materials and vertices separate:
 338     */
 339 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 340
 341    /* Configure swrast and T&L to match hardware characteristics:
 342     */
 343    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 344    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 345    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 346    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 347
 348
 349    for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
 350       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 351       _math_matrix_ctr( &rmesa->tmpmat[i] );
 352       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 353       _math_matrix_set_identity( &rmesa->tmpmat[i] );
 354    }
 355
 356    driInitExtensions( ctx, card_extensions, GL_TRUE );
 357    if (rmesa->radeon.radeonScreen->kernel_mm)
 358      driInitExtensions(ctx, mm_extensions, GL_FALSE);
 359    if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR100)
 360       _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
 361    if (rmesa->radeon.glCtx->Mesa_DXTn) {
 362       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 363       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 364    }
 365    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 366       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 367    }
 368
 369    if (rmesa->radeon.radeonScreen->kernel_mm || rmesa->radeon.dri.drmMinor >= 9)
 370       _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
 371
 372    if (!rmesa->radeon.radeonScreen->kernel_mm)
 373       _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 374
 375    /* XXX these should really go right after _mesa_init_driver_functions() */
 376    radeon_fbo_init(&rmesa->radeon);
 377    radeonInitSpanFuncs( ctx );
 378    radeonInitIoctlFuncs( ctx );
 379    radeonInitStateFuncs( ctx , rmesa->radeon.radeonScreen->kernel_mm );
 380    radeonInitState( rmesa );
 381    radeonInitSwtcl( ctx );
 382
 383    _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
 384                          ctx->Const.MaxArrayLockSize, 32 );
 385
 386    fthrottle_mode = driQueryOptioni(&rmesa->radeon.optionCache, "fthrottle_mode");
 387    rmesa->radeon.iw.irq_seq = -1;
 388    rmesa->radeon.irqsEmitted = 0;
 389    rmesa->radeon.do_irqs = (rmesa->radeon.radeonScreen->irq != 0 &&
 390                             fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
 391
 392    rmesa->radeon.do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
 393
 394
 395 #if DO_DEBUG
 396    RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
 397                                        debug_control );
 398 #endif
 399
 400    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 401    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 402       fprintf(stderr, "disabling 3D acceleration\n");
 403       FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
 404    } else if (tcl_mode == DRI_CONF_TCL_SW ||
 405               !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 406       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 407          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 408          fprintf(stderr, "Disabling HW TCL support\n");
 409       }
 410       TCL_FALLBACK(rmesa->radeon.glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 411    }
 412
 413    if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 414 /*       _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
 415    }
 416    return GL_TRUE;
 417 }