1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 * Keith Whitwell <keith@tungstengraphics.com>
39 #include "api_arrayelt.h"
41 #include "simple_list.h"
44 #include "extensions.h"
46 #include "swrast/swrast.h"
47 #include "swrast_setup/swrast_setup.h"
48 #include "array_cache/acache.h"
51 #include "tnl/t_pipeline.h"
53 #include "radeon_context.h"
54 #include "radeon_ioctl.h"
55 #include "radeon_state.h"
56 #include "radeon_span.h"
57 #include "radeon_tex.h"
58 #include "radeon_swtcl.h"
59 #include "radeon_tcl.h"
60 #include "radeon_vtxfmt.h"
61 #include "radeon_maos.h"
63 #define DRIVER_DATE "20030328"
67 #include "xmlpool.h" /* for symbolic values of enum-type options */
69 int RADEON_DEBUG
= (0);
73 /* Return the width and height of the given buffer.
75 static void radeonGetBufferSize( GLframebuffer
*buffer
,
76 GLuint
*width
, GLuint
*height
)
78 GET_CURRENT_CONTEXT(ctx
);
79 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
81 LOCK_HARDWARE( rmesa
);
82 *width
= rmesa
->dri
.drawable
->w
;
83 *height
= rmesa
->dri
.drawable
->h
;
84 UNLOCK_HARDWARE( rmesa
);
87 /* Return various strings for glGetString().
89 static const GLubyte
*radeonGetString( GLcontext
*ctx
, GLenum name
)
91 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
92 static char buffer
[128];
94 GLuint agp_mode
= rmesa
->radeonScreen
->IsPCI
? 0 :
95 rmesa
->radeonScreen
->AGPMode
;
99 return (GLubyte
*)"Tungsten Graphics, Inc.";
102 offset
= driGetRendererString( buffer
, "Radeon", DRIVER_DATE
,
105 sprintf( & buffer
[ offset
], "%sTCL",
106 !(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
109 return (GLubyte
*)buffer
;
117 /* Extension strings exported by the R100 driver.
119 static const char * const card_extensions
[] =
121 "GL_ARB_multisample",
122 "GL_ARB_multitexture",
123 "GL_ARB_texture_border_clamp",
124 "GL_ARB_texture_compression",
125 "GL_ARB_texture_env_add",
126 "GL_ARB_texture_env_combine",
127 "GL_ARB_texture_env_dot3",
128 "GL_ARB_texture_mirrored_repeat",
129 "GL_EXT_blend_logic_op",
130 "GL_EXT_blend_subtract",
131 "GL_EXT_secondary_color",
132 "GL_EXT_texture_edge_clamp",
133 "GL_EXT_texture_env_combine",
134 "GL_EXT_texture_env_dot3",
135 "GL_EXT_texture_filter_anisotropic",
136 "GL_EXT_texture_lod_bias",
137 "GL_EXT_texture_mirror_clamp",
138 "GL_ATI_texture_env_combine3",
139 "GL_ATI_texture_mirror_once",
140 "GL_MESA_ycbcr_texture",
141 "GL_NV_blend_square",
142 "GL_SGIS_generate_mipmap",
146 extern const struct tnl_pipeline_stage _radeon_texrect_stage
;
147 extern const struct tnl_pipeline_stage _radeon_render_stage
;
148 extern const struct tnl_pipeline_stage _radeon_tcl_stage
;
150 static const struct tnl_pipeline_stage
*radeon_pipeline
[] = {
152 /* Try and go straight to t&l
156 /* Catch any t&l fallbacks
158 &_tnl_vertex_transform_stage
,
159 &_tnl_normal_transform_stage
,
160 &_tnl_lighting_stage
,
161 &_tnl_fog_coordinate_stage
,
163 &_tnl_texture_transform_stage
,
165 /* Scale texture rectangle to 0..1.
167 &_radeon_texrect_stage
,
169 &_radeon_render_stage
,
170 &_tnl_render_stage
, /* FALLBACK: */
176 /* Initialize the driver's misc functions.
178 static void radeonInitDriverFuncs( GLcontext
*ctx
)
180 ctx
->Driver
.GetBufferSize
= radeonGetBufferSize
;
181 ctx
->Driver
.ResizeBuffers
= _swrast_alloc_buffers
;
182 ctx
->Driver
.GetString
= radeonGetString
;
184 ctx
->Driver
.Error
= NULL
;
185 ctx
->Driver
.DrawPixels
= NULL
;
186 ctx
->Driver
.Bitmap
= NULL
;
189 static const struct dri_debug_control debug_control
[] =
191 { "fall", DEBUG_FALLBACKS
},
192 { "tex", DEBUG_TEXTURE
},
193 { "ioctl", DEBUG_IOCTL
},
194 { "prim", DEBUG_PRIMS
},
195 { "vert", DEBUG_VERTS
},
196 { "state", DEBUG_STATE
},
197 { "code", DEBUG_CODEGEN
},
198 { "vfmt", DEBUG_VFMT
},
199 { "vtxf", DEBUG_VFMT
},
200 { "verb", DEBUG_VERBOSE
},
201 { "dri", DEBUG_DRI
},
202 { "dma", DEBUG_DMA
},
203 { "san", DEBUG_SANITY
},
209 get_ust_nop( int64_t * ust
)
216 /* Create the device specific context.
219 radeonCreateContext( const __GLcontextModes
*glVisual
,
220 __DRIcontextPrivate
*driContextPriv
,
221 void *sharedContextPrivate
)
223 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
224 radeonScreenPtr screen
= (radeonScreenPtr
)(sPriv
->private);
225 radeonContextPtr rmesa
;
226 GLcontext
*ctx
, *shareCtx
;
228 int tcl_mode
, fthrottle_mode
;
231 assert(driContextPriv
);
234 /* Allocate the Radeon context */
235 rmesa
= (radeonContextPtr
) CALLOC( sizeof(*rmesa
) );
239 /* Allocate the Mesa context */
240 if (sharedContextPrivate
)
241 shareCtx
= ((radeonContextPtr
) sharedContextPrivate
)->glCtx
;
244 rmesa
->glCtx
= _mesa_create_context(glVisual
, shareCtx
, (void *) rmesa
, GL_TRUE
);
249 driContextPriv
->driverPrivate
= rmesa
;
251 /* Init radeon context data */
252 rmesa
->dri
.context
= driContextPriv
;
253 rmesa
->dri
.screen
= sPriv
;
254 rmesa
->dri
.drawable
= NULL
; /* Set by XMesaMakeCurrent */
255 rmesa
->dri
.hwContext
= driContextPriv
->hHWContext
;
256 rmesa
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
257 rmesa
->dri
.fd
= sPriv
->fd
;
258 rmesa
->dri
.drmMinor
= sPriv
->drmMinor
;
260 /* Parse configuration files */
261 driParseConfigFiles (&rmesa
->optionCache
, &screen
->optionCache
,
262 screen
->driScreen
->myNum
, "radeon");
264 rmesa
->radeonScreen
= screen
;
265 rmesa
->sarea
= (RADEONSAREAPrivPtr
)((GLubyte
*)sPriv
->pSAREA
+
266 screen
->sarea_priv_offset
);
269 rmesa
->dma
.buf0_address
= rmesa
->radeonScreen
->buffers
->list
[0].address
;
271 (void) memset( rmesa
->texture_heaps
, 0, sizeof( rmesa
->texture_heaps
) );
272 make_empty_list( & rmesa
->swapped
);
274 rmesa
->nr_heaps
= screen
->numTexHeaps
;
275 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
276 rmesa
->texture_heaps
[i
] = driCreateTextureHeap( i
, rmesa
,
279 RADEON_NR_TEX_REGIONS
,
280 rmesa
->sarea
->texList
[i
],
281 & rmesa
->sarea
->texAge
[i
],
283 sizeof( radeonTexObj
),
284 (destroy_texture_object_t
*) radeonDestroyTexObj
);
286 driSetTextureSwapCounterLocation( rmesa
->texture_heaps
[i
],
287 & rmesa
->c_textureSwaps
);
289 rmesa
->texture_depth
= driQueryOptioni (&rmesa
->optionCache
,
291 if (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
292 rmesa
->texture_depth
= ( screen
->cpp
== 4 ) ?
293 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
295 rmesa
->swtcl
.RenderIndex
= ~0;
296 rmesa
->lost_context
= 1;
298 /* Set the maximum texture size small enough that we can guarentee that
299 * all texture units can bind a maximal texture and have them both in
300 * texturable memory at once.
304 ctx
->Const
.MaxTextureUnits
= 2;
305 ctx
->Const
.MaxTextureImageUnits
= 2;
306 ctx
->Const
.MaxTextureCoordUnits
= 2;
308 driCalculateMaxTextureLevels( rmesa
->texture_heaps
,
312 11, /* max 2D texture size is 2048x2048 */
313 0, /* 3D textures unsupported. */
314 0, /* cube textures unsupported. */
315 11, /* max rect texture size is 2048x2048. */
319 ctx
->Const
.MaxTextureMaxAnisotropy
= 16.0;
323 ctx
->Const
.MinPointSize
= 1.0;
324 ctx
->Const
.MinPointSizeAA
= 1.0;
325 ctx
->Const
.MaxPointSize
= 1.0;
326 ctx
->Const
.MaxPointSizeAA
= 1.0;
328 ctx
->Const
.MinLineWidth
= 1.0;
329 ctx
->Const
.MinLineWidthAA
= 1.0;
330 ctx
->Const
.MaxLineWidth
= 10.0;
331 ctx
->Const
.MaxLineWidthAA
= 10.0;
332 ctx
->Const
.LineWidthGranularity
= 0.0625;
334 /* Set maxlocksize (and hence vb size) small enough to avoid
335 * fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
336 * fit in a single dma buffer for indexed rendering of quad strips,
339 ctx
->Const
.MaxArrayLockSize
=
340 MIN2( ctx
->Const
.MaxArrayLockSize
,
341 RADEON_BUFFER_SIZE
/ RADEON_MAX_TCL_VERTSIZE
);
345 /* Initialize the software rasterizer and helper modules.
347 _swrast_CreateContext( ctx
);
348 _ac_CreateContext( ctx
);
349 _tnl_CreateContext( ctx
);
350 _swsetup_CreateContext( ctx
);
351 _ae_create_context( ctx
);
353 /* Install the customized pipeline:
355 _tnl_destroy_pipeline( ctx
);
356 _tnl_install_pipeline( ctx
, radeon_pipeline
);
357 ctx
->Driver
.FlushVertices
= radeonFlushVertices
;
359 /* Try and keep materials and vertices separate:
361 _tnl_isolate_materials( ctx
, GL_TRUE
);
364 /* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
366 /* Try and keep materials and vertices separate:
368 _tnl_isolate_materials( ctx
, GL_TRUE
);
371 /* Configure swrast to match hardware characteristics:
373 _swrast_allow_pixel_fog( ctx
, GL_FALSE
);
374 _swrast_allow_vertex_fog( ctx
, GL_TRUE
);
377 _math_matrix_ctr( &rmesa
->TexGenMatrix
[0] );
378 _math_matrix_ctr( &rmesa
->TexGenMatrix
[1] );
379 _math_matrix_ctr( &rmesa
->tmpmat
);
380 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[0] );
381 _math_matrix_set_identity( &rmesa
->TexGenMatrix
[1] );
382 _math_matrix_set_identity( &rmesa
->tmpmat
);
384 driInitExtensions( ctx
, card_extensions
, GL_TRUE
);
386 if (rmesa
->dri
.drmMinor
>= 9)
387 _mesa_enable_extension( ctx
, "GL_NV_texture_rectangle");
389 radeonInitDriverFuncs( ctx
);
390 radeonInitIoctlFuncs( ctx
);
391 radeonInitStateFuncs( ctx
);
392 radeonInitSpanFuncs( ctx
);
393 radeonInitTextureFuncs( ctx
);
394 radeonInitState( rmesa
);
395 radeonInitSwtcl( ctx
);
397 _mesa_vector4f_alloc( &rmesa
->tcl
.ObjClean
, 0,
398 ctx
->Const
.MaxArrayLockSize
, 32 );
400 fthrottle_mode
= driQueryOptioni(&rmesa
->optionCache
, "fthrottle_mode");
401 rmesa
->iw
.irq_seq
= -1;
402 rmesa
->irqsEmitted
= 0;
403 rmesa
->do_irqs
= (rmesa
->radeonScreen
->irq
!= 0 &&
404 fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
);
406 rmesa
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
408 rmesa
->vblank_flags
= (rmesa
->radeonScreen
->irq
!= 0)
409 ? driGetDefaultVBlankFlags(&rmesa
->optionCache
) : VBLANK_FLAG_NO_IRQ
;
411 rmesa
->get_ust
= (PFNGLXGETUSTPROC
) glXGetProcAddress( (const GLubyte
*) "__glXGetUST" );
412 if ( rmesa
->get_ust
== NULL
) {
413 rmesa
->get_ust
= get_ust_nop
;
416 rmesa
->get_ust
= get_ust_nop
;
419 (*rmesa
->get_ust
)( & rmesa
->swap_ust
);
423 RADEON_DEBUG
= driParseDebugString( getenv( "RADEON_DEBUG" ),
427 tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
428 if (driQueryOptionb(&rmesa
->optionCache
, "no_rast")) {
429 fprintf(stderr
, "disabling 3D acceleration\n");
430 FALLBACK(rmesa
, RADEON_FALLBACK_DISABLE
, 1);
431 } else if (tcl_mode
== DRI_CONF_TCL_SW
||
432 !(rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
)) {
433 rmesa
->radeonScreen
->chipset
&= ~RADEON_CHIPSET_TCL
;
434 fprintf(stderr
, "disabling TCL support\n");
435 TCL_FALLBACK(rmesa
->glCtx
, RADEON_TCL_FALLBACK_TCL_DISABLE
, 1);
438 if (rmesa
->radeonScreen
->chipset
& RADEON_CHIPSET_TCL
) {
439 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
440 radeonVtxfmtInit( ctx
, tcl_mode
>= DRI_CONF_TCL_CODEGEN
);
442 _tnl_need_dlist_norm_lengths( ctx
, GL_FALSE
);
448 /* Destroy the device specific context.
450 /* Destroy the Mesa and driver specific context data.
452 void radeonDestroyContext( __DRIcontextPrivate
*driContextPriv
)
454 GET_CURRENT_CONTEXT(ctx
);
455 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
456 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
458 /* check if we're deleting the currently bound context */
459 if (rmesa
== current
) {
460 RADEON_FIREVERTICES( rmesa
);
461 _mesa_make_current2(NULL
, NULL
, NULL
);
464 /* Free radeon context resources */
465 assert(rmesa
); /* should never be null */
467 GLboolean release_texture_heaps
;
470 release_texture_heaps
= (rmesa
->glCtx
->Shared
->RefCount
== 1);
471 _swsetup_DestroyContext( rmesa
->glCtx
);
472 _tnl_DestroyContext( rmesa
->glCtx
);
473 _ac_DestroyContext( rmesa
->glCtx
);
474 _swrast_DestroyContext( rmesa
->glCtx
);
476 radeonDestroySwtcl( rmesa
->glCtx
);
477 radeonReleaseArrays( rmesa
->glCtx
, ~0 );
478 if (rmesa
->dma
.current
.buf
) {
479 radeonReleaseDmaRegion( rmesa
, &rmesa
->dma
.current
, __FUNCTION__
);
480 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
483 if (!(rmesa
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)) {
484 int tcl_mode
= driQueryOptioni(&rmesa
->optionCache
, "tcl_mode");
485 if (tcl_mode
>= DRI_CONF_TCL_VTXFMT
)
486 radeonVtxfmtDestroy( rmesa
->glCtx
);
489 /* free the Mesa context */
490 rmesa
->glCtx
->DriverCtx
= NULL
;
491 _mesa_destroy_context( rmesa
->glCtx
);
493 _mesa_vector4f_free( &rmesa
->tcl
.ObjClean
);
495 if (rmesa
->state
.scissor
.pClipRects
) {
496 FREE(rmesa
->state
.scissor
.pClipRects
);
497 rmesa
->state
.scissor
.pClipRects
= 0;
500 if ( release_texture_heaps
) {
501 /* This share group is about to go away, free our private
502 * texture object data.
506 for ( i
= 0 ; i
< rmesa
->nr_heaps
; i
++ ) {
507 driDestroyTextureHeap( rmesa
->texture_heaps
[ i
] );
508 rmesa
->texture_heaps
[ i
] = NULL
;
511 assert( is_empty_list( & rmesa
->swapped
) );
514 /* free the option cache */
515 driDestroyOptionCache (&rmesa
->optionCache
);
525 radeonSwapBuffers( __DRIdrawablePrivate
*dPriv
)
528 if (dPriv
->driContextPriv
&& dPriv
->driContextPriv
->driverPrivate
) {
529 radeonContextPtr rmesa
;
531 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
533 if (ctx
->Visual
.doubleBufferMode
) {
534 _mesa_notifySwapBuffers( ctx
); /* flush pending rendering comands */
536 if ( rmesa
->doPageFlip
) {
537 radeonPageFlip( dPriv
);
540 radeonCopyBuffer( dPriv
);
545 /* XXX this shouldn't be an error but we can't handle it for now */
546 _mesa_problem(NULL
, "%s: drawable has no context!", __FUNCTION__
);
551 /* Force the context `c' to be the current context and associate with it
555 radeonMakeCurrent( __DRIcontextPrivate
*driContextPriv
,
556 __DRIdrawablePrivate
*driDrawPriv
,
557 __DRIdrawablePrivate
*driReadPriv
)
559 if ( driContextPriv
) {
560 radeonContextPtr newCtx
=
561 (radeonContextPtr
) driContextPriv
->driverPrivate
;
563 if (RADEON_DEBUG
& DEBUG_DRI
)
564 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, newCtx
->glCtx
);
566 if ( newCtx
->dri
.drawable
!= driDrawPriv
) {
567 driDrawableInitVBlank( driDrawPriv
, newCtx
->vblank_flags
);
568 newCtx
->dri
.drawable
= driDrawPriv
;
569 radeonUpdateWindow( newCtx
->glCtx
);
570 radeonUpdateViewportOffset( newCtx
->glCtx
);
573 _mesa_make_current2( newCtx
->glCtx
,
574 (GLframebuffer
*) driDrawPriv
->driverPrivate
,
575 (GLframebuffer
*) driReadPriv
->driverPrivate
);
577 if ( !newCtx
->glCtx
->Viewport
.Width
) {
578 _mesa_set_viewport( newCtx
->glCtx
, 0, 0,
579 driDrawPriv
->w
, driDrawPriv
->h
);
582 if (newCtx
->vb
.enabled
)
583 radeonVtxfmtMakeCurrent( newCtx
->glCtx
);
586 if (RADEON_DEBUG
& DEBUG_DRI
)
587 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
588 _mesa_make_current( 0, 0 );
591 if (RADEON_DEBUG
& DEBUG_DRI
)
592 fprintf(stderr
, "End %s\n", __FUNCTION__
);
596 /* Force the context `c' to be unbound from its buffer.
599 radeonUnbindContext( __DRIcontextPrivate
*driContextPriv
)
601 radeonContextPtr rmesa
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
603 if (RADEON_DEBUG
& DEBUG_DRI
)
604 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
, rmesa
->glCtx
);