1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
37 * Gareth Hughes <gareth@valinux.com>
38 * Keith Whitwell <keith@tungstengraphics.com>
39 * Kevin E. Martin <martin@valinux.com>
40 * Nicolai Haehnle <prefect_@gmx.net>
43 #ifndef __RADEON_CONTEXT_H__
44 #define __RADEON_CONTEXT_H__
46 #include "tnl/t_vertex.h"
49 #include "radeon_drm.h"
51 #include "main/macros.h"
52 #include "main/mtypes.h"
53 #include "main/colormac.h"
54 #include "radeon_screen.h"
56 #include "common_context.h"
57 #include "common_misc.h"
61 typedef struct r100_context r100ContextRec
;
62 typedef struct r100_context
*r100ContextPtr
;
64 #include "radeon_lock.h"
68 #define R100_TEX_ALL 0x7
70 /* used for both tcl_vtx and vc_frmt tex bits (they are identical) */
71 #define RADEON_ST_BIT(unit) \
72 (unit == 0 ? RADEON_CP_VC_FRMT_ST0 : (RADEON_CP_VC_FRMT_ST1 >> 2) << (2 * unit))
74 #define RADEON_Q_BIT(unit) \
75 (unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit))
77 struct radeon_texture_env_state
{
78 radeonTexObjPtr texobj
;
83 struct radeon_texture_state
{
84 struct radeon_texture_env_state unit
[RADEON_MAX_TEXTURE_UNITS
];
87 /* Trying to keep these relatively short as the variables are becoming
88 * extravagently long. Drop the driver name prefix off the front of
89 * everything - I think we know which driver we're in by now, and keep the
90 * prefix to 3 letters unless absolutely impossible.
95 #define CTX_PP_FOG_COLOR 2
96 #define CTX_RE_SOLID_COLOR 3
97 #define CTX_RB3D_BLENDCNTL 4
98 #define CTX_RB3D_DEPTHOFFSET 5
99 #define CTX_RB3D_DEPTHPITCH 6
100 #define CTX_RB3D_ZSTENCILCNTL 7
102 #define CTX_PP_CNTL 9
103 #define CTX_RB3D_CNTL 10
104 #define CTX_RB3D_COLOROFFSET 11
106 #define CTX_RB3D_COLORPITCH 13
107 #define CTX_STATE_SIZE 14
110 #define SET_SE_CNTL 1
111 #define SET_SE_COORDFMT 2
113 #define SET_SE_CNTL_STATUS 4
114 #define SET_STATE_SIZE 5
117 #define LIN_RE_LINE_PATTERN 1
118 #define LIN_RE_LINE_STATE 2
120 #define LIN_SE_LINE_WIDTH 4
121 #define LIN_STATE_SIZE 5
124 #define MSK_RB3D_STENCILREFMASK 1
125 #define MSK_RB3D_ROPCNTL 2
126 #define MSK_RB3D_PLANEMASK 3
127 #define MSK_STATE_SIZE 4
130 #define VPT_SE_VPORT_XSCALE 1
131 #define VPT_SE_VPORT_XOFFSET 2
132 #define VPT_SE_VPORT_YSCALE 3
133 #define VPT_SE_VPORT_YOFFSET 4
134 #define VPT_SE_VPORT_ZSCALE 5
135 #define VPT_SE_VPORT_ZOFFSET 6
136 #define VPT_STATE_SIZE 7
139 #define MSC_RE_MISC 1
140 #define MSC_STATE_SIZE 2
143 #define TEX_PP_TXFILTER 1
144 #define TEX_PP_TXFORMAT 2
145 #define TEX_PP_TXOFFSET 3
146 #define TEX_PP_TXCBLEND 4
147 #define TEX_PP_TXABLEND 5
148 #define TEX_PP_TFACTOR 6
150 #define TEX_PP_BORDER_COLOR 8
151 #define TEX_STATE_SIZE 9
153 #define TXR_CMD_0 0 /* rectangle textures */
154 #define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */
155 #define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */
156 #define TXR_STATE_SIZE 3
159 #define CUBE_PP_CUBIC_FACES 1
161 #define CUBE_PP_CUBIC_OFFSET_0 3
162 #define CUBE_PP_CUBIC_OFFSET_1 4
163 #define CUBE_PP_CUBIC_OFFSET_2 5
164 #define CUBE_PP_CUBIC_OFFSET_3 6
165 #define CUBE_PP_CUBIC_OFFSET_4 7
166 #define CUBE_STATE_SIZE 8
169 #define ZBS_SE_ZBIAS_FACTOR 1
170 #define ZBS_SE_ZBIAS_CONSTANT 2
171 #define ZBS_STATE_SIZE 3
174 #define TCL_OUTPUT_VTXFMT 1
175 #define TCL_OUTPUT_VTXSEL 2
176 #define TCL_MATRIX_SELECT_0 3
177 #define TCL_MATRIX_SELECT_1 4
178 #define TCL_UCP_VERT_BLEND_CTL 5
179 #define TCL_TEXTURE_PROC_CTL 6
180 #define TCL_LIGHT_MODEL_CTL 7
181 #define TCL_PER_LIGHT_CTL_0 8
182 #define TCL_PER_LIGHT_CTL_1 9
183 #define TCL_PER_LIGHT_CTL_2 10
184 #define TCL_PER_LIGHT_CTL_3 11
185 #define TCL_STATE_SIZE 12
188 #define MTL_EMMISSIVE_RED 1
189 #define MTL_EMMISSIVE_GREEN 2
190 #define MTL_EMMISSIVE_BLUE 3
191 #define MTL_EMMISSIVE_ALPHA 4
192 #define MTL_AMBIENT_RED 5
193 #define MTL_AMBIENT_GREEN 6
194 #define MTL_AMBIENT_BLUE 7
195 #define MTL_AMBIENT_ALPHA 8
196 #define MTL_DIFFUSE_RED 9
197 #define MTL_DIFFUSE_GREEN 10
198 #define MTL_DIFFUSE_BLUE 11
199 #define MTL_DIFFUSE_ALPHA 12
200 #define MTL_SPECULAR_RED 13
201 #define MTL_SPECULAR_GREEN 14
202 #define MTL_SPECULAR_BLUE 15
203 #define MTL_SPECULAR_ALPHA 16
204 #define MTL_SHININESS 17
205 #define MTL_STATE_SIZE 18
208 #define VTX_SE_COORD_FMT 1
209 #define VTX_STATE_SIZE 2
213 #define MAT_STATE_SIZE 17
216 #define GRD_VERT_GUARD_CLIP_ADJ 1
217 #define GRD_VERT_GUARD_DISCARD_ADJ 2
218 #define GRD_HORZ_GUARD_CLIP_ADJ 3
219 #define GRD_HORZ_GUARD_DISCARD_ADJ 4
220 #define GRD_STATE_SIZE 5
222 /* position changes frequently when lighting in modelpos - separate
223 * out to new state item?
226 #define LIT_AMBIENT_RED 1
227 #define LIT_AMBIENT_GREEN 2
228 #define LIT_AMBIENT_BLUE 3
229 #define LIT_AMBIENT_ALPHA 4
230 #define LIT_DIFFUSE_RED 5
231 #define LIT_DIFFUSE_GREEN 6
232 #define LIT_DIFFUSE_BLUE 7
233 #define LIT_DIFFUSE_ALPHA 8
234 #define LIT_SPECULAR_RED 9
235 #define LIT_SPECULAR_GREEN 10
236 #define LIT_SPECULAR_BLUE 11
237 #define LIT_SPECULAR_ALPHA 12
238 #define LIT_POSITION_X 13
239 #define LIT_POSITION_Y 14
240 #define LIT_POSITION_Z 15
241 #define LIT_POSITION_W 16
242 #define LIT_DIRECTION_X 17
243 #define LIT_DIRECTION_Y 18
244 #define LIT_DIRECTION_Z 19
245 #define LIT_DIRECTION_W 20
246 #define LIT_ATTEN_QUADRATIC 21
247 #define LIT_ATTEN_LINEAR 22
248 #define LIT_ATTEN_CONST 23
249 #define LIT_ATTEN_XXX 24
251 #define LIT_SPOT_DCD 26
252 #define LIT_SPOT_EXPONENT 27
253 #define LIT_SPOT_CUTOFF 28
254 #define LIT_SPECULAR_THRESH 29
255 #define LIT_RANGE_CUTOFF 30 /* ? */
256 #define LIT_ATTEN_CONST_INV 31
257 #define LIT_STATE_SIZE 32
266 #define FOG_STATE_SIZE 5
275 #define UCP_STATE_SIZE 5
277 /* GLT - Global ambient
284 #define GLT_STATE_SIZE 5
292 #define EYE_RESCALE_FACTOR 4
293 #define EYE_STATE_SIZE 5
296 #define SHN_SHININESS 1
297 #define SHN_STATE_SIZE 2
299 struct radeon_hw_state
{
300 /* Head of the linked list of state atoms. */
301 struct radeon_state_atom atomlist
;
303 /* Hardware state, stored as cmdbuf commands:
304 * -- Need to doublebuffer for
305 * - eliding noop statechange loops? (except line stipple count)
307 struct radeon_state_atom ctx
;
308 struct radeon_state_atom set
;
309 struct radeon_state_atom lin
;
310 struct radeon_state_atom msk
;
311 struct radeon_state_atom vpt
;
312 struct radeon_state_atom tcl
;
313 struct radeon_state_atom msc
;
314 struct radeon_state_atom tex
[3];
315 struct radeon_state_atom cube
[3];
316 struct radeon_state_atom zbs
;
317 struct radeon_state_atom mtl
;
318 struct radeon_state_atom mat
[6];
319 struct radeon_state_atom lit
[8]; /* includes vec, scl commands */
320 struct radeon_state_atom ucp
[6];
321 struct radeon_state_atom eye
; /* eye pos */
322 struct radeon_state_atom grd
; /* guard band clipping */
323 struct radeon_state_atom fog
;
324 struct radeon_state_atom glt
;
325 struct radeon_state_atom txr
[3]; /* for NPOT */
327 int max_state_size
; /* Number of bytes necessary for a full state emit. */
328 GLboolean is_dirty
, all_dirty
;
333 struct radeon_stipple_state stipple
;
334 struct radeon_texture_state texture
;
337 #define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset + \
338 (rvb)->address - rmesa->dma.buf0_address + \
342 #define RADEON_CMD_BUF_SZ (8*1024)
346 struct radeon_tcl_info
{
347 GLuint vertex_format
;
350 /* Temporary for cases where incoming vertex data is incompatible
355 struct radeon_dma_region
*aos_components
[8];
356 GLuint nr_aos_components
;
360 struct radeon_dma_region indexed_verts
;
361 struct radeon_dma_region obj
;
362 struct radeon_dma_region rgba
;
363 struct radeon_dma_region spec
;
364 struct radeon_dma_region fog
;
365 struct radeon_dma_region tex
[RADEON_MAX_TEXTURE_UNITS
];
366 struct radeon_dma_region norm
;
371 struct radeon_swtcl_info
{
374 GLuint vertex_format
;
376 struct tnl_attr_map vertex_attrs
[VERT_ATTRIB_MAX
];
377 GLuint vertex_attr_count
;
381 /* Fallback rasterization functions
383 radeon_point_func draw_point
;
384 radeon_line_func draw_line
;
385 radeon_tri_func draw_tri
;
388 GLenum render_primitive
;
392 * Offset of the 4UB color data within a hardware (swtcl) vertex.
397 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
403 struct radeon_dma_region indexed_verts
;
408 /* A maximum total of 20 elements per vertex: 3 floats for position, 3
409 * floats for normal, 4 floats for color, 4 bytes for secondary color,
410 * 3 floats for each texture unit (9 floats total).
412 * The position data is never actually stored here, so 3 elements could be
413 * trimmed out of the buffer. This number is only valid for vtxfmt!
415 #define RADEON_MAX_VERTEX_SIZE 20
417 struct r100_context
{
418 struct radeon_context radeon
;
420 /* Driver and hardware state management
422 struct radeon_hw_state hw
;
423 struct r100_state state
;
427 struct radeon_ioctl ioctl
;
428 struct radeon_dma dma
;
429 struct radeon_store store
;
430 /* A full state emit as of the first state emit in the main store, in case
431 * the context is lost.
433 struct radeon_store backup_store
;
437 GLmatrix TexGenMatrix
[RADEON_MAX_TEXTURE_UNITS
];
438 GLboolean recheck_texgen
[RADEON_MAX_TEXTURE_UNITS
];
439 GLboolean TexGenNeedNormals
[RADEON_MAX_TEXTURE_UNITS
];
440 GLuint TexGenEnabled
;
441 GLuint NeedTexMatrix
;
442 GLuint TexMatColSwap
;
443 GLmatrix tmpmat
[RADEON_MAX_TEXTURE_UNITS
];
444 GLuint last_ReallyEnabled
;
448 struct radeon_tcl_info tcl
;
452 struct radeon_swtcl_info swtcl
;
454 GLboolean using_hyperz
;
455 GLboolean texmicrotile
;
457 /* Performance counters
459 GLuint boxes
; /* Draw performance boxes */
460 GLuint hardwareWentIdle
;
463 GLuint c_textureSwaps
;
464 GLuint c_textureBytes
;
465 GLuint c_vertexBuffers
;
467 GLboolean save_on_next_emit
;
470 #define R100_CONTEXT(ctx) ((r100ContextPtr)(ctx->DriverCtx))
473 #define RADEON_OLD_PACKETS 1
475 extern void radeonDestroyContext(__DRIcontextPrivate
* driContextPriv
);
476 extern GLboolean
radeonCreateContext(const __GLcontextModes
* glVisual
,
477 __DRIcontextPrivate
* driContextPriv
,
478 void *sharedContextPrivate
);
479 extern GLboolean
radeonMakeCurrent(__DRIcontextPrivate
* driContextPriv
,
480 __DRIdrawablePrivate
* driDrawPriv
,
481 __DRIdrawablePrivate
* driReadPriv
);
482 extern GLboolean
radeonUnbindContext(__DRIcontextPrivate
* driContextPriv
);
486 #endif /* __RADEON_CONTEXT_H__ */