Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_cs_drm.h
1 /*
2 * Copyright © 2008 Nicolai Haehnle
3 * Copyright © 2008 Jérôme Glisse
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26 /*
27 * Authors:
28 * Aapo Tahkola <aet@rasterburn.org>
29 * Nicolai Haehnle <prefect_@gmx.net>
30 * Jérôme Glisse <glisse@freedesktop.org>
31 */
32 #ifndef RADEON_CS_H
33 #define RADEON_CS_H
34
35 #include <stdint.h>
36 #include <string.h>
37 #include "drm.h"
38 #include "radeon_drm.h"
39
40 struct radeon_cs_reloc {
41 struct radeon_bo *bo;
42 uint32_t read_domain;
43 uint32_t write_domain;
44 uint32_t flags;
45 };
46
47
48 #define RADEON_CS_SPACE_OK 0
49 #define RADEON_CS_SPACE_OP_TO_BIG 1
50 #define RADEON_CS_SPACE_FLUSH 2
51
52 struct radeon_cs_space_check {
53 struct radeon_bo *bo;
54 uint32_t read_domains;
55 uint32_t write_domain;
56 uint32_t new_accounted;
57 };
58
59 #define MAX_SPACE_BOS (32)
60
61 struct radeon_cs_manager;
62
63 struct radeon_cs {
64 struct radeon_cs_manager *csm;
65 void *relocs;
66 uint32_t *packets;
67 unsigned crelocs;
68 unsigned relocs_total_size;
69 unsigned cdw;
70 unsigned ndw;
71 int section;
72 unsigned section_ndw;
73 unsigned section_cdw;
74 const char *section_file;
75 const char *section_func;
76 int section_line;
77 struct radeon_cs_space_check bos[MAX_SPACE_BOS];
78 int bo_count;
79 void (*space_flush_fn)(void *);
80 void *space_flush_data;
81 };
82
83 /* cs functions */
84 struct radeon_cs_funcs {
85 struct radeon_cs *(*cs_create)(struct radeon_cs_manager *csm,
86 uint32_t ndw);
87 int (*cs_write_reloc)(struct radeon_cs *cs,
88 struct radeon_bo *bo,
89 uint32_t read_domain,
90 uint32_t write_domain,
91 uint32_t flags);
92 int (*cs_begin)(struct radeon_cs *cs,
93 uint32_t ndw,
94 const char *file,
95 const char *func,
96 int line);
97 int (*cs_end)(struct radeon_cs *cs,
98 const char *file,
99 const char *func,
100 int line);
101 int (*cs_emit)(struct radeon_cs *cs);
102 int (*cs_destroy)(struct radeon_cs *cs);
103 int (*cs_erase)(struct radeon_cs *cs);
104 int (*cs_need_flush)(struct radeon_cs *cs);
105 void (*cs_print)(struct radeon_cs *cs, FILE *file);
106 };
107
108 struct radeon_cs_manager {
109 struct radeon_cs_funcs *funcs;
110 int fd;
111 int32_t vram_limit, gart_limit;
112 int32_t vram_write_used, gart_write_used;
113 int32_t read_used;
114 };
115
116 static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
117 uint32_t ndw)
118 {
119 return csm->funcs->cs_create(csm, ndw);
120 }
121
122 static inline int radeon_cs_write_reloc(struct radeon_cs *cs,
123 struct radeon_bo *bo,
124 uint32_t read_domain,
125 uint32_t write_domain,
126 uint32_t flags)
127 {
128 return cs->csm->funcs->cs_write_reloc(cs,
129 bo,
130 read_domain,
131 write_domain,
132 flags);
133 }
134
135 static inline int radeon_cs_begin(struct radeon_cs *cs,
136 uint32_t ndw,
137 const char *file,
138 const char *func,
139 int line)
140 {
141 return cs->csm->funcs->cs_begin(cs, ndw, file, func, line);
142 }
143
144 static inline int radeon_cs_end(struct radeon_cs *cs,
145 const char *file,
146 const char *func,
147 int line)
148 {
149 return cs->csm->funcs->cs_end(cs, file, func, line);
150 }
151
152 static inline int radeon_cs_emit(struct radeon_cs *cs)
153 {
154 return cs->csm->funcs->cs_emit(cs);
155 }
156
157 static inline int radeon_cs_destroy(struct radeon_cs *cs)
158 {
159 return cs->csm->funcs->cs_destroy(cs);
160 }
161
162 static inline int radeon_cs_erase(struct radeon_cs *cs)
163 {
164 return cs->csm->funcs->cs_erase(cs);
165 }
166
167 static inline int radeon_cs_need_flush(struct radeon_cs *cs)
168 {
169 return cs->csm->funcs->cs_need_flush(cs);
170 }
171
172 static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file)
173 {
174 cs->csm->funcs->cs_print(cs, file);
175 }
176
177 static inline void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit)
178 {
179
180 if (domain == RADEON_GEM_DOMAIN_VRAM)
181 cs->csm->vram_limit = limit;
182 else
183 cs->csm->gart_limit = limit;
184 }
185
186 static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
187 {
188 cs->packets[cs->cdw++] = dword;
189 if (cs->section) {
190 cs->section_cdw++;
191 }
192 }
193
194 static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
195 {
196
197 memcpy(cs->packets + cs->cdw, &qword, sizeof(qword));
198 cs->cdw+=2;
199 if (cs->section) {
200 cs->section_cdw+=2;
201 }
202 }
203
204 static inline void radeon_cs_write_table(struct radeon_cs *cs, void *data, uint32_t size)
205 {
206 memcpy(cs->packets + cs->cdw, data, size * 4);
207 cs->cdw += size;
208 if (cs->section) {
209 cs->section_cdw += size;
210 }
211 }
212
213 static inline void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data)
214 {
215 cs->space_flush_fn = fn;
216 cs->space_flush_data = data;
217 }
218
219
220 /*
221 * add a persistent BO to the list
222 * a persistent BO is one that will be referenced across flushes,
223 * i.e. colorbuffer, textures etc.
224 * They get reset when a new "operation" happens, where an operation
225 * is a state emission with a color/textures etc followed by a bunch of vertices.
226 */
227 void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
228 struct radeon_bo *bo,
229 uint32_t read_domains,
230 uint32_t write_domain);
231
232 /* reset the persistent BO list */
233 void radeon_cs_space_reset_bos(struct radeon_cs *cs);
234
235 /* do a space check with the current persistent BO list */
236 int radeon_cs_space_check(struct radeon_cs *cs);
237
238 /* do a space check with the current persistent BO list and a temporary BO
239 * a temporary BO is like a DMA buffer, which gets flushed with the
240 * command buffer */
241 int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
242 struct radeon_bo *bo,
243 uint32_t read_domains,
244 uint32_t write_domain);
245
246 #endif