1 /**************************************************************************
3 Copyright (C) 2004 Nicolai Haehnle.
4 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
12 Permission is hereby granted, free of charge, to any person obtaining a
13 copy of this software and associated documentation files (the "Software"),
14 to deal in the Software without restriction, including without limitation
15 on the rights to use, copy, modify, merge, publish, distribute, sub
16 license, and/or sell copies of the Software, and to permit persons to whom
17 the Software is furnished to do so, subject to the following conditions:
19 The above copyright notice and this permission notice (including the next
20 paragraph) shall be included in all copies or substantial portions of the
23 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
26 ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
27 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
28 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
29 USE OR OTHER DEALINGS IN THE SOFTWARE.
31 **************************************************************************/
34 #include "radeon_common.h"
35 #include "main/simple_list.h"
37 #if defined(USE_X86_ASM)
38 #define COPY_DWORDS( dst, src, nr ) \
41 __asm__ __volatile__( "rep ; movsl" \
42 : "=%c" (__tmp), "=D" (dst), "=S" (__tmp) \
48 #define COPY_DWORDS( dst, src, nr ) \
51 for ( j = 0 ; j < nr ; j++ ) \
52 dst[j] = ((int *)src)[j]; \
57 void radeonEmitVec4(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
61 if (RADEON_DEBUG
& RADEON_VERTS
)
62 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
63 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
66 COPY_DWORDS(out
, data
, count
);
68 for (i
= 0; i
< count
; i
++) {
69 out
[0] = *(int *)data
;
75 void radeonEmitVec8(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
79 if (RADEON_DEBUG
& RADEON_VERTS
)
80 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
81 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
84 COPY_DWORDS(out
, data
, count
* 2);
86 for (i
= 0; i
< count
; i
++) {
87 out
[0] = *(int *)data
;
88 out
[1] = *(int *)(data
+ 4);
94 void radeonEmitVec12(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
98 if (RADEON_DEBUG
& RADEON_VERTS
)
99 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
100 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
103 COPY_DWORDS(out
, data
, count
* 3);
106 for (i
= 0; i
< count
; i
++) {
107 out
[0] = *(int *)data
;
108 out
[1] = *(int *)(data
+ 4);
109 out
[2] = *(int *)(data
+ 8);
115 void radeonEmitVec16(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
119 if (RADEON_DEBUG
& RADEON_VERTS
)
120 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
121 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
124 COPY_DWORDS(out
, data
, count
* 4);
126 for (i
= 0; i
< count
; i
++) {
127 out
[0] = *(int *)data
;
128 out
[1] = *(int *)(data
+ 4);
129 out
[2] = *(int *)(data
+ 8);
130 out
[3] = *(int *)(data
+ 12);
136 void rcommon_emit_vector(GLcontext
* ctx
, struct radeon_aos
*aos
,
137 const GLvoid
* data
, int size
, int stride
, int count
)
139 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
143 radeonAllocDmaRegion(rmesa
, &aos
->bo
, &aos
->offset
, size
* 4, 32);
147 radeonAllocDmaRegion(rmesa
, &aos
->bo
, &aos
->offset
, size
* count
* 4, 32);
151 aos
->components
= size
;
154 radeon_bo_map(aos
->bo
, 1);
155 out
= (uint32_t*)((char*)aos
->bo
->ptr
+ aos
->offset
);
157 case 1: radeonEmitVec4(out
, data
, stride
, count
); break;
158 case 2: radeonEmitVec8(out
, data
, stride
, count
); break;
159 case 3: radeonEmitVec12(out
, data
, stride
, count
); break;
160 case 4: radeonEmitVec16(out
, data
, stride
, count
); break;
165 radeon_bo_unmap(aos
->bo
);
168 void radeon_init_dma(radeonContextPtr rmesa
)
170 make_empty_list(&rmesa
->dma
.free
);
171 make_empty_list(&rmesa
->dma
.wait
);
172 make_empty_list(&rmesa
->dma
.reserved
);
173 rmesa
->dma
.minimum_size
= MAX_DMA_BUF_SZ
;
176 void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa
, int size
)
178 struct radeon_dma_bo
*dma_bo
= NULL
;
179 /* we set minimum sizes to at least requested size
180 aligned to next 16 bytes. */
181 if (size
> rmesa
->dma
.minimum_size
)
182 rmesa
->dma
.minimum_size
= (size
+ 15) & (~15);
184 radeon_print(RADEON_DMA
, RADEON_NORMAL
, "%s size %d minimum_size %d\n",
185 __FUNCTION__
, size
, rmesa
->dma
.minimum_size
);
187 if (!is_empty_list(&rmesa
->dma
.reserved
))
188 radeon_bo_unmap(first_elem(&rmesa
->dma
.reserved
)->bo
);
190 if (is_empty_list(&rmesa
->dma
.free
)
191 || last_elem(&rmesa
->dma
.free
)->bo
->size
< size
) {
192 dma_bo
= CALLOC_STRUCT(radeon_dma_bo
);
196 dma_bo
->bo
= radeon_bo_open(rmesa
->radeonScreen
->bom
,
197 0, rmesa
->dma
.minimum_size
, 4,
198 RADEON_GEM_DOMAIN_GTT
, 0);
201 rcommonFlushCmdBuf(rmesa
, __FUNCTION__
);
204 insert_at_head(&rmesa
->dma
.reserved
, dma_bo
);
206 /* We push and pop buffers from end of list so we can keep
207 counter on unused buffers for later freeing them from
209 dma_bo
= last_elem(&rmesa
->dma
.free
);
210 remove_from_list(dma_bo
);
211 insert_at_head(&rmesa
->dma
.reserved
, dma_bo
);
214 rmesa
->dma
.current_used
= 0;
215 rmesa
->dma
.current_vertexptr
= 0;
217 if (radeon_cs_space_check_with_bo(rmesa
->cmdbuf
.cs
,
218 first_elem(&rmesa
->dma
.reserved
)->bo
,
219 RADEON_GEM_DOMAIN_GTT
, 0))
220 fprintf(stderr
,"failure to revalidate BOs - badness\n");
222 if (is_empty_list(&rmesa
->dma
.reserved
)) {
223 /* Cmd buff have been flushed in radeon_revalidate_bos */
226 radeon_bo_map(first_elem(&rmesa
->dma
.reserved
)->bo
, 1);
229 /* Allocates a region from rmesa->dma.current. If there isn't enough
230 * space in current, grab a new buffer (and discard what was left of current)
232 void radeonAllocDmaRegion(radeonContextPtr rmesa
,
233 struct radeon_bo
**pbo
, int *poffset
,
234 int bytes
, int alignment
)
236 if (RADEON_DEBUG
& RADEON_IOCTL
)
237 fprintf(stderr
, "%s %d\n", __FUNCTION__
, bytes
);
239 if (rmesa
->dma
.flush
)
240 rmesa
->dma
.flush(rmesa
->glCtx
);
242 assert(rmesa
->dma
.current_used
== rmesa
->dma
.current_vertexptr
);
245 rmesa
->dma
.current_used
= (rmesa
->dma
.current_used
+ alignment
) & ~alignment
;
247 if (is_empty_list(&rmesa
->dma
.reserved
)
248 || rmesa
->dma
.current_used
+ bytes
> first_elem(&rmesa
->dma
.reserved
)->bo
->size
)
249 radeonRefillCurrentDmaRegion(rmesa
, bytes
);
251 *poffset
= rmesa
->dma
.current_used
;
252 *pbo
= first_elem(&rmesa
->dma
.reserved
)->bo
;
255 /* Always align to at least 16 bytes */
256 rmesa
->dma
.current_used
= (rmesa
->dma
.current_used
+ bytes
+ 15) & ~15;
257 rmesa
->dma
.current_vertexptr
= rmesa
->dma
.current_used
;
259 assert(rmesa
->dma
.current_used
<= first_elem(&rmesa
->dma
.reserved
)->bo
->size
);
262 void radeonFreeDmaRegions(radeonContextPtr rmesa
)
264 struct radeon_dma_bo
*dma_bo
;
265 struct radeon_dma_bo
*temp
;
266 if (RADEON_DEBUG
& RADEON_DMA
)
267 fprintf(stderr
, "%s\n", __FUNCTION__
);
269 foreach_s(dma_bo
, temp
, &rmesa
->dma
.free
) {
270 remove_from_list(dma_bo
);
271 radeon_bo_unref(dma_bo
->bo
);
275 foreach_s(dma_bo
, temp
, &rmesa
->dma
.wait
) {
276 remove_from_list(dma_bo
);
277 radeon_bo_unref(dma_bo
->bo
);
281 foreach_s(dma_bo
, temp
, &rmesa
->dma
.reserved
) {
282 remove_from_list(dma_bo
);
283 radeon_bo_unref(dma_bo
->bo
);
288 void radeonReturnDmaRegion(radeonContextPtr rmesa
, int return_bytes
)
290 if (is_empty_list(&rmesa
->dma
.reserved
))
293 if (RADEON_DEBUG
& RADEON_IOCTL
)
294 fprintf(stderr
, "%s %d\n", __FUNCTION__
, return_bytes
);
295 rmesa
->dma
.current_used
-= return_bytes
;
296 rmesa
->dma
.current_vertexptr
= rmesa
->dma
.current_used
;
299 static int radeon_bo_is_idle(struct radeon_bo
* bo
)
302 int ret
= radeon_bo_is_busy(bo
, &domain
);
303 if (ret
== -EINVAL
) {
304 WARN_ONCE("Your libdrm or kernel doesn't have support for busy query.\n"
305 "This may cause small performance drop for you.\n");
307 return ret
!= -EBUSY
;
310 void radeonReleaseDmaRegions(radeonContextPtr rmesa
)
312 struct radeon_dma_bo
*dma_bo
;
313 struct radeon_dma_bo
*temp
;
314 const int expire_at
= ++rmesa
->dma
.free
.expire_counter
+ DMA_BO_FREE_TIME
;
315 const int time
= rmesa
->dma
.free
.expire_counter
;
317 if (RADEON_DEBUG
& RADEON_DMA
) {
321 foreach(dma_bo
, &rmesa
->dma
.free
)
324 foreach(dma_bo
, &rmesa
->dma
.wait
)
327 foreach(dma_bo
, &rmesa
->dma
.reserved
)
330 fprintf(stderr
, "%s: free %zu, wait %zu, reserved %zu, minimum_size: %zu\n",
331 __FUNCTION__
, free
, wait
, reserved
, rmesa
->dma
.minimum_size
);
334 if (!rmesa
->radeonScreen
->driScreen
->dri2
.enabled
) {
335 /* request updated cs processing information from kernel */
336 legacy_track_pending(rmesa
->radeonScreen
->bom
, 0);
339 if (!is_empty_list(&rmesa
->dma
.reserved
))
340 radeon_bo_unmap(first_elem(&rmesa
->dma
.reserved
)->bo
);
342 /* move waiting bos to free list.
343 wait list provides gpu time to handle data before reuse */
344 foreach_s(dma_bo
, temp
, &rmesa
->dma
.wait
) {
345 if (dma_bo
->expire_counter
== time
) {
346 WARN_ONCE("Leaking dma buffer object!\n");
347 radeon_bo_unref(dma_bo
->bo
);
348 remove_from_list(dma_bo
);
352 /* free objects that are too small to be used because of large request */
353 if (dma_bo
->bo
->size
< rmesa
->dma
.minimum_size
) {
354 radeon_bo_unref(dma_bo
->bo
);
355 remove_from_list(dma_bo
);
359 if (!radeon_bo_is_idle(dma_bo
->bo
)) {
360 if (rmesa
->radeonScreen
->driScreen
->dri2
.enabled
)
364 remove_from_list(dma_bo
);
365 dma_bo
->expire_counter
= expire_at
;
366 insert_at_tail(&rmesa
->dma
.free
, dma_bo
);
369 /* move reserved to wait list */
370 foreach_s(dma_bo
, temp
, &rmesa
->dma
.reserved
) {
371 /* free objects that are too small to be used because of large request */
372 if (dma_bo
->bo
->size
< rmesa
->dma
.minimum_size
) {
373 radeon_bo_unref(dma_bo
->bo
);
374 remove_from_list(dma_bo
);
378 remove_from_list(dma_bo
);
379 dma_bo
->expire_counter
= expire_at
;
380 insert_at_tail(&rmesa
->dma
.wait
, dma_bo
);
383 /* free bos that have been unused for some time */
384 foreach_s(dma_bo
, temp
, &rmesa
->dma
.free
) {
385 if (dma_bo
->expire_counter
!= time
)
387 remove_from_list(dma_bo
);
388 radeon_bo_unref(dma_bo
->bo
);
395 /* Flush vertices in the current dma region.
397 void rcommon_flush_last_swtcl_prim( GLcontext
*ctx
)
399 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
400 struct radeon_dma
*dma
= &rmesa
->dma
;
402 if (RADEON_DEBUG
& RADEON_IOCTL
)
403 fprintf(stderr
, "%s\n", __FUNCTION__
);
406 radeon_bo_unmap(rmesa
->swtcl
.bo
);
408 if (!is_empty_list(&dma
->reserved
)) {
409 GLuint current_offset
= dma
->current_used
;
411 assert (dma
->current_used
+
412 rmesa
->swtcl
.numverts
* rmesa
->swtcl
.vertex_size
* 4 ==
413 dma
->current_vertexptr
);
415 if (dma
->current_used
!= dma
->current_vertexptr
) {
416 dma
->current_used
= dma
->current_vertexptr
;
418 rmesa
->vtbl
.swtcl_flush(ctx
, current_offset
);
420 rmesa
->swtcl
.numverts
= 0;
422 radeon_bo_unref(rmesa
->swtcl
.bo
);
423 rmesa
->swtcl
.bo
= NULL
;
425 /* Alloc space in the current dma region.
428 rcommonAllocDmaLowVerts( radeonContextPtr rmesa
, int nverts
, int vsize
)
430 GLuint bytes
= vsize
* nverts
;
432 if (RADEON_DEBUG
& RADEON_IOCTL
)
433 fprintf(stderr
, "%s\n", __FUNCTION__
);
435 if(is_empty_list(&rmesa
->dma
.reserved
)
436 ||rmesa
->dma
.current_vertexptr
+ bytes
> first_elem(&rmesa
->dma
.reserved
)->bo
->size
) {
437 if (rmesa
->dma
.flush
) {
438 rmesa
->dma
.flush(rmesa
->glCtx
);
441 radeonRefillCurrentDmaRegion(rmesa
, bytes
);
446 if (!rmesa
->dma
.flush
) {
447 /* if cmdbuf flushed DMA restart */
448 rmesa
->glCtx
->Driver
.NeedFlush
|= FLUSH_STORED_VERTICES
;
449 rmesa
->dma
.flush
= rcommon_flush_last_swtcl_prim
;
452 ASSERT( vsize
== rmesa
->swtcl
.vertex_size
* 4 );
453 ASSERT( rmesa
->dma
.flush
== rcommon_flush_last_swtcl_prim
);
454 ASSERT( rmesa
->dma
.current_used
+
455 rmesa
->swtcl
.numverts
* rmesa
->swtcl
.vertex_size
* 4 ==
456 rmesa
->dma
.current_vertexptr
);
458 if (!rmesa
->swtcl
.bo
) {
459 rmesa
->swtcl
.bo
= first_elem(&rmesa
->dma
.reserved
)->bo
;
460 radeon_bo_ref(rmesa
->swtcl
.bo
);
461 radeon_bo_map(rmesa
->swtcl
.bo
, 1);
464 head
= (rmesa
->swtcl
.bo
->ptr
+ rmesa
->dma
.current_vertexptr
);
465 rmesa
->dma
.current_vertexptr
+= bytes
;
466 rmesa
->swtcl
.numverts
+= nverts
;
470 void radeonReleaseArrays( GLcontext
*ctx
, GLuint newinputs
)
472 radeonContextPtr radeon
= RADEON_CONTEXT( ctx
);
474 if (RADEON_DEBUG
& RADEON_IOCTL
)
475 fprintf(stderr
, "%s\n", __FUNCTION__
);
477 if (radeon
->dma
.flush
) {
478 radeon
->dma
.flush(radeon
->glCtx
);
480 for (i
= 0; i
< radeon
->tcl
.aos_count
; i
++) {
481 if (radeon
->tcl
.aos
[i
].bo
) {
482 radeon_bo_unref(radeon
->tcl
.aos
[i
].bo
);
483 radeon
->tcl
.aos
[i
].bo
= NULL
;