1 /**************************************************************************
3 Copyright (C) 2004 Nicolai Haehnle.
4 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
12 Permission is hereby granted, free of charge, to any person obtaining a
13 copy of this software and associated documentation files (the "Software"),
14 to deal in the Software without restriction, including without limitation
15 on the rights to use, copy, modify, merge, publish, distribute, sub
16 license, and/or sell copies of the Software, and to permit persons to whom
17 the Software is furnished to do so, subject to the following conditions:
19 The above copyright notice and this permission notice (including the next
20 paragraph) shall be included in all copies or substantial portions of the
23 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
26 ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
27 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
28 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
29 USE OR OTHER DEALINGS IN THE SOFTWARE.
31 **************************************************************************/
33 #include "radeon_common.h"
34 #include "main/simple_list.h"
36 #if defined(USE_X86_ASM)
37 #define COPY_DWORDS( dst, src, nr ) \
40 __asm__ __volatile__( "rep ; movsl" \
41 : "=%c" (__tmp), "=D" (dst), "=S" (__tmp) \
47 #define COPY_DWORDS( dst, src, nr ) \
50 for ( j = 0 ; j < nr ; j++ ) \
51 dst[j] = ((int *)src)[j]; \
56 void radeonEmitVec4(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
60 if (RADEON_DEBUG
& DEBUG_VERTS
)
61 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
62 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
65 COPY_DWORDS(out
, data
, count
);
67 for (i
= 0; i
< count
; i
++) {
68 out
[0] = *(int *)data
;
74 void radeonEmitVec8(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
78 if (RADEON_DEBUG
& DEBUG_VERTS
)
79 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
80 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
83 COPY_DWORDS(out
, data
, count
* 2);
85 for (i
= 0; i
< count
; i
++) {
86 out
[0] = *(int *)data
;
87 out
[1] = *(int *)(data
+ 4);
93 void radeonEmitVec12(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
97 if (RADEON_DEBUG
& DEBUG_VERTS
)
98 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
99 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
102 COPY_DWORDS(out
, data
, count
* 3);
105 for (i
= 0; i
< count
; i
++) {
106 out
[0] = *(int *)data
;
107 out
[1] = *(int *)(data
+ 4);
108 out
[2] = *(int *)(data
+ 8);
114 void radeonEmitVec16(uint32_t *out
, const GLvoid
* data
, int stride
, int count
)
118 if (RADEON_DEBUG
& DEBUG_VERTS
)
119 fprintf(stderr
, "%s count %d stride %d out %p data %p\n",
120 __FUNCTION__
, count
, stride
, (void *)out
, (void *)data
);
123 COPY_DWORDS(out
, data
, count
* 4);
125 for (i
= 0; i
< count
; i
++) {
126 out
[0] = *(int *)data
;
127 out
[1] = *(int *)(data
+ 4);
128 out
[2] = *(int *)(data
+ 8);
129 out
[3] = *(int *)(data
+ 12);
135 void rcommon_emit_vector(GLcontext
* ctx
, struct radeon_aos
*aos
,
136 const GLvoid
* data
, int size
, int stride
, int count
)
138 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
142 radeonAllocDmaRegion(rmesa
, &aos
->bo
, &aos
->offset
, size
* 4, 32);
146 radeonAllocDmaRegion(rmesa
, &aos
->bo
, &aos
->offset
, size
* count
* 4, 32);
150 aos
->components
= size
;
153 out
= (uint32_t*)((char*)aos
->bo
->ptr
+ aos
->offset
);
155 case 1: radeonEmitVec4(out
, data
, stride
, count
); break;
156 case 2: radeonEmitVec8(out
, data
, stride
, count
); break;
157 case 3: radeonEmitVec12(out
, data
, stride
, count
); break;
158 case 4: radeonEmitVec16(out
, data
, stride
, count
); break;
165 void radeon_init_dma(radeonContextPtr rmesa
)
167 make_empty_list(&rmesa
->dma
.free
);
168 make_empty_list(&rmesa
->dma
.wait
);
169 make_empty_list(&rmesa
->dma
.reserved
);
170 rmesa
->dma
.minimum_size
= MAX_DMA_BUF_SZ
;
173 void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa
, int size
)
175 /* we set minimum sizes to at least requested size
176 aligned to next 16 bytes. */
177 if (size
> rmesa
->dma
.minimum_size
)
178 rmesa
->dma
.minimum_size
= (size
+ 15) & (~15);
180 if (RADEON_DEBUG
& (DEBUG_IOCTL
| DEBUG_DMA
))
181 fprintf(stderr
, "%s\n", __FUNCTION__
);
183 if (rmesa
->dma
.flush
) {
184 rmesa
->dma
.flush(rmesa
->glCtx
);
187 /* unmap old reserved bo */
188 if (!is_empty_list(&rmesa
->dma
.reserved
))
189 radeon_bo_unmap(first_elem(&rmesa
->dma
.reserved
)->bo
);
191 if (is_empty_list(&rmesa
->dma
.free
)
192 || last_elem(&rmesa
->dma
.free
)->bo
->size
< size
) {
193 struct radeon_dma_bo
*dma_bo
= CALLOC(sizeof(struct radeon_dma_bo
));
197 dma_bo
->bo
= radeon_bo_open(rmesa
->radeonScreen
->bom
,
198 0, rmesa
->dma
.minimum_size
, 4,
199 RADEON_GEM_DOMAIN_GTT
, 0);
202 rcommonFlushCmdBuf(rmesa
, __FUNCTION__
);
205 insert_at_head(&rmesa
->dma
.reserved
, dma_bo
);
207 struct radeon_dma_bo
*dma_bo
= last_elem(&rmesa
->dma
.free
);
208 assert(dma_bo
->bo
->cref
== 1);
209 remove_from_list(dma_bo
);
210 insert_at_head(&rmesa
->dma
.reserved
, dma_bo
);
213 rmesa
->dma
.current_used
= 0;
214 rmesa
->dma
.current_vertexptr
= 0;
216 if (radeon_cs_space_check_with_bo(rmesa
->cmdbuf
.cs
,
217 first_elem(&rmesa
->dma
.reserved
)->bo
,
218 RADEON_GEM_DOMAIN_GTT
, 0))
219 fprintf(stderr
,"failure to revalidate BOs - badness\n");
221 if (is_empty_list(&rmesa
->dma
.reserved
)) {
222 /* Cmd buff have been flushed in radeon_revalidate_bos */
226 radeon_bo_map(first_elem(&rmesa
->dma
.reserved
)->bo
, 1);
229 /* Allocates a region from rmesa->dma.current. If there isn't enough
230 * space in current, grab a new buffer (and discard what was left of current)
232 void radeonAllocDmaRegion(radeonContextPtr rmesa
,
233 struct radeon_bo
**pbo
, int *poffset
,
234 int bytes
, int alignment
)
236 if (RADEON_DEBUG
& DEBUG_IOCTL
)
237 fprintf(stderr
, "%s %d\n", __FUNCTION__
, bytes
);
239 if (rmesa
->dma
.flush
)
240 rmesa
->dma
.flush(rmesa
->glCtx
);
242 assert(rmesa
->dma
.current_used
== rmesa
->dma
.current_vertexptr
);
245 rmesa
->dma
.current_used
= (rmesa
->dma
.current_used
+ alignment
) & ~alignment
;
247 if (is_empty_list(&rmesa
->dma
.reserved
)
248 || rmesa
->dma
.current_used
+ bytes
> first_elem(&rmesa
->dma
.reserved
)->bo
->size
)
249 radeonRefillCurrentDmaRegion(rmesa
, bytes
);
251 *poffset
= rmesa
->dma
.current_used
;
252 *pbo
= first_elem(&rmesa
->dma
.reserved
)->bo
;
255 /* Always align to at least 16 bytes */
256 rmesa
->dma
.current_used
= (rmesa
->dma
.current_used
+ bytes
+ 15) & ~15;
257 rmesa
->dma
.current_vertexptr
= rmesa
->dma
.current_used
;
259 assert(rmesa
->dma
.current_used
<= first_elem(&rmesa
->dma
.reserved
)->bo
->size
);
262 void radeonFreeDmaRegions(radeonContextPtr rmesa
)
264 struct radeon_dma_bo
*dma_bo
;
265 struct radeon_dma_bo
*temp
;
266 if (RADEON_DEBUG
& DEBUG_DMA
)
267 fprintf(stderr
, "%s\n", __FUNCTION__
);
269 foreach_s(dma_bo
, temp
, &rmesa
->dma
.free
) {
270 remove_from_list(dma_bo
);
271 radeon_bo_unref(dma_bo
->bo
);
275 foreach_s(dma_bo
, temp
, &rmesa
->dma
.wait
) {
276 remove_from_list(dma_bo
);
277 radeon_bo_unref(dma_bo
->bo
);
281 foreach_s(dma_bo
, temp
, &rmesa
->dma
.reserved
) {
282 remove_from_list(dma_bo
);
283 radeon_bo_unmap(dma_bo
->bo
);
284 radeon_bo_unref(dma_bo
->bo
);
289 void radeonReturnDmaRegion(radeonContextPtr rmesa
, int return_bytes
)
291 if (is_empty_list(&rmesa
->dma
.reserved
))
294 if (RADEON_DEBUG
& DEBUG_IOCTL
)
295 fprintf(stderr
, "%s %d\n", __FUNCTION__
, return_bytes
);
296 rmesa
->dma
.current_used
-= return_bytes
;
297 rmesa
->dma
.current_vertexptr
= rmesa
->dma
.current_used
;
300 static int radeon_bo_is_idle(struct radeon_bo
* bo
)
302 return bo
->cref
== 1;
305 void radeonReleaseDmaRegions(radeonContextPtr rmesa
)
307 struct radeon_dma_bo
*dma_bo
;
308 struct radeon_dma_bo
*temp
;
309 const int expire_at
= ++rmesa
->dma
.free
.expire_counter
+ DMA_BO_FREE_TIME
;
310 const int time
= rmesa
->dma
.free
.expire_counter
;
312 if (RADEON_DEBUG
& DEBUG_DMA
) {
316 foreach(dma_bo
, &rmesa
->dma
.free
)
319 foreach(dma_bo
, &rmesa
->dma
.wait
)
322 foreach(dma_bo
, &rmesa
->dma
.reserved
)
325 fprintf(stderr
, "%s: free %u, wait %u, reserved %u, minimum_size: %u\n",
326 __FUNCTION__
, free
, wait
, reserved
, rmesa
->dma
.minimum_size
);
329 if (!rmesa
->radeonScreen
->driScreen
->dri2
.enabled
) {
330 /* request updated cs processing information from kernel */
331 legacy_track_pending(rmesa
->radeonScreen
->bom
, 0);
333 /* move waiting bos to free list.
334 wait list provides gpu time to handle data before reuse */
335 foreach_s(dma_bo
, temp
, &rmesa
->dma
.wait
) {
336 if (dma_bo
->expire_counter
== time
) {
337 WARN_ONCE("Leaking dma buffer object!\n");
338 radeon_bo_unref(dma_bo
->bo
);
339 remove_from_list(dma_bo
);
343 /* free objects that are too small to be used because of large request */
344 if (dma_bo
->bo
->size
< rmesa
->dma
.minimum_size
) {
345 radeon_bo_unref(dma_bo
->bo
);
346 remove_from_list(dma_bo
);
350 if (!radeon_bo_is_idle(dma_bo
->bo
))
352 remove_from_list(dma_bo
);
353 dma_bo
->expire_counter
= expire_at
;
354 insert_at_tail(&rmesa
->dma
.free
, dma_bo
);
357 /* unmap the last dma region */
358 if (!is_empty_list(&rmesa
->dma
.reserved
))
359 radeon_bo_unmap(first_elem(&rmesa
->dma
.reserved
)->bo
);
360 /* move reserved to wait list */
361 foreach_s(dma_bo
, temp
, &rmesa
->dma
.reserved
) {
362 /* free objects that are too small to be used because of large request */
363 if (dma_bo
->bo
->size
< rmesa
->dma
.minimum_size
) {
364 radeon_bo_unref(dma_bo
->bo
);
365 remove_from_list(dma_bo
);
369 remove_from_list(dma_bo
);
370 dma_bo
->expire_counter
= expire_at
;
371 insert_at_tail(&rmesa
->dma
.wait
, dma_bo
);
374 /* free bos that have been unused for some time */
375 foreach_s(dma_bo
, temp
, &rmesa
->dma
.free
) {
376 if (dma_bo
->expire_counter
!= time
)
378 remove_from_list(dma_bo
);
379 radeon_bo_unref(dma_bo
->bo
);
386 /* Flush vertices in the current dma region.
388 void rcommon_flush_last_swtcl_prim( GLcontext
*ctx
)
390 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
391 struct radeon_dma
*dma
= &rmesa
->dma
;
394 if (RADEON_DEBUG
& DEBUG_IOCTL
)
395 fprintf(stderr
, "%s\n", __FUNCTION__
);
398 if (!is_empty_list(&dma
->reserved
)) {
399 GLuint current_offset
= dma
->current_used
;
401 assert (dma
->current_used
+
402 rmesa
->swtcl
.numverts
* rmesa
->swtcl
.vertex_size
* 4 ==
403 dma
->current_vertexptr
);
405 if (dma
->current_used
!= dma
->current_vertexptr
) {
406 dma
->current_used
= dma
->current_vertexptr
;
408 rmesa
->vtbl
.swtcl_flush(ctx
, current_offset
);
410 rmesa
->swtcl
.numverts
= 0;
413 /* Alloc space in the current dma region.
416 rcommonAllocDmaLowVerts( radeonContextPtr rmesa
, int nverts
, int vsize
)
418 GLuint bytes
= vsize
* nverts
;
421 if (RADEON_DEBUG
& DEBUG_IOCTL
)
422 fprintf(stderr
, "%s\n", __FUNCTION__
);
423 if (is_empty_list(&rmesa
->dma
.reserved
)
424 || rmesa
->dma
.current_vertexptr
+ bytes
> first_elem(&rmesa
->dma
.reserved
)->bo
->size
) {
425 radeonRefillCurrentDmaRegion(rmesa
, bytes
);
428 if (!rmesa
->dma
.flush
) {
429 /* make sure we have enough space to use this in cmdbuf */
430 rcommonEnsureCmdBufSpace(rmesa
,
431 rmesa
->hw
.max_state_size
+ (20*sizeof(int)),
433 /* if cmdbuf flushed DMA restart */
434 if (is_empty_list(&rmesa
->dma
.reserved
))
436 rmesa
->glCtx
->Driver
.NeedFlush
|= FLUSH_STORED_VERTICES
;
437 rmesa
->dma
.flush
= rcommon_flush_last_swtcl_prim
;
440 ASSERT( vsize
== rmesa
->swtcl
.vertex_size
* 4 );
441 ASSERT( rmesa
->dma
.flush
== rcommon_flush_last_swtcl_prim
);
442 ASSERT( rmesa
->dma
.current_used
+
443 rmesa
->swtcl
.numverts
* rmesa
->swtcl
.vertex_size
* 4 ==
444 rmesa
->dma
.current_vertexptr
);
446 head
= (first_elem(&rmesa
->dma
.reserved
)->bo
->ptr
+ rmesa
->dma
.current_vertexptr
);
447 rmesa
->dma
.current_vertexptr
+= bytes
;
448 rmesa
->swtcl
.numverts
+= nverts
;
452 void radeonReleaseArrays( GLcontext
*ctx
, GLuint newinputs
)
454 radeonContextPtr radeon
= RADEON_CONTEXT( ctx
);
456 if (RADEON_DEBUG
& DEBUG_IOCTL
)
457 fprintf(stderr
, "%s\n", __FUNCTION__
);
459 if (radeon
->dma
.flush
) {
460 radeon
->dma
.flush(radeon
->glCtx
);
462 for (i
= 0; i
< radeon
->tcl
.aos_count
; i
++) {
463 if (radeon
->tcl
.aos
[i
].bo
) {
464 radeon_bo_unref(radeon
->tcl
.aos
[i
].bo
);
465 radeon
->tcl
.aos
[i
].bo
= NULL
;