1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h,v 1.6 2002/12/16 16:18:58 dawes Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
37 #ifndef __RADEON_IOCTL_H__
38 #define __RADEON_IOCTL_H__
40 #include "simple_list.h"
41 #include "radeon_lock.h"
44 extern void radeonEmitState( radeonContextPtr rmesa
);
45 extern void radeonEmitVertexAOS( radeonContextPtr rmesa
,
49 extern void radeonEmitVbufPrim( radeonContextPtr rmesa
,
54 extern void radeonFlushElts( radeonContextPtr rmesa
);
56 extern GLushort
*radeonAllocEltsOpenEnded( radeonContextPtr rmesa
,
61 extern void radeonEmitAOS( radeonContextPtr rmesa
,
62 struct radeon_dma_region
**regions
,
66 extern void radeonEmitBlit( radeonContextPtr rmesa
,
72 GLint srcx
, GLint srcy
,
73 GLint dstx
, GLint dsty
,
76 extern void radeonEmitWait( radeonContextPtr rmesa
, GLuint flags
);
78 extern void radeonFlushCmdBuf( radeonContextPtr rmesa
, const char * );
79 extern void radeonRefillCurrentDmaRegion( radeonContextPtr rmesa
);
81 extern void radeonAllocDmaRegion( radeonContextPtr rmesa
,
82 struct radeon_dma_region
*region
,
86 extern void radeonAllocDmaRegionVerts( radeonContextPtr rmesa
,
87 struct radeon_dma_region
*region
,
92 extern void radeonReleaseDmaRegion( radeonContextPtr rmesa
,
93 struct radeon_dma_region
*region
,
96 extern void radeonCopyBuffer( const __DRIdrawablePrivate
*drawable
);
97 extern void radeonPageFlip( const __DRIdrawablePrivate
*drawable
);
98 extern void radeonFlush( GLcontext
*ctx
);
99 extern void radeonFinish( GLcontext
*ctx
);
100 extern void radeonWaitForIdleLocked( radeonContextPtr rmesa
);
101 extern void radeonWaitForVBlank( radeonContextPtr rmesa
);
102 extern void radeonInitIoctlFuncs( GLcontext
*ctx
);
103 extern void radeonGetAllParams( radeonContextPtr rmesa
);
104 extern void radeonSetUpAtomList( radeonContextPtr rmesa
);
108 extern void radeonCompatEmitPrimitive( radeonContextPtr rmesa
,
109 GLuint vertex_format
,
113 /* ================================================================
117 /* Close off the last primitive, if it exists.
119 #define RADEON_NEWPRIM( rmesa ) \
121 if ( rmesa->dma.flush ) \
122 rmesa->dma.flush( rmesa ); \
125 /* Can accomodate several state changes and primitive changes without
126 * actually firing the buffer.
128 #define RADEON_STATECHANGE( rmesa, ATOM ) \
130 RADEON_NEWPRIM( rmesa ); \
131 rmesa->hw.ATOM.dirty = GL_TRUE; \
132 rmesa->hw.is_dirty = GL_TRUE; \
135 #define RADEON_DB_STATE( ATOM ) \
136 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
137 rmesa->hw.ATOM.cmd_size * 4)
139 static __inline
int RADEON_DB_STATECHANGE(
140 radeonContextPtr rmesa
,
141 struct radeon_state_atom
*atom
)
143 if (memcmp(atom
->cmd
, atom
->lastcmd
, atom
->cmd_size
*4)) {
145 RADEON_NEWPRIM( rmesa
);
146 atom
->dirty
= GL_TRUE
;
147 rmesa
->hw
.is_dirty
= GL_TRUE
;
149 atom
->cmd
= atom
->lastcmd
;
158 /* Fire the buffered vertices no matter what.
160 #define RADEON_FIREVERTICES( rmesa ) \
162 if ( rmesa->store.cmd_used || rmesa->dma.flush ) { \
163 radeonFlush( rmesa->glCtx ); \
167 /* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
168 * are available, you will also be adding an rmesa->state.max_state_size because
169 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
171 #if RADEON_OLD_PACKETS
172 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
173 #define VERT_AOS_BUFSZ (0)
174 #define ELTS_BUFSZ(nr) (24 + nr * 2)
175 #define VBUF_BUFSZ (6 * sizeof(int))
177 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
178 #define VERT_AOS_BUFSZ (5 * sizeof(int))
179 #define ELTS_BUFSZ(nr) (16 + nr * 2)
180 #define VBUF_BUFSZ (4 * sizeof(int))
183 /* Ensure that a minimum amount of space is available in the command buffer.
184 * This is used to ensure atomicity of state updates with the rendering requests
187 * An alternative would be to implement a "soft lock" such that when the buffer
188 * wraps at an inopportune time, we grab the lock, flush the current buffer,
189 * and hang on to the lock until the critical section is finished and we flush
190 * the buffer again and unlock.
192 static __inline
void radeonEnsureCmdBufSpace( radeonContextPtr rmesa
,
195 if (rmesa
->store
.cmd_used
+ bytes
> RADEON_CMD_BUF_SZ
)
196 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
197 assert( bytes
<= RADEON_CMD_BUF_SZ
);
200 /* Alloc space in the command buffer
202 static __inline
char *radeonAllocCmdBuf( radeonContextPtr rmesa
,
203 int bytes
, const char *where
)
205 if (rmesa
->store
.cmd_used
+ bytes
> RADEON_CMD_BUF_SZ
)
206 radeonFlushCmdBuf( rmesa
, __FUNCTION__
);
208 assert(rmesa
->dri
.drmMinor
>= 3);
211 char *head
= rmesa
->store
.cmd_buf
+ rmesa
->store
.cmd_used
;
212 rmesa
->store
.cmd_used
+= bytes
;
217 #endif /* __RADEON_IOCTL_H__ */