1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Kevin E. Martin <martin@valinux.com>
33 * Gareth Hughes <gareth@valinux.com>
36 #ifndef __RADEON_IOCTL_H__
37 #define __RADEON_IOCTL_H__
39 #include "main/simple_list.h"
40 #include "radeon_lock.h"
41 #include "radeon_bocs_wrapper.h"
43 extern void radeonEmitVertexAOS( r100ContextPtr rmesa
,
48 extern void radeonEmitVbufPrim( r100ContextPtr rmesa
,
53 extern void radeonFlushElts( GLcontext
*ctx
);
56 extern GLushort
*radeonAllocEltsOpenEnded( r100ContextPtr rmesa
,
62 extern void radeonEmitAOS( r100ContextPtr rmesa
,
66 extern void radeonEmitBlit( r100ContextPtr rmesa
,
72 GLint srcx
, GLint srcy
,
73 GLint dstx
, GLint dsty
,
76 extern void radeonEmitWait( r100ContextPtr rmesa
, GLuint flags
);
78 extern void radeonFlushCmdBuf( r100ContextPtr rmesa
, const char * );
80 extern void radeonFlush( GLcontext
*ctx
);
81 extern void radeonFinish( GLcontext
*ctx
);
82 extern void radeonInitIoctlFuncs( GLcontext
*ctx
);
83 extern void radeonGetAllParams( r100ContextPtr rmesa
);
84 extern void radeonSetUpAtomList( r100ContextPtr rmesa
);
86 /* ================================================================
90 /* Close off the last primitive, if it exists.
92 #define RADEON_NEWPRIM( rmesa ) \
94 if ( rmesa->radeon.dma.flush ) \
95 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
98 /* Can accomodate several state changes and primitive changes without
99 * actually firing the buffer.
102 #define RADEON_STATECHANGE( rmesa, ATOM ) \
104 RADEON_NEWPRIM( rmesa ); \
105 rmesa->hw.ATOM.dirty = GL_TRUE; \
106 rmesa->radeon.hw.is_dirty = GL_TRUE; \
109 #define RADEON_DB_STATE( ATOM ) \
110 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
111 rmesa->hw.ATOM.cmd_size * 4)
113 static INLINE
int RADEON_DB_STATECHANGE(r100ContextPtr rmesa
,
114 struct radeon_state_atom
*atom
)
116 if (memcmp(atom
->cmd
, atom
->lastcmd
, atom
->cmd_size
*4)) {
118 RADEON_NEWPRIM( rmesa
);
119 atom
->dirty
= GL_TRUE
;
120 rmesa
->radeon
.hw
.is_dirty
= GL_TRUE
;
122 atom
->cmd
= atom
->lastcmd
;
130 /* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
131 * are available, you will also be adding an rmesa->state.max_state_size because
132 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
134 #if RADEON_OLD_PACKETS
135 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
136 #define VERT_AOS_BUFSZ (0)
137 #define ELTS_BUFSZ(nr) (24 + nr * 2)
138 #define VBUF_BUFSZ (6 * sizeof(int))
140 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
141 #define VERT_AOS_BUFSZ (5 * sizeof(int))
142 #define ELTS_BUFSZ(nr) (16 + nr * 2)
143 #define VBUF_BUFSZ (4 * sizeof(int))
147 static inline uint32_t cmdpacket3(int cmd_type
)
149 drm_radeon_cmd_header_t cmd
;
152 cmd
.header
.cmd_type
= cmd_type
;
154 return (uint32_t)cmd
.i
;
158 #define OUT_BATCH_PACKET3(packet, num_extra) do { \
159 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
160 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3)); \
161 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
163 OUT_BATCH(CP_PACKET2); \
164 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
168 #define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \
169 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
170 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3_CLIP)); \
171 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
173 OUT_BATCH(CP_PACKET2); \
174 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
179 #endif /* __RADEON_IOCTL_H__ */