src/mesa/drivers/dri/radeon/radeon_maos_verts.c

   1 /* $XFree86$ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      Tungsten Graphics Inc., Austin, Texas.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Keith Whitwell <keith@tungstengraphics.com>
  34  */
  35
  36 #include "glheader.h"
  37 #include "imports.h"
  38 #include "mtypes.h"
  39
  40 #include "array_cache/acache.h"
  41 #include "tnl/tnl.h"
  42 #include "tnl/t_pipeline.h"
  43 #include "tnl/t_imm_debug.h"
  44
  45 #include "radeon_context.h"
  46 #include "radeon_state.h"
  47 #include "radeon_ioctl.h"
  48 #include "radeon_tex.h"
  49 #include "radeon_tcl.h"
  50 #include "radeon_swtcl.h"
  51 #include "radeon_maos.h"
  52
  53
  54 #define RADEON_TCL_MAX_SETUP 13
  55
  56 union emit_union { float f; GLuint ui; radeon_color_t specular; };
  57
  58 static struct {
  59    void   (*emit)( GLcontext *, GLuint, GLuint, void * );
  60    GLuint vertex_size;
  61    GLuint vertex_format;
  62 } setup_tab[RADEON_TCL_MAX_SETUP];
  63
  64 #define DO_W    (IND & RADEON_CP_VC_FRMT_W0)
  65 #define DO_RGBA (IND & RADEON_CP_VC_FRMT_PKCOLOR)
  66 #define DO_SPEC (IND & RADEON_CP_VC_FRMT_PKSPEC)
  67 #define DO_FOG  (IND & RADEON_CP_VC_FRMT_PKSPEC)
  68 #define DO_TEX0 (IND & RADEON_CP_VC_FRMT_ST0)
  69 #define DO_TEX1 (IND & RADEON_CP_VC_FRMT_ST1)
  70 #define DO_PTEX (IND & RADEON_CP_VC_FRMT_Q0)
  71 #define DO_NORM (IND & RADEON_CP_VC_FRMT_N0)
  72
  73 #define DO_TEX2 0
  74 #define DO_TEX3 0
  75
  76 #define GET_TEXSOURCE(n)  n
  77 #define GET_UBYTE_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteColor
  78 #define GET_UBYTE_SPEC_COLOR_STORE() &RADEON_CONTEXT(ctx)->UbyteSecondaryColor
  79
  80 #define IMPORT_FLOAT_COLORS radeon_import_float_colors
  81 #define IMPORT_FLOAT_SPEC_COLORS radeon_import_float_spec_colors
  82
  83 /***********************************************************************
  84  *             Generate vertex emit functions               *
  85  ***********************************************************************/
  86
  87
  88 /* Defined in order of increasing vertex size:
  89  */
  90 #define IDX 0
  91 #define IND (RADEON_CP_VC_FRMT_XY|              \
  92              RADEON_CP_VC_FRMT_Z|               \
  93              RADEON_CP_VC_FRMT_PKCOLOR)
  94 #define TAG(x) x##_rgba
  95 #include "radeon_maos_vbtmp.h"
  96
  97 #define IDX 1
  98 #define IND (RADEON_CP_VC_FRMT_XY|              \
  99              RADEON_CP_VC_FRMT_Z|               \
 100              RADEON_CP_VC_FRMT_N0)
 101 #define TAG(x) x##_n
 102 #include "radeon_maos_vbtmp.h"
 103
 104 #define IDX 2
 105 #define IND (RADEON_CP_VC_FRMT_XY|              \
 106              RADEON_CP_VC_FRMT_Z|               \
 107              RADEON_CP_VC_FRMT_PKCOLOR|         \
 108              RADEON_CP_VC_FRMT_ST0)
 109 #define TAG(x) x##_rgba_st
 110 #include "radeon_maos_vbtmp.h"
 111
 112 #define IDX 3
 113 #define IND (RADEON_CP_VC_FRMT_XY|              \
 114              RADEON_CP_VC_FRMT_Z|               \
 115              RADEON_CP_VC_FRMT_PKCOLOR|         \
 116              RADEON_CP_VC_FRMT_N0)
 117 #define TAG(x) x##_rgba_n
 118 #include "radeon_maos_vbtmp.h"
 119
 120 #define IDX 4
 121 #define IND (RADEON_CP_VC_FRMT_XY|              \
 122              RADEON_CP_VC_FRMT_Z|               \
 123              RADEON_CP_VC_FRMT_ST0|             \
 124              RADEON_CP_VC_FRMT_N0)
 125 #define TAG(x) x##_st_n
 126 #include "radeon_maos_vbtmp.h"
 127
 128 #define IDX 5
 129 #define IND (RADEON_CP_VC_FRMT_XY|              \
 130              RADEON_CP_VC_FRMT_Z|               \
 131              RADEON_CP_VC_FRMT_PKCOLOR|         \
 132              RADEON_CP_VC_FRMT_ST0|             \
 133              RADEON_CP_VC_FRMT_ST1)
 134 #define TAG(x) x##_rgba_st_st
 135 #include "radeon_maos_vbtmp.h"
 136
 137 #define IDX 6
 138 #define IND (RADEON_CP_VC_FRMT_XY|              \
 139              RADEON_CP_VC_FRMT_Z|               \
 140              RADEON_CP_VC_FRMT_PKCOLOR|         \
 141              RADEON_CP_VC_FRMT_ST0|             \
 142              RADEON_CP_VC_FRMT_N0)
 143 #define TAG(x) x##_rgba_st_n
 144 #include "radeon_maos_vbtmp.h"
 145
 146 #define IDX 7
 147 #define IND (RADEON_CP_VC_FRMT_XY|              \
 148              RADEON_CP_VC_FRMT_Z|               \
 149              RADEON_CP_VC_FRMT_PKCOLOR|         \
 150              RADEON_CP_VC_FRMT_PKSPEC|          \
 151              RADEON_CP_VC_FRMT_ST0|             \
 152              RADEON_CP_VC_FRMT_ST1)
 153 #define TAG(x) x##_rgba_spec_st_st
 154 #include "radeon_maos_vbtmp.h"
 155
 156 #define IDX 8
 157 #define IND (RADEON_CP_VC_FRMT_XY|              \
 158              RADEON_CP_VC_FRMT_Z|               \
 159              RADEON_CP_VC_FRMT_ST0|             \
 160              RADEON_CP_VC_FRMT_ST1|             \
 161              RADEON_CP_VC_FRMT_N0)
 162 #define TAG(x) x##_st_st_n
 163 #include "radeon_maos_vbtmp.h"
 164
 165 #define IDX 9
 166 #define IND (RADEON_CP_VC_FRMT_XY|              \
 167              RADEON_CP_VC_FRMT_Z|               \
 168              RADEON_CP_VC_FRMT_PKCOLOR|         \
 169              RADEON_CP_VC_FRMT_PKSPEC|          \
 170              RADEON_CP_VC_FRMT_ST0|             \
 171              RADEON_CP_VC_FRMT_ST1|             \
 172              RADEON_CP_VC_FRMT_N0)
 173 #define TAG(x) x##_rgpa_spec_st_st_n
 174 #include "radeon_maos_vbtmp.h"
 175
 176 #define IDX 10
 177 #define IND (RADEON_CP_VC_FRMT_XY|              \
 178              RADEON_CP_VC_FRMT_Z|               \
 179              RADEON_CP_VC_FRMT_PKCOLOR|         \
 180              RADEON_CP_VC_FRMT_ST0|             \
 181              RADEON_CP_VC_FRMT_Q0)
 182 #define TAG(x) x##_rgba_stq
 183 #include "radeon_maos_vbtmp.h"
 184
 185 #define IDX 11
 186 #define IND (RADEON_CP_VC_FRMT_XY|              \
 187              RADEON_CP_VC_FRMT_Z|               \
 188              RADEON_CP_VC_FRMT_PKCOLOR|         \
 189              RADEON_CP_VC_FRMT_ST1|             \
 190              RADEON_CP_VC_FRMT_Q1|              \
 191              RADEON_CP_VC_FRMT_ST0|             \
 192              RADEON_CP_VC_FRMT_Q0)
 193 #define TAG(x) x##_rgba_stq_stq
 194 #include "radeon_maos_vbtmp.h"
 195
 196 #define IDX 12
 197 #define IND (RADEON_CP_VC_FRMT_XY|              \
 198              RADEON_CP_VC_FRMT_Z|               \
 199              RADEON_CP_VC_FRMT_W0|              \
 200              RADEON_CP_VC_FRMT_PKCOLOR|         \
 201              RADEON_CP_VC_FRMT_PKSPEC|          \
 202              RADEON_CP_VC_FRMT_ST0|             \
 203              RADEON_CP_VC_FRMT_Q0|              \
 204              RADEON_CP_VC_FRMT_ST1|             \
 205              RADEON_CP_VC_FRMT_Q1|              \
 206              RADEON_CP_VC_FRMT_N0)
 207 #define TAG(x) x##_w_rgpa_spec_stq_stq_n
 208 #include "radeon_maos_vbtmp.h"
 209
 210
 211
 212
 213
 214 /***********************************************************************
 215  *                         Initialization
 216  ***********************************************************************/
 217
 218
 219 static void init_tcl_verts( void )
 220 {
 221    init_rgba();
 222    init_n();
 223    init_rgba_n();
 224    init_rgba_st();
 225    init_st_n();
 226    init_rgba_st_st();
 227    init_rgba_st_n();
 228    init_rgba_spec_st_st();
 229    init_st_st_n();
 230    init_rgpa_spec_st_st_n();
 231    init_rgba_stq();
 232    init_rgba_stq_stq();
 233    init_w_rgpa_spec_stq_stq_n();
 234 }
 235
 236
 237 void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 238 {
 239    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 240    struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
 241    GLuint req = 0;
 242    GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
 243                  ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1));
 244    int i;
 245    static int firsttime = 1;
 246
 247    if (firsttime) {
 248       init_tcl_verts();
 249       firsttime = 0;
 250    }
 251
 252    if (1) {
 253       req |= RADEON_CP_VC_FRMT_Z;
 254       if (VB->ObjPtr->size == 4) {
 255          req |= RADEON_CP_VC_FRMT_W0;
 256       }
 257    }
 258
 259    if (inputs & VERT_BIT_NORMAL) {
 260       req |= RADEON_CP_VC_FRMT_N0;
 261    }
 262
 263    if (inputs & VERT_BIT_COLOR0) {
 264       req |= RADEON_CP_VC_FRMT_PKCOLOR;
 265    }
 266
 267    if (inputs & VERT_BIT_COLOR1) {
 268       req |= RADEON_CP_VC_FRMT_PKSPEC;
 269    }
 270
 271    if (inputs & VERT_BIT_TEX0) {
 272       req |= RADEON_CP_VC_FRMT_ST0;
 273
 274       if (VB->TexCoordPtr[0]->size == 4) {
 275          req |= RADEON_CP_VC_FRMT_Q0;
 276          vtx |= RADEON_TCL_VTX_Q0;
 277       }
 278    }
 279
 280    if (inputs & VERT_BIT_TEX1) {
 281       req |= RADEON_CP_VC_FRMT_ST1;
 282
 283       if (VB->TexCoordPtr[1]->size == 4) {
 284          req |= RADEON_CP_VC_FRMT_Q1;
 285          vtx |= RADEON_TCL_VTX_Q1;
 286       }
 287    }
 288
 289    if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
 290       RADEON_STATECHANGE( rmesa, tcl );
 291       rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
 292    }
 293
 294    for (i = 0 ; i < RADEON_TCL_MAX_SETUP ; i++)
 295       if ((setup_tab[i].vertex_format & req) == req)
 296          break;
 297
 298    if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
 299        rmesa->tcl.indexed_verts.buf)
 300       return;
 301
 302    if (rmesa->tcl.indexed_verts.buf)
 303       radeonReleaseArrays( ctx, ~0 );
 304
 305    radeonAllocDmaRegionVerts( rmesa,
 306                               &rmesa->tcl.indexed_verts,
 307                               VB->Count,
 308                               setup_tab[i].vertex_size * 4,
 309                               4);
 310
 311    setup_tab[i].emit( ctx, 0, VB->Count,
 312                       rmesa->tcl.indexed_verts.address +
 313                       rmesa->tcl.indexed_verts.start );
 314
 315    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
 316    rmesa->tcl.indexed_verts.aos_start = GET_START( &rmesa->tcl.indexed_verts );
 317    rmesa->tcl.indexed_verts.aos_size = setup_tab[i].vertex_size;
 318    rmesa->tcl.indexed_verts.aos_stride = setup_tab[i].vertex_size;
 319
 320    rmesa->tcl.aos_components[0] = &rmesa->tcl.indexed_verts;
 321    rmesa->tcl.nr_aos_components = 1;
 322 }
 323
 324
 325
 326 void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
 327 {
 328    radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
 329
 330    if (RADEON_DEBUG & DEBUG_VERTS)
 331       _tnl_print_vert_flags( __FUNCTION__, newinputs );
 332
 333    if (newinputs)
 334      radeonReleaseDmaRegion( rmesa, &rmesa->tcl.indexed_verts, __FUNCTION__ );
 335 }