src/mesa/drivers/dri/radeon/radeon_maos_verts.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_maos_verts.c,v 1.1 2002/10/30 12:51:55 alanh Exp $ */
   2 /**************************************************************************
   3
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      Tungsten Graphics Inc., Austin, Texas.
   6
   7 All Rights Reserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28
  29 **************************************************************************/
  30
  31 /*
  32  * Authors:
  33  *   Keith Whitwell <keith@tungstengraphics.com>
  34  */
  35
  36 #include "glheader.h"
  37 #include "imports.h"
  38 #include "mtypes.h"
  39
  40 #include "array_cache/acache.h"
  41 #include "tnl/tnl.h"
  42 #include "tnl/t_pipeline.h"
  43
  44 #include "radeon_context.h"
  45 #include "radeon_state.h"
  46 #include "radeon_ioctl.h"
  47 #include "radeon_tex.h"
  48 #include "radeon_tcl.h"
  49 #include "radeon_swtcl.h"
  50 #include "radeon_maos.h"
  51
  52
  53 #define RADEON_TCL_MAX_SETUP 13
  54
  55 union emit_union { float f; GLuint ui; radeon_color_t rgba; };
  56
  57 static struct {
  58    void   (*emit)( GLcontext *, GLuint, GLuint, void * );
  59    GLuint vertex_size;
  60    GLuint vertex_format;
  61 } setup_tab[RADEON_TCL_MAX_SETUP];
  62
  63 #define DO_W    (IND & RADEON_CP_VC_FRMT_W0)
  64 #define DO_RGBA (IND & RADEON_CP_VC_FRMT_PKCOLOR)
  65 #define DO_SPEC (IND & RADEON_CP_VC_FRMT_PKSPEC)
  66 #define DO_FOG  (IND & RADEON_CP_VC_FRMT_PKSPEC)
  67 #define DO_TEX0 (IND & RADEON_CP_VC_FRMT_ST0)
  68 #define DO_TEX1 (IND & RADEON_CP_VC_FRMT_ST1)
  69 #define DO_PTEX (IND & RADEON_CP_VC_FRMT_Q0)
  70 #define DO_NORM (IND & RADEON_CP_VC_FRMT_N0)
  71
  72 #define DO_TEX2 0
  73 #define DO_TEX3 0
  74
  75 #define GET_TEXSOURCE(n)  n
  76
  77 /***********************************************************************
  78  *             Generate vertex emit functions               *
  79  ***********************************************************************/
  80
  81
  82 /* Defined in order of increasing vertex size:
  83  */
  84 #define IDX 0
  85 #define IND (RADEON_CP_VC_FRMT_XY|              \
  86              RADEON_CP_VC_FRMT_Z|               \
  87              RADEON_CP_VC_FRMT_PKCOLOR)
  88 #define TAG(x) x##_rgba
  89 #include "radeon_maos_vbtmp.h"
  90
  91 #define IDX 1
  92 #define IND (RADEON_CP_VC_FRMT_XY|              \
  93              RADEON_CP_VC_FRMT_Z|               \
  94              RADEON_CP_VC_FRMT_N0)
  95 #define TAG(x) x##_n
  96 #include "radeon_maos_vbtmp.h"
  97
  98 #define IDX 2
  99 #define IND (RADEON_CP_VC_FRMT_XY|              \
 100              RADEON_CP_VC_FRMT_Z|               \
 101              RADEON_CP_VC_FRMT_PKCOLOR|         \
 102              RADEON_CP_VC_FRMT_ST0)
 103 #define TAG(x) x##_rgba_st
 104 #include "radeon_maos_vbtmp.h"
 105
 106 #define IDX 3
 107 #define IND (RADEON_CP_VC_FRMT_XY|              \
 108              RADEON_CP_VC_FRMT_Z|               \
 109              RADEON_CP_VC_FRMT_PKCOLOR|         \
 110              RADEON_CP_VC_FRMT_N0)
 111 #define TAG(x) x##_rgba_n
 112 #include "radeon_maos_vbtmp.h"
 113
 114 #define IDX 4
 115 #define IND (RADEON_CP_VC_FRMT_XY|              \
 116              RADEON_CP_VC_FRMT_Z|               \
 117              RADEON_CP_VC_FRMT_ST0|             \
 118              RADEON_CP_VC_FRMT_N0)
 119 #define TAG(x) x##_st_n
 120 #include "radeon_maos_vbtmp.h"
 121
 122 #define IDX 5
 123 #define IND (RADEON_CP_VC_FRMT_XY|              \
 124              RADEON_CP_VC_FRMT_Z|               \
 125              RADEON_CP_VC_FRMT_PKCOLOR|         \
 126              RADEON_CP_VC_FRMT_ST0|             \
 127              RADEON_CP_VC_FRMT_ST1)
 128 #define TAG(x) x##_rgba_st_st
 129 #include "radeon_maos_vbtmp.h"
 130
 131 #define IDX 6
 132 #define IND (RADEON_CP_VC_FRMT_XY|              \
 133              RADEON_CP_VC_FRMT_Z|               \
 134              RADEON_CP_VC_FRMT_PKCOLOR|         \
 135              RADEON_CP_VC_FRMT_ST0|             \
 136              RADEON_CP_VC_FRMT_N0)
 137 #define TAG(x) x##_rgba_st_n
 138 #include "radeon_maos_vbtmp.h"
 139
 140 #define IDX 7
 141 #define IND (RADEON_CP_VC_FRMT_XY|              \
 142              RADEON_CP_VC_FRMT_Z|               \
 143              RADEON_CP_VC_FRMT_PKCOLOR|         \
 144              RADEON_CP_VC_FRMT_PKSPEC|          \
 145              RADEON_CP_VC_FRMT_ST0|             \
 146              RADEON_CP_VC_FRMT_ST1)
 147 #define TAG(x) x##_rgba_spec_st_st
 148 #include "radeon_maos_vbtmp.h"
 149
 150 #define IDX 8
 151 #define IND (RADEON_CP_VC_FRMT_XY|              \
 152              RADEON_CP_VC_FRMT_Z|               \
 153              RADEON_CP_VC_FRMT_ST0|             \
 154              RADEON_CP_VC_FRMT_ST1|             \
 155              RADEON_CP_VC_FRMT_N0)
 156 #define TAG(x) x##_st_st_n
 157 #include "radeon_maos_vbtmp.h"
 158
 159 #define IDX 9
 160 #define IND (RADEON_CP_VC_FRMT_XY|              \
 161              RADEON_CP_VC_FRMT_Z|               \
 162              RADEON_CP_VC_FRMT_PKCOLOR|         \
 163              RADEON_CP_VC_FRMT_PKSPEC|          \
 164              RADEON_CP_VC_FRMT_ST0|             \
 165              RADEON_CP_VC_FRMT_ST1|             \
 166              RADEON_CP_VC_FRMT_N0)
 167 #define TAG(x) x##_rgba_spec_st_st_n
 168 #include "radeon_maos_vbtmp.h"
 169
 170 #define IDX 10
 171 #define IND (RADEON_CP_VC_FRMT_XY|              \
 172              RADEON_CP_VC_FRMT_Z|               \
 173              RADEON_CP_VC_FRMT_PKCOLOR|         \
 174              RADEON_CP_VC_FRMT_ST0|             \
 175              RADEON_CP_VC_FRMT_Q0)
 176 #define TAG(x) x##_rgba_stq
 177 #include "radeon_maos_vbtmp.h"
 178
 179 #define IDX 11
 180 #define IND (RADEON_CP_VC_FRMT_XY|              \
 181              RADEON_CP_VC_FRMT_Z|               \
 182              RADEON_CP_VC_FRMT_PKCOLOR|         \
 183              RADEON_CP_VC_FRMT_ST1|             \
 184              RADEON_CP_VC_FRMT_Q1|              \
 185              RADEON_CP_VC_FRMT_ST0|             \
 186              RADEON_CP_VC_FRMT_Q0)
 187 #define TAG(x) x##_rgba_stq_stq
 188 #include "radeon_maos_vbtmp.h"
 189
 190 #define IDX 12
 191 #define IND (RADEON_CP_VC_FRMT_XY|              \
 192              RADEON_CP_VC_FRMT_Z|               \
 193              RADEON_CP_VC_FRMT_W0|              \
 194              RADEON_CP_VC_FRMT_PKCOLOR|         \
 195              RADEON_CP_VC_FRMT_PKSPEC|          \
 196              RADEON_CP_VC_FRMT_ST0|             \
 197              RADEON_CP_VC_FRMT_Q0|              \
 198              RADEON_CP_VC_FRMT_ST1|             \
 199              RADEON_CP_VC_FRMT_Q1|              \
 200              RADEON_CP_VC_FRMT_N0)
 201 #define TAG(x) x##_w_rgba_spec_stq_stq_n
 202 #include "radeon_maos_vbtmp.h"
 203
 204
 205
 206
 207
 208 /***********************************************************************
 209  *                         Initialization
 210  ***********************************************************************/
 211
 212
 213 static void init_tcl_verts( void )
 214 {
 215    init_rgba();
 216    init_n();
 217    init_rgba_n();
 218    init_rgba_st();
 219    init_st_n();
 220    init_rgba_st_st();
 221    init_rgba_st_n();
 222    init_rgba_spec_st_st();
 223    init_st_st_n();
 224    init_rgba_spec_st_st_n();
 225    init_rgba_stq();
 226    init_rgba_stq_stq();
 227    init_w_rgba_spec_stq_stq_n();
 228 }
 229
 230
 231 void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 232 {
 233    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 234    struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
 235    GLuint req = 0;
 236    GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
 237                  ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1));
 238    int i;
 239    static int firsttime = 1;
 240
 241    if (firsttime) {
 242       init_tcl_verts();
 243       firsttime = 0;
 244    }
 245
 246    if (1) {
 247       req |= RADEON_CP_VC_FRMT_Z;
 248       if (VB->ObjPtr->size == 4) {
 249          req |= RADEON_CP_VC_FRMT_W0;
 250       }
 251    }
 252
 253    if (inputs & VERT_BIT_NORMAL) {
 254       req |= RADEON_CP_VC_FRMT_N0;
 255    }
 256
 257    if (inputs & VERT_BIT_COLOR0) {
 258       req |= RADEON_CP_VC_FRMT_PKCOLOR;
 259    }
 260
 261    if (inputs & VERT_BIT_COLOR1) {
 262       req |= RADEON_CP_VC_FRMT_PKSPEC;
 263    }
 264
 265    if (inputs & VERT_BIT_TEX0) {
 266       req |= RADEON_CP_VC_FRMT_ST0;
 267
 268       if (VB->TexCoordPtr[0]->size == 4) {
 269          req |= RADEON_CP_VC_FRMT_Q0;
 270          vtx |= RADEON_TCL_VTX_Q0;
 271       }
 272    }
 273
 274    if (inputs & VERT_BIT_TEX1) {
 275       req |= RADEON_CP_VC_FRMT_ST1;
 276
 277       if (VB->TexCoordPtr[1]->size == 4) {
 278          req |= RADEON_CP_VC_FRMT_Q1;
 279          vtx |= RADEON_TCL_VTX_Q1;
 280       }
 281    }
 282
 283    if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
 284       RADEON_STATECHANGE( rmesa, tcl );
 285       rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
 286    }
 287
 288    for (i = 0 ; i < RADEON_TCL_MAX_SETUP ; i++)
 289       if ((setup_tab[i].vertex_format & req) == req)
 290          break;
 291
 292    if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
 293        rmesa->tcl.indexed_verts.buf)
 294       return;
 295
 296    if (rmesa->tcl.indexed_verts.buf)
 297       radeonReleaseArrays( ctx, ~0 );
 298
 299    radeonAllocDmaRegionVerts( rmesa,
 300                               &rmesa->tcl.indexed_verts,
 301                               VB->Count,
 302                               setup_tab[i].vertex_size * 4,
 303                               4);
 304
 305    /* The vertex code expects Obj to be clean to element 3.  To fix
 306     * this, add more vertex code (for obj-2, obj-3) or preferably move
 307     * to maos.
 308     */
 309    if (VB->ObjPtr->size < 3 ||
 310        (VB->ObjPtr->size == 3 &&
 311         (setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) {
 312
 313       _math_trans_4f( rmesa->tcl.ObjClean.data,
 314                       VB->ObjPtr->data,
 315                       VB->ObjPtr->stride,
 316                       GL_FLOAT,
 317                       VB->ObjPtr->size,
 318                       0,
 319                       VB->Count );
 320
 321       switch (VB->ObjPtr->size) {
 322       case 1:
 323             _mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1);
 324       case 2:
 325             _mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 2);
 326       case 3:
 327          if (setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0) {
 328             _mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 3);
 329          }
 330       case 4:
 331       default:
 332          break;
 333       }
 334
 335       VB->ObjPtr = &rmesa->tcl.ObjClean;
 336    }
 337
 338
 339
 340    setup_tab[i].emit( ctx, 0, VB->Count,
 341                       rmesa->tcl.indexed_verts.address +
 342                       rmesa->tcl.indexed_verts.start );
 343
 344    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
 345    rmesa->tcl.indexed_verts.aos_start = GET_START( &rmesa->tcl.indexed_verts );
 346    rmesa->tcl.indexed_verts.aos_size = setup_tab[i].vertex_size;
 347    rmesa->tcl.indexed_verts.aos_stride = setup_tab[i].vertex_size;
 348
 349    rmesa->tcl.aos_components[0] = &rmesa->tcl.indexed_verts;
 350    rmesa->tcl.nr_aos_components = 1;
 351 }
 352
 353
 354
 355 void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
 356 {
 357    radeonContextPtr rmesa = RADEON_CONTEXT( ctx );
 358
 359 #if 0
 360    if (RADEON_DEBUG & DEBUG_VERTS)
 361       _tnl_print_vert_flags( __FUNCTION__, newinputs );
 362 #endif
 363
 364    if (newinputs)
 365      radeonReleaseDmaRegion( rmesa, &rmesa->tcl.indexed_verts, __FUNCTION__ );
 366 }