Merge remote branch 'main/master' into radeon-rewrite
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_mipmap_tree.c
1 /*
2 * Copyright (C) 2008 Nicolai Haehnle.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "radeon_mipmap_tree.h"
29
30 #include <errno.h>
31 #include <unistd.h>
32
33 #include "main/simple_list.h"
34 #include "main/texcompress.h"
35 #include "main/texformat.h"
36
37 static GLuint radeon_compressed_texture_size(GLcontext *ctx,
38 GLsizei width, GLsizei height, GLsizei depth,
39 GLuint mesaFormat)
40 {
41 GLuint size = _mesa_compressed_texture_size(ctx, width, height, depth, mesaFormat);
42
43 if (mesaFormat == MESA_FORMAT_RGB_DXT1 ||
44 mesaFormat == MESA_FORMAT_RGBA_DXT1) {
45 if (width + 3 < 8) /* width one block */
46 size = size * 4;
47 else if (width + 3 < 16)
48 size = size * 2;
49 } else {
50 /* DXT3/5, 16 bytes per block */
51 // WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n");
52 if (width + 3 < 8)
53 size = size * 2;
54 }
55
56 return size;
57 }
58
59
60 static int radeon_compressed_num_bytes(GLuint mesaFormat)
61 {
62 int bytes = 0;
63 switch(mesaFormat) {
64
65 case MESA_FORMAT_RGB_FXT1:
66 case MESA_FORMAT_RGBA_FXT1:
67 case MESA_FORMAT_RGB_DXT1:
68 case MESA_FORMAT_RGBA_DXT1:
69 bytes = 2;
70 break;
71
72 case MESA_FORMAT_RGBA_DXT3:
73 case MESA_FORMAT_RGBA_DXT5:
74 bytes = 4;
75 default:
76 break;
77 }
78
79 return bytes;
80 }
81
82 /**
83 * Compute sizes and fill in offset and blit information for the given
84 * image (determined by \p face and \p level).
85 *
86 * \param curOffset points to the offset at which the image is to be stored
87 * and is updated by this function according to the size of the image.
88 */
89 static void compute_tex_image_offset(radeon_mipmap_tree *mt,
90 GLuint face, GLuint level, GLuint* curOffset)
91 {
92 radeon_mipmap_level *lvl = &mt->levels[level];
93
94 /* Find image size in bytes */
95 if (mt->compressed) {
96 /* TODO: Is this correct? Need test cases for compressed textures! */
97 GLuint align;
98
99 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
100 lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
101 lvl->width, lvl->height, lvl->depth, mt->compressed);
102 } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
103 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
104 lvl->size = lvl->rowstride * lvl->height;
105 } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
106 /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
107 * though the actual offset may be different (if texture is less than
108 * 32 bytes width) to the untiled case */
109 lvl->rowstride = (lvl->width * mt->bpp * 2 + 31) & ~31;
110 lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
111 } else {
112 lvl->rowstride = (lvl->width * mt->bpp + 31) & ~31;
113 lvl->size = lvl->rowstride * lvl->height * lvl->depth;
114 }
115 assert(lvl->size > 0);
116
117 /* All images are aligned to a 32-byte offset */
118 *curOffset = (*curOffset + 0x1f) & ~0x1f;
119 lvl->faces[face].offset = *curOffset;
120 *curOffset += lvl->size;
121
122 if (RADEON_DEBUG & DEBUG_TEXTURE)
123 fprintf(stderr,
124 "level %d, face %d: rs:%d %dx%d at %d\n",
125 level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
126 }
127
128 static GLuint minify(GLuint size, GLuint levels)
129 {
130 size = size >> levels;
131 if (size < 1)
132 size = 1;
133 return size;
134 }
135
136 static void calculate_miptree_layout(radeon_mipmap_tree *mt)
137 {
138 GLuint curOffset;
139 GLuint numLevels;
140 GLuint i;
141
142 numLevels = mt->lastLevel - mt->firstLevel + 1;
143 assert(numLevels <= RADEON_MAX_TEXTURE_LEVELS);
144
145 curOffset = 0;
146 for(i = 0; i < numLevels; i++) {
147 GLuint face;
148
149 mt->levels[i].width = minify(mt->width0, i);
150 mt->levels[i].height = minify(mt->height0, i);
151 mt->levels[i].depth = minify(mt->depth0, i);
152
153 for(face = 0; face < mt->faces; face++)
154 compute_tex_image_offset(mt, face, i, &curOffset);
155 }
156
157 /* Note the required size in memory */
158 mt->totalsize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
159 }
160
161
162 /**
163 * Create a new mipmap tree, calculate its layout and allocate memory.
164 */
165 radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
166 GLenum target, GLuint firstLevel, GLuint lastLevel,
167 GLuint width0, GLuint height0, GLuint depth0,
168 GLuint bpp, GLuint tilebits, GLuint compressed)
169 {
170 radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
171
172 mt->radeon = rmesa;
173 mt->refcount = 1;
174 mt->t = t;
175 mt->target = target;
176 mt->faces = (target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
177 mt->firstLevel = firstLevel;
178 mt->lastLevel = lastLevel;
179 mt->width0 = width0;
180 mt->height0 = height0;
181 mt->depth0 = depth0;
182 mt->bpp = compressed ? radeon_compressed_num_bytes(compressed) : bpp;
183 mt->tilebits = tilebits;
184 mt->compressed = compressed;
185
186 calculate_miptree_layout(mt);
187
188 mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
189 0, mt->totalsize, 1024,
190 RADEON_GEM_DOMAIN_VRAM,
191 0);
192
193 return mt;
194 }
195
196 void radeon_miptree_reference(radeon_mipmap_tree *mt)
197 {
198 mt->refcount++;
199 assert(mt->refcount > 0);
200 }
201
202 void radeon_miptree_unreference(radeon_mipmap_tree *mt)
203 {
204 if (!mt)
205 return;
206
207 assert(mt->refcount > 0);
208 mt->refcount--;
209 if (!mt->refcount) {
210 radeon_bo_unref(mt->bo);
211 free(mt);
212 }
213 }
214
215
216 /**
217 * Calculate first and last mip levels for the given texture object,
218 * where the dimensions are taken from the given texture image at
219 * the given level.
220 *
221 * Note: level is the OpenGL level number, which is not necessarily the same
222 * as the first level that is actually present.
223 *
224 * The base level image of the given texture face must be non-null,
225 * or this will fail.
226 */
227 static void calculate_first_last_level(struct gl_texture_object *tObj,
228 GLuint *pfirstLevel, GLuint *plastLevel,
229 GLuint face, GLuint level)
230 {
231 const struct gl_texture_image * const baseImage =
232 tObj->Image[face][level];
233
234 assert(baseImage);
235
236 /* These must be signed values. MinLod and MaxLod can be negative numbers,
237 * and having firstLevel and lastLevel as signed prevents the need for
238 * extra sign checks.
239 */
240 int firstLevel;
241 int lastLevel;
242
243 /* Yes, this looks overly complicated, but it's all needed.
244 */
245 switch (tObj->Target) {
246 case GL_TEXTURE_1D:
247 case GL_TEXTURE_2D:
248 case GL_TEXTURE_3D:
249 case GL_TEXTURE_CUBE_MAP:
250 if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
251 /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
252 */
253 firstLevel = lastLevel = tObj->BaseLevel;
254 } else {
255 firstLevel = tObj->BaseLevel + (GLint)(tObj->MinLod + 0.5);
256 firstLevel = MAX2(firstLevel, tObj->BaseLevel);
257 firstLevel = MIN2(firstLevel, level + baseImage->MaxLog2);
258 lastLevel = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
259 lastLevel = MAX2(lastLevel, tObj->BaseLevel);
260 lastLevel = MIN2(lastLevel, level + baseImage->MaxLog2);
261 lastLevel = MIN2(lastLevel, tObj->MaxLevel);
262 lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
263 }
264 break;
265 case GL_TEXTURE_RECTANGLE_NV:
266 case GL_TEXTURE_4D_SGIS:
267 firstLevel = lastLevel = 0;
268 break;
269 default:
270 return;
271 }
272
273 /* save these values */
274 *pfirstLevel = firstLevel;
275 *plastLevel = lastLevel;
276 }
277
278
279 /**
280 * Checks whether the given miptree can hold the given texture image at the
281 * given face and level.
282 */
283 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
284 struct gl_texture_image *texImage, GLuint face, GLuint level)
285 {
286 radeon_mipmap_level *lvl;
287
288 if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel)
289 return GL_FALSE;
290
291 if (texImage->IsCompressed != mt->compressed)
292 return GL_FALSE;
293
294 if (!texImage->IsCompressed &&
295 !mt->compressed &&
296 texImage->TexFormat->TexelBytes != mt->bpp)
297 return GL_FALSE;
298
299 lvl = &mt->levels[level - mt->firstLevel];
300 if (lvl->width != texImage->Width ||
301 lvl->height != texImage->Height ||
302 lvl->depth != texImage->Depth)
303 return GL_FALSE;
304
305 return GL_TRUE;
306 }
307
308
309 /**
310 * Checks whether the given miptree has the right format to store the given texture object.
311 */
312 GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
313 {
314 struct gl_texture_image *firstImage;
315 GLuint compressed;
316 GLuint numfaces = 1;
317 GLuint firstLevel, lastLevel;
318
319 calculate_first_last_level(texObj, &firstLevel, &lastLevel, 0, texObj->BaseLevel);
320 if (texObj->Target == GL_TEXTURE_CUBE_MAP)
321 numfaces = 6;
322
323 firstImage = texObj->Image[0][firstLevel];
324 compressed = firstImage->IsCompressed ? firstImage->TexFormat->MesaFormat : 0;
325
326 return (mt->firstLevel == firstLevel &&
327 mt->lastLevel == lastLevel &&
328 mt->width0 == firstImage->Width &&
329 mt->height0 == firstImage->Height &&
330 mt->depth0 == firstImage->Depth &&
331 mt->bpp == firstImage->TexFormat->TexelBytes &&
332 mt->compressed == compressed);
333 }
334
335
336 /**
337 * Try to allocate a mipmap tree for the given texture that will fit the
338 * given image in the given position.
339 */
340 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
341 struct gl_texture_image *texImage, GLuint face, GLuint level)
342 {
343 GLuint compressed = texImage->IsCompressed ? texImage->TexFormat->MesaFormat : 0;
344 GLuint numfaces = 1;
345 GLuint firstLevel, lastLevel;
346
347 assert(!t->mt);
348
349 calculate_first_last_level(&t->base, &firstLevel, &lastLevel, face, level);
350 if (t->base.Target == GL_TEXTURE_CUBE_MAP)
351 numfaces = 6;
352
353 if (level != firstLevel || face >= numfaces)
354 return;
355
356 t->mt = radeon_miptree_create(rmesa, t, t->base.Target,
357 firstLevel, lastLevel,
358 texImage->Width, texImage->Height, texImage->Depth,
359 texImage->TexFormat->TexelBytes, t->tile_bits, compressed);
360 }