r300: set proper texture row alignment for IGP chips
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_mipmap_tree.c
1 /*
2 * Copyright (C) 2008 Nicolai Haehnle.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "radeon_mipmap_tree.h"
29
30 #include <errno.h>
31 #include <unistd.h>
32
33 #include "main/simple_list.h"
34 #include "main/texcompress.h"
35 #include "main/texformat.h"
36
37 static GLuint radeon_compressed_texture_size(GLcontext *ctx,
38 GLsizei width, GLsizei height, GLsizei depth,
39 GLuint mesaFormat)
40 {
41 GLuint size = _mesa_compressed_texture_size(ctx, width, height, depth, mesaFormat);
42
43 if (mesaFormat == MESA_FORMAT_RGB_DXT1 ||
44 mesaFormat == MESA_FORMAT_RGBA_DXT1) {
45 if (width + 3 < 8) /* width one block */
46 size = size * 4;
47 else if (width + 3 < 16)
48 size = size * 2;
49 } else {
50 /* DXT3/5, 16 bytes per block */
51 // WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n");
52 if (width + 3 < 8)
53 size = size * 2;
54 }
55
56 return size;
57 }
58
59
60 static int radeon_compressed_num_bytes(GLuint mesaFormat)
61 {
62 int bytes = 0;
63 switch(mesaFormat) {
64
65 case MESA_FORMAT_RGB_FXT1:
66 case MESA_FORMAT_RGBA_FXT1:
67 case MESA_FORMAT_RGB_DXT1:
68 case MESA_FORMAT_RGBA_DXT1:
69 bytes = 2;
70 break;
71
72 case MESA_FORMAT_RGBA_DXT3:
73 case MESA_FORMAT_RGBA_DXT5:
74 bytes = 4;
75 default:
76 break;
77 }
78
79 return bytes;
80 }
81
82 /**
83 * Compute sizes and fill in offset and blit information for the given
84 * image (determined by \p face and \p level).
85 *
86 * \param curOffset points to the offset at which the image is to be stored
87 * and is updated by this function according to the size of the image.
88 */
89 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt,
90 GLuint face, GLuint level, GLuint* curOffset)
91 {
92 radeon_mipmap_level *lvl = &mt->levels[level];
93 uint32_t row_align = rmesa->texture_row_align - 1;
94
95 /* Find image size in bytes */
96 if (mt->compressed) {
97 /* TODO: Is this correct? Need test cases for compressed textures! */
98 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
99 lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
100 lvl->width, lvl->height, lvl->depth, mt->compressed);
101 } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
102 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
103 lvl->size = lvl->rowstride * lvl->height;
104 } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
105 /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
106 * though the actual offset may be different (if texture is less than
107 * 32 bytes width) to the untiled case */
108 lvl->rowstride = (lvl->width * mt->bpp * 2 + 31) & ~31;
109 lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
110 } else {
111 lvl->rowstride = (lvl->width * mt->bpp + row_align) & ~row_align;
112 lvl->size = lvl->rowstride * lvl->height * lvl->depth;
113 }
114 assert(lvl->size > 0);
115
116 /* All images are aligned to a 32-byte offset */
117 *curOffset = (*curOffset + 0x1f) & ~0x1f;
118 lvl->faces[face].offset = *curOffset;
119 *curOffset += lvl->size;
120
121 if (RADEON_DEBUG & DEBUG_TEXTURE)
122 fprintf(stderr,
123 "level %d, face %d: rs:%d %dx%d at %d\n",
124 level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
125 }
126
127 static GLuint minify(GLuint size, GLuint levels)
128 {
129 size = size >> levels;
130 if (size < 1)
131 size = 1;
132 return size;
133 }
134
135 static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree *mt)
136 {
137 GLuint curOffset;
138 GLuint numLevels;
139 GLuint i;
140
141 numLevels = mt->lastLevel - mt->firstLevel + 1;
142 assert(numLevels <= RADEON_MAX_TEXTURE_LEVELS);
143
144 curOffset = 0;
145 for(i = 0; i < numLevels; i++) {
146 GLuint face;
147
148 mt->levels[i].width = minify(mt->width0, i);
149 mt->levels[i].height = minify(mt->height0, i);
150 mt->levels[i].depth = minify(mt->depth0, i);
151
152 for(face = 0; face < mt->faces; face++)
153 compute_tex_image_offset(rmesa, mt, face, i, &curOffset);
154 }
155
156 /* Note the required size in memory */
157 mt->totalsize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
158 }
159
160
161 /**
162 * Create a new mipmap tree, calculate its layout and allocate memory.
163 */
164 radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
165 GLenum target, GLuint firstLevel, GLuint lastLevel,
166 GLuint width0, GLuint height0, GLuint depth0,
167 GLuint bpp, GLuint tilebits, GLuint compressed)
168 {
169 radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
170
171 mt->radeon = rmesa;
172 mt->refcount = 1;
173 mt->t = t;
174 mt->target = target;
175 mt->faces = (target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
176 mt->firstLevel = firstLevel;
177 mt->lastLevel = lastLevel;
178 mt->width0 = width0;
179 mt->height0 = height0;
180 mt->depth0 = depth0;
181 mt->bpp = compressed ? radeon_compressed_num_bytes(compressed) : bpp;
182 mt->tilebits = tilebits;
183 mt->compressed = compressed;
184
185 calculate_miptree_layout(rmesa, mt);
186
187 mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
188 0, mt->totalsize, 1024,
189 RADEON_GEM_DOMAIN_VRAM,
190 0);
191
192 return mt;
193 }
194
195 void radeon_miptree_reference(radeon_mipmap_tree *mt)
196 {
197 mt->refcount++;
198 assert(mt->refcount > 0);
199 }
200
201 void radeon_miptree_unreference(radeon_mipmap_tree *mt)
202 {
203 if (!mt)
204 return;
205
206 assert(mt->refcount > 0);
207 mt->refcount--;
208 if (!mt->refcount) {
209 radeon_bo_unref(mt->bo);
210 free(mt);
211 }
212 }
213
214
215 /**
216 * Calculate first and last mip levels for the given texture object,
217 * where the dimensions are taken from the given texture image at
218 * the given level.
219 *
220 * Note: level is the OpenGL level number, which is not necessarily the same
221 * as the first level that is actually present.
222 *
223 * The base level image of the given texture face must be non-null,
224 * or this will fail.
225 */
226 static void calculate_first_last_level(struct gl_texture_object *tObj,
227 GLuint *pfirstLevel, GLuint *plastLevel,
228 GLuint face, GLuint level)
229 {
230 const struct gl_texture_image * const baseImage =
231 tObj->Image[face][level];
232
233 assert(baseImage);
234
235 /* These must be signed values. MinLod and MaxLod can be negative numbers,
236 * and having firstLevel and lastLevel as signed prevents the need for
237 * extra sign checks.
238 */
239 int firstLevel;
240 int lastLevel;
241
242 /* Yes, this looks overly complicated, but it's all needed.
243 */
244 switch (tObj->Target) {
245 case GL_TEXTURE_1D:
246 case GL_TEXTURE_2D:
247 case GL_TEXTURE_3D:
248 case GL_TEXTURE_CUBE_MAP:
249 if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
250 /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
251 */
252 firstLevel = lastLevel = tObj->BaseLevel;
253 } else {
254 firstLevel = tObj->BaseLevel + (GLint)(tObj->MinLod + 0.5);
255 firstLevel = MAX2(firstLevel, tObj->BaseLevel);
256 firstLevel = MIN2(firstLevel, level + baseImage->MaxLog2);
257 lastLevel = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
258 lastLevel = MAX2(lastLevel, tObj->BaseLevel);
259 lastLevel = MIN2(lastLevel, level + baseImage->MaxLog2);
260 lastLevel = MIN2(lastLevel, tObj->MaxLevel);
261 lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
262 }
263 break;
264 case GL_TEXTURE_RECTANGLE_NV:
265 case GL_TEXTURE_4D_SGIS:
266 firstLevel = lastLevel = 0;
267 break;
268 default:
269 return;
270 }
271
272 /* save these values */
273 *pfirstLevel = firstLevel;
274 *plastLevel = lastLevel;
275 }
276
277
278 /**
279 * Checks whether the given miptree can hold the given texture image at the
280 * given face and level.
281 */
282 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
283 struct gl_texture_image *texImage, GLuint face, GLuint level)
284 {
285 radeon_mipmap_level *lvl;
286
287 if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel)
288 return GL_FALSE;
289
290 if (texImage->IsCompressed != mt->compressed)
291 return GL_FALSE;
292
293 if (!texImage->IsCompressed &&
294 !mt->compressed &&
295 texImage->TexFormat->TexelBytes != mt->bpp)
296 return GL_FALSE;
297
298 lvl = &mt->levels[level - mt->firstLevel];
299 if (lvl->width != texImage->Width ||
300 lvl->height != texImage->Height ||
301 lvl->depth != texImage->Depth)
302 return GL_FALSE;
303
304 return GL_TRUE;
305 }
306
307
308 /**
309 * Checks whether the given miptree has the right format to store the given texture object.
310 */
311 GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
312 {
313 struct gl_texture_image *firstImage;
314 GLuint compressed;
315 GLuint numfaces = 1;
316 GLuint firstLevel, lastLevel;
317
318 calculate_first_last_level(texObj, &firstLevel, &lastLevel, 0, texObj->BaseLevel);
319 if (texObj->Target == GL_TEXTURE_CUBE_MAP)
320 numfaces = 6;
321
322 firstImage = texObj->Image[0][firstLevel];
323 compressed = firstImage->IsCompressed ? firstImage->TexFormat->MesaFormat : 0;
324
325 return (mt->firstLevel == firstLevel &&
326 mt->lastLevel == lastLevel &&
327 mt->width0 == firstImage->Width &&
328 mt->height0 == firstImage->Height &&
329 mt->depth0 == firstImage->Depth &&
330 mt->bpp == firstImage->TexFormat->TexelBytes &&
331 mt->compressed == compressed);
332 }
333
334
335 /**
336 * Try to allocate a mipmap tree for the given texture that will fit the
337 * given image in the given position.
338 */
339 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
340 struct gl_texture_image *texImage, GLuint face, GLuint level)
341 {
342 GLuint compressed = texImage->IsCompressed ? texImage->TexFormat->MesaFormat : 0;
343 GLuint numfaces = 1;
344 GLuint firstLevel, lastLevel;
345
346 assert(!t->mt);
347
348 calculate_first_last_level(&t->base, &firstLevel, &lastLevel, face, level);
349 if (t->base.Target == GL_TEXTURE_CUBE_MAP)
350 numfaces = 6;
351
352 if (level != firstLevel || face >= numfaces)
353 return;
354
355 t->mt = radeon_miptree_create(rmesa, t, t->base.Target,
356 firstLevel, lastLevel,
357 texImage->Width, texImage->Height, texImage->Depth,
358 texImage->TexFormat->TexelBytes, t->tile_bits, compressed);
359 }
360
361 /* Although we use the image_offset[] array to store relative offsets
362 * to cube faces, Mesa doesn't know anything about this and expects
363 * each cube face to be treated as a separate image.
364 *
365 * These functions present that view to mesa:
366 */
367 void
368 radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
369 {
370 if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
371 offsets[0] = 0;
372 else {
373 int i;
374 for (i = 0; i < 6; i++)
375 offsets[i] = mt->levels[level].faces[i].offset;
376 }
377 }
378
379 GLuint
380 radeon_miptree_image_offset(radeon_mipmap_tree *mt,
381 GLuint face, GLuint level)
382 {
383 if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
384 return (mt->levels[level].faces[face].offset);
385 else
386 return mt->levels[level].faces[0].offset;
387 }