Merge remote branch 'origin/master' into radeon-rewrite
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_mipmap_tree.c
1 /*
2 * Copyright (C) 2008 Nicolai Haehnle.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "radeon_mipmap_tree.h"
29
30 #include <errno.h>
31 #include <unistd.h>
32
33 #include "main/simple_list.h"
34 #include "main/texcompress.h"
35 #include "main/texformat.h"
36
37 static GLuint radeon_compressed_texture_size(GLcontext *ctx,
38 GLsizei width, GLsizei height, GLsizei depth,
39 GLuint mesaFormat)
40 {
41 GLuint size = _mesa_compressed_texture_size(ctx, width, height, depth, mesaFormat);
42
43 if (mesaFormat == MESA_FORMAT_RGB_DXT1 ||
44 mesaFormat == MESA_FORMAT_RGBA_DXT1) {
45 if (width + 3 < 8) /* width one block */
46 size = size * 4;
47 else if (width + 3 < 16)
48 size = size * 2;
49 } else {
50 /* DXT3/5, 16 bytes per block */
51 // WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n");
52 if (width + 3 < 8)
53 size = size * 2;
54 }
55
56 return size;
57 }
58
59
60 static int radeon_compressed_num_bytes(GLuint mesaFormat)
61 {
62 int bytes = 0;
63 switch(mesaFormat) {
64
65 case MESA_FORMAT_RGB_FXT1:
66 case MESA_FORMAT_RGBA_FXT1:
67 case MESA_FORMAT_RGB_DXT1:
68 case MESA_FORMAT_RGBA_DXT1:
69 bytes = 2;
70 break;
71
72 case MESA_FORMAT_RGBA_DXT3:
73 case MESA_FORMAT_RGBA_DXT5:
74 bytes = 4;
75 default:
76 break;
77 }
78
79 return bytes;
80 }
81
82 /**
83 * Compute sizes and fill in offset and blit information for the given
84 * image (determined by \p face and \p level).
85 *
86 * \param curOffset points to the offset at which the image is to be stored
87 * and is updated by this function according to the size of the image.
88 */
89 static void compute_tex_image_offset(radeon_mipmap_tree *mt,
90 GLuint face, GLuint level, GLuint* curOffset)
91 {
92 radeon_mipmap_level *lvl = &mt->levels[level];
93
94 /* Find image size in bytes */
95 if (mt->compressed) {
96 /* TODO: Is this correct? Need test cases for compressed textures! */
97 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
98 lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
99 lvl->width, lvl->height, lvl->depth, mt->compressed);
100 } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
101 lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
102 lvl->size = lvl->rowstride * lvl->height;
103 } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
104 /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
105 * though the actual offset may be different (if texture is less than
106 * 32 bytes width) to the untiled case */
107 lvl->rowstride = (lvl->width * mt->bpp * 2 + 31) & ~31;
108 lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
109 } else {
110 lvl->rowstride = (lvl->width * mt->bpp + 31) & ~31;
111 lvl->size = lvl->rowstride * lvl->height * lvl->depth;
112 }
113 assert(lvl->size > 0);
114
115 /* All images are aligned to a 32-byte offset */
116 *curOffset = (*curOffset + 0x1f) & ~0x1f;
117 lvl->faces[face].offset = *curOffset;
118 *curOffset += lvl->size;
119
120 if (RADEON_DEBUG & DEBUG_TEXTURE)
121 fprintf(stderr,
122 "level %d, face %d: rs:%d %dx%d at %d\n",
123 level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
124 }
125
126 static GLuint minify(GLuint size, GLuint levels)
127 {
128 size = size >> levels;
129 if (size < 1)
130 size = 1;
131 return size;
132 }
133
134 static void calculate_miptree_layout(radeon_mipmap_tree *mt)
135 {
136 GLuint curOffset;
137 GLuint numLevels;
138 GLuint i;
139
140 numLevels = mt->lastLevel - mt->firstLevel + 1;
141 assert(numLevels <= RADEON_MAX_TEXTURE_LEVELS);
142
143 curOffset = 0;
144 for(i = 0; i < numLevels; i++) {
145 GLuint face;
146
147 mt->levels[i].width = minify(mt->width0, i);
148 mt->levels[i].height = minify(mt->height0, i);
149 mt->levels[i].depth = minify(mt->depth0, i);
150
151 for(face = 0; face < mt->faces; face++)
152 compute_tex_image_offset(mt, face, i, &curOffset);
153 }
154
155 /* Note the required size in memory */
156 mt->totalsize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
157 }
158
159
160 /**
161 * Create a new mipmap tree, calculate its layout and allocate memory.
162 */
163 radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
164 GLenum target, GLuint firstLevel, GLuint lastLevel,
165 GLuint width0, GLuint height0, GLuint depth0,
166 GLuint bpp, GLuint tilebits, GLuint compressed)
167 {
168 radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
169
170 mt->radeon = rmesa;
171 mt->refcount = 1;
172 mt->t = t;
173 mt->target = target;
174 mt->faces = (target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
175 mt->firstLevel = firstLevel;
176 mt->lastLevel = lastLevel;
177 mt->width0 = width0;
178 mt->height0 = height0;
179 mt->depth0 = depth0;
180 mt->bpp = compressed ? radeon_compressed_num_bytes(compressed) : bpp;
181 mt->tilebits = tilebits;
182 mt->compressed = compressed;
183
184 calculate_miptree_layout(mt);
185
186 mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
187 0, mt->totalsize, 1024,
188 RADEON_GEM_DOMAIN_VRAM,
189 0);
190
191 return mt;
192 }
193
194 void radeon_miptree_reference(radeon_mipmap_tree *mt)
195 {
196 mt->refcount++;
197 assert(mt->refcount > 0);
198 }
199
200 void radeon_miptree_unreference(radeon_mipmap_tree *mt)
201 {
202 if (!mt)
203 return;
204
205 assert(mt->refcount > 0);
206 mt->refcount--;
207 if (!mt->refcount) {
208 radeon_bo_unref(mt->bo);
209 free(mt);
210 }
211 }
212
213
214 /**
215 * Calculate first and last mip levels for the given texture object,
216 * where the dimensions are taken from the given texture image at
217 * the given level.
218 *
219 * Note: level is the OpenGL level number, which is not necessarily the same
220 * as the first level that is actually present.
221 *
222 * The base level image of the given texture face must be non-null,
223 * or this will fail.
224 */
225 static void calculate_first_last_level(struct gl_texture_object *tObj,
226 GLuint *pfirstLevel, GLuint *plastLevel,
227 GLuint face, GLuint level)
228 {
229 const struct gl_texture_image * const baseImage =
230 tObj->Image[face][level];
231
232 assert(baseImage);
233
234 /* These must be signed values. MinLod and MaxLod can be negative numbers,
235 * and having firstLevel and lastLevel as signed prevents the need for
236 * extra sign checks.
237 */
238 int firstLevel;
239 int lastLevel;
240
241 /* Yes, this looks overly complicated, but it's all needed.
242 */
243 switch (tObj->Target) {
244 case GL_TEXTURE_1D:
245 case GL_TEXTURE_2D:
246 case GL_TEXTURE_3D:
247 case GL_TEXTURE_CUBE_MAP:
248 if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
249 /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
250 */
251 firstLevel = lastLevel = tObj->BaseLevel;
252 } else {
253 firstLevel = tObj->BaseLevel + (GLint)(tObj->MinLod + 0.5);
254 firstLevel = MAX2(firstLevel, tObj->BaseLevel);
255 firstLevel = MIN2(firstLevel, level + baseImage->MaxLog2);
256 lastLevel = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
257 lastLevel = MAX2(lastLevel, tObj->BaseLevel);
258 lastLevel = MIN2(lastLevel, level + baseImage->MaxLog2);
259 lastLevel = MIN2(lastLevel, tObj->MaxLevel);
260 lastLevel = MAX2(firstLevel, lastLevel); /* need at least one level */
261 }
262 break;
263 case GL_TEXTURE_RECTANGLE_NV:
264 case GL_TEXTURE_4D_SGIS:
265 firstLevel = lastLevel = 0;
266 break;
267 default:
268 return;
269 }
270
271 /* save these values */
272 *pfirstLevel = firstLevel;
273 *plastLevel = lastLevel;
274 }
275
276
277 /**
278 * Checks whether the given miptree can hold the given texture image at the
279 * given face and level.
280 */
281 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
282 struct gl_texture_image *texImage, GLuint face, GLuint level)
283 {
284 radeon_mipmap_level *lvl;
285
286 if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel)
287 return GL_FALSE;
288
289 if (texImage->IsCompressed != mt->compressed)
290 return GL_FALSE;
291
292 if (!texImage->IsCompressed &&
293 !mt->compressed &&
294 texImage->TexFormat->TexelBytes != mt->bpp)
295 return GL_FALSE;
296
297 lvl = &mt->levels[level - mt->firstLevel];
298 if (lvl->width != texImage->Width ||
299 lvl->height != texImage->Height ||
300 lvl->depth != texImage->Depth)
301 return GL_FALSE;
302
303 return GL_TRUE;
304 }
305
306
307 /**
308 * Checks whether the given miptree has the right format to store the given texture object.
309 */
310 GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
311 {
312 struct gl_texture_image *firstImage;
313 GLuint compressed;
314 GLuint numfaces = 1;
315 GLuint firstLevel, lastLevel;
316
317 calculate_first_last_level(texObj, &firstLevel, &lastLevel, 0, texObj->BaseLevel);
318 if (texObj->Target == GL_TEXTURE_CUBE_MAP)
319 numfaces = 6;
320
321 firstImage = texObj->Image[0][firstLevel];
322 compressed = firstImage->IsCompressed ? firstImage->TexFormat->MesaFormat : 0;
323
324 return (mt->firstLevel == firstLevel &&
325 mt->lastLevel == lastLevel &&
326 mt->width0 == firstImage->Width &&
327 mt->height0 == firstImage->Height &&
328 mt->depth0 == firstImage->Depth &&
329 mt->bpp == firstImage->TexFormat->TexelBytes &&
330 mt->compressed == compressed);
331 }
332
333
334 /**
335 * Try to allocate a mipmap tree for the given texture that will fit the
336 * given image in the given position.
337 */
338 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
339 struct gl_texture_image *texImage, GLuint face, GLuint level)
340 {
341 GLuint compressed = texImage->IsCompressed ? texImage->TexFormat->MesaFormat : 0;
342 GLuint numfaces = 1;
343 GLuint firstLevel, lastLevel;
344
345 assert(!t->mt);
346
347 calculate_first_last_level(&t->base, &firstLevel, &lastLevel, face, level);
348 if (t->base.Target == GL_TEXTURE_CUBE_MAP)
349 numfaces = 6;
350
351 if (level != firstLevel || face >= numfaces)
352 return;
353
354 t->mt = radeon_miptree_create(rmesa, t, t->base.Target,
355 firstLevel, lastLevel,
356 texImage->Width, texImage->Height, texImage->Depth,
357 texImage->TexFormat->TexelBytes, t->tile_bits, compressed);
358 }
359
360 /* Although we use the image_offset[] array to store relative offsets
361 * to cube faces, Mesa doesn't know anything about this and expects
362 * each cube face to be treated as a separate image.
363 *
364 * These functions present that view to mesa:
365 */
366 void
367 radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
368 {
369 if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
370 offsets[0] = 0;
371 else {
372 int i;
373 for (i = 0; i < 6; i++)
374 offsets[i] = mt->levels[level].faces[i].offset;
375 }
376 }
377
378 GLuint
379 radeon_miptree_image_offset(radeon_mipmap_tree *mt,
380 GLuint face, GLuint level)
381 {
382 if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
383 return (mt->levels[level].faces[face].offset);
384 else
385 return mt->levels[level].faces[0].offset;
386 }