src/mesa/drivers/dri/radeon/radeon_queryobj.c

   1 /*
   2  * Copyright © 2008-2009 Maciej Cencora <m.cencora@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Maciej Cencora <m.cencora@gmail.com>
  25  *
  26  */
  27 #include "radeon_common.h"
  28 #include "radeon_queryobj.h"
  29 #include "radeon_debug.h"
  30
  31 #include "main/imports.h"
  32 #include "main/simple_list.h"
  33
  34 static int radeonQueryIsFlushed(GLcontext *ctx, struct gl_query_object *q)
  35 {
  36         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
  37         struct radeon_query_object *tmp, *query = (struct radeon_query_object *)q;
  38
  39         foreach(tmp, &radeon->query.not_flushed_head) {
  40                 if (tmp == query) {
  41                         return 0;
  42                 }
  43         }
  44
  45         return 1;
  46 }
  47
  48 static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
  49 {
  50         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
  51         struct radeon_query_object *query = (struct radeon_query_object *)q;
  52         uint32_t *result;
  53         int i;
  54
  55         radeon_print(RADEON_STATE, RADEON_VERBOSE,
  56                         "%s: query id %d, result %d\n",
  57                         __FUNCTION__, query->Base.Id, (int) query->Base.Result);
  58
  59         radeon_bo_map(query->bo, GL_FALSE);
  60         result = query->bo->ptr;
  61
  62         query->Base.Result = 0;
  63         if (IS_R600_CLASS(radeon->radeonScreen)) {
  64                 /* ZPASS EVENT writes alternating qwords
  65                  * At query start we set the start offset to 0 and
  66                  * hw writes zpass start counts to qwords 0, 2, 4, 6.
  67                  * At query end we set the start offset to 8 and
  68                  * hw writes zpass end counts to qwords 1, 3, 5, 7.
  69                  * then we substract. MSB is the valid bit.
  70                  */
  71                 for (i = 0; i < 16; i += 4) {
  72                         uint64_t start = (uint64_t)LE32_TO_CPU(result[i]) |
  73                                          (uint64_t)LE32_TO_CPU(result[i + 1]) << 32;
  74                         uint64_t end = (uint64_t)LE32_TO_CPU(result[i + 2]) |
  75                                        (uint64_t)LE32_TO_CPU(result[i + 3]) << 32;
  76                         if ((start & 0x8000000000000000) && (end & 0x8000000000000000)) {
  77                                 uint64_t query_count = end - start;
  78                                 query->Base.Result += query_count;
  79
  80                         }
  81                         radeon_print(RADEON_STATE, RADEON_TRACE,
  82                                      "%d start: %lx, end: %lx %ld\n", i, start, end, end - start);
  83                 }
  84         } else {
  85                 for (i = 0; i < query->curr_offset/sizeof(uint32_t); ++i) {
  86                         query->Base.Result += LE32_TO_CPU(result[i]);
  87                         radeon_print(RADEON_STATE, RADEON_TRACE, "result[%d] = %d\n", i, LE32_TO_CPU(result[i]));
  88                 }
  89         }
  90
  91         radeon_bo_unmap(query->bo);
  92 }
  93
  94 static struct gl_query_object * radeonNewQueryObject(GLcontext *ctx, GLuint id)
  95 {
  96         struct radeon_query_object *query;
  97
  98         query = _mesa_calloc(sizeof(struct radeon_query_object));
  99
 100         query->Base.Id = id;
 101         query->Base.Result = 0;
 102         query->Base.Active = GL_FALSE;
 103         query->Base.Ready = GL_TRUE;
 104
 105         radeon_print(RADEON_STATE, RADEON_VERBOSE,"%s: query id %d\n", __FUNCTION__, query->Base.Id);
 106
 107         return &query->Base;
 108 }
 109
 110 static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
 111 {
 112         struct radeon_query_object *query = (struct radeon_query_object *)q;
 113
 114         radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 115
 116         if (query->bo) {
 117                 radeon_bo_unref(query->bo);
 118         }
 119
 120         _mesa_free(query);
 121 }
 122
 123 static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
 124 {
 125         struct radeon_query_object *query = (struct radeon_query_object *)q;
 126
 127         /* If the cmdbuf with packets for this query hasn't been flushed yet, do it now */
 128         if (!radeonQueryIsFlushed(ctx, q))
 129                 ctx->Driver.Flush(ctx);
 130
 131         radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, q->Id, query->bo, query->curr_offset);
 132
 133         radeonQueryGetResult(ctx, q);
 134
 135         query->Base.Ready = GL_TRUE;
 136 }
 137
 138
 139 static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
 140 {
 141         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 142         struct radeon_query_object *query = (struct radeon_query_object *)q;
 143
 144         radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 145
 146         assert(radeon->query.current == NULL);
 147
 148         if (radeon->dma.flush)
 149                 radeon->dma.flush(radeon->glCtx);
 150
 151         if (!query->bo) {
 152                 query->bo = radeon_bo_open(radeon->radeonScreen->bom, 0, RADEON_QUERY_PAGE_SIZE, RADEON_QUERY_PAGE_SIZE, RADEON_GEM_DOMAIN_GTT, 0);
 153         }
 154         query->curr_offset = 0;
 155
 156         radeon->query.current = query;
 157
 158         radeon->query.queryobj.dirty = GL_TRUE;
 159         radeon->hw.is_dirty = GL_TRUE;
 160         insert_at_tail(&radeon->query.not_flushed_head, query);
 161
 162 }
 163
 164 void radeonEmitQueryEnd(GLcontext *ctx)
 165 {
 166         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 167         struct radeon_query_object *query = radeon->query.current;
 168
 169         if (!query)
 170                 return;
 171
 172         if (query->emitted_begin == GL_FALSE)
 173                 return;
 174
 175         radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, query->Base.Id, query->bo, query->curr_offset);
 176
 177         radeon_cs_space_check_with_bo(radeon->cmdbuf.cs,
 178                                       query->bo,
 179                                       0, RADEON_GEM_DOMAIN_GTT);
 180
 181         radeon->vtbl.emit_query_finish(radeon);
 182 }
 183
 184 static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
 185 {
 186         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 187
 188         radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 189
 190         if (radeon->dma.flush)
 191                 radeon->dma.flush(radeon->glCtx);
 192         radeonEmitQueryEnd(ctx);
 193
 194         radeon->query.current = NULL;
 195 }
 196
 197 static void radeonCheckQuery(GLcontext *ctx, struct gl_query_object *q)
 198 {
 199         radeon_print(RADEON_STATE, RADEON_TRACE, "%s: query id %d\n", __FUNCTION__, q->Id);
 200
 201 #ifdef DRM_RADEON_GEM_BUSY
 202         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 203
 204         if (radeon->radeonScreen->kernel_mm) {
 205                 struct radeon_query_object *query = (struct radeon_query_object *)q;
 206                 uint32_t domain;
 207
 208                 /* Need to perform a flush, as per ARB_occlusion_query spec */
 209                 if (!radeonQueryIsFlushed(ctx, q)) {
 210                         ctx->Driver.Flush(ctx);
 211                 }
 212
 213                 if (radeon_bo_is_busy(query->bo, &domain) == 0) {
 214                         radeonQueryGetResult(ctx, q);
 215                         query->Base.Ready = GL_TRUE;
 216                 }
 217         } else {
 218                 radeonWaitQuery(ctx, q);
 219         }
 220 #else
 221         radeonWaitQuery(ctx, q);
 222 #endif
 223 }
 224
 225 void radeonInitQueryObjFunctions(struct dd_function_table *functions)
 226 {
 227         functions->NewQueryObject = radeonNewQueryObject;
 228         functions->DeleteQuery = radeonDeleteQuery;
 229         functions->BeginQuery = radeonBeginQuery;
 230         functions->EndQuery = radeonEndQuery;
 231         functions->CheckQuery = radeonCheckQuery;
 232         functions->WaitQuery = radeonWaitQuery;
 233 }
 234
 235 int radeon_check_query_active(GLcontext *ctx, struct radeon_state_atom *atom)
 236 {
 237         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 238         struct radeon_query_object *query = radeon->query.current;
 239
 240         if (!query || query->emitted_begin)
 241                 return 0;
 242         return atom->cmd_size;
 243 }
 244
 245 void radeon_emit_queryobj(GLcontext *ctx, struct radeon_state_atom *atom)
 246 {
 247         radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 248         BATCH_LOCALS(radeon);
 249         int dwords;
 250
 251         dwords = (*atom->check) (ctx, atom);
 252
 253         BEGIN_BATCH_NO_AUTOSTATE(dwords);
 254         OUT_BATCH_TABLE(atom->cmd, dwords);
 255         END_BATCH();
 256
 257         radeon->query.current->emitted_begin = GL_TRUE;
 258 }