i915: Remove most of the code under gen >= 4 checks.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file radeon_screen.c
32 * Screen initialization functions for the Radeon driver.
33 *
34 * \author Kevin E. Martin <martin@valinux.com>
35 * \author Gareth Hughes <gareth@valinux.com>
36 */
37
38 #include <errno.h>
39 #include "main/glheader.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/framebuffer.h"
43 #include "main/renderbuffer.h"
44 #include "main/fbobject.h"
45 #include "swrast/s_renderbuffer.h"
46
47 #include "radeon_chipset.h"
48 #include "radeon_macros.h"
49 #include "radeon_screen.h"
50 #include "radeon_common.h"
51 #include "radeon_common_context.h"
52 #if defined(RADEON_R100)
53 #include "radeon_context.h"
54 #include "radeon_tex.h"
55 #elif defined(RADEON_R200)
56 #include "r200_context.h"
57 #include "r200_tex.h"
58 #endif
59
60 #include "utils.h"
61
62 #include "GL/internal/dri_interface.h"
63
64 /* Radeon configuration
65 */
66 #include "xmlpool.h"
67
68 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
69 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
70 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
71 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
72 DRI_CONF_OPT_END
73
74 #if defined(RADEON_R100) /* R100 */
75 PUBLIC const char __driConfigOptions[] =
76 DRI_CONF_BEGIN
77 DRI_CONF_SECTION_PERFORMANCE
78 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
79 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
80 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
81 DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
82 DRI_CONF_HYPERZ("false")
83 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
84 DRI_CONF_SECTION_END
85 DRI_CONF_SECTION_QUALITY
86 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
87 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
88 DRI_CONF_NO_NEG_LOD_BIAS("false")
89 DRI_CONF_FORCE_S3TC_ENABLE("false")
90 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
91 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
92 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
93 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
94 DRI_CONF_SECTION_END
95 DRI_CONF_SECTION_DEBUG
96 DRI_CONF_NO_RAST("false")
97 DRI_CONF_SECTION_END
98 DRI_CONF_END;
99 static const GLuint __driNConfigOptions = 15;
100
101 #elif defined(RADEON_R200)
102
103 PUBLIC const char __driConfigOptions[] =
104 DRI_CONF_BEGIN
105 DRI_CONF_SECTION_PERFORMANCE
106 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
107 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
108 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
109 DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
110 DRI_CONF_HYPERZ("false")
111 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
112 DRI_CONF_SECTION_END
113 DRI_CONF_SECTION_QUALITY
114 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
115 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
116 DRI_CONF_NO_NEG_LOD_BIAS("false")
117 DRI_CONF_FORCE_S3TC_ENABLE("false")
118 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
119 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
120 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
121 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
122 DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
123 DRI_CONF_SECTION_END
124 DRI_CONF_SECTION_DEBUG
125 DRI_CONF_NO_RAST("false")
126 DRI_CONF_SECTION_END
127 DRI_CONF_END;
128 static const GLuint __driNConfigOptions = 16;
129
130 #endif
131
132 #ifndef RADEON_INFO_TILE_CONFIG
133 #define RADEON_INFO_TILE_CONFIG 0x6
134 #endif
135
136 static int
137 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
138 {
139 int ret;
140 drm_radeon_getparam_t gp = { 0 };
141 struct drm_radeon_info info = { 0 };
142
143 if (sPriv->drm_version.major >= 2) {
144 info.value = (uint64_t)(uintptr_t)value;
145 switch (param) {
146 case RADEON_PARAM_DEVICE_ID:
147 info.request = RADEON_INFO_DEVICE_ID;
148 break;
149 case RADEON_PARAM_NUM_GB_PIPES:
150 info.request = RADEON_INFO_NUM_GB_PIPES;
151 break;
152 case RADEON_PARAM_NUM_Z_PIPES:
153 info.request = RADEON_INFO_NUM_Z_PIPES;
154 break;
155 case RADEON_INFO_TILE_CONFIG:
156 info.request = RADEON_INFO_TILE_CONFIG;
157 break;
158 default:
159 return -EINVAL;
160 }
161 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
162 } else {
163 gp.param = param;
164 gp.value = value;
165
166 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
167 }
168 return ret;
169 }
170
171 #if defined(RADEON_R100)
172 static const __DRItexBufferExtension radeonTexBufferExtension = {
173 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
174 radeonSetTexBuffer,
175 radeonSetTexBuffer2,
176 };
177 #elif defined(RADEON_R200)
178 static const __DRItexBufferExtension r200TexBufferExtension = {
179 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
180 r200SetTexBuffer,
181 r200SetTexBuffer2,
182 };
183 #endif
184
185 static void
186 radeonDRI2Flush(__DRIdrawable *drawable)
187 {
188 radeonContextPtr rmesa;
189
190 rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
191 radeonFlush(&rmesa->glCtx);
192 }
193
194 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
195 { __DRI2_FLUSH, 3 },
196 radeonDRI2Flush,
197 dri2InvalidateDrawable,
198 };
199
200 static __DRIimage *
201 radeon_create_image_from_name(__DRIscreen *screen,
202 int width, int height, int format,
203 int name, int pitch, void *loaderPrivate)
204 {
205 __DRIimage *image;
206 radeonScreenPtr radeonScreen = screen->driverPrivate;
207
208 if (name == 0)
209 return NULL;
210
211 image = calloc(1, sizeof *image);
212 if (image == NULL)
213 return NULL;
214
215 switch (format) {
216 case __DRI_IMAGE_FORMAT_RGB565:
217 image->format = MESA_FORMAT_RGB565;
218 image->internal_format = GL_RGB;
219 image->data_type = GL_UNSIGNED_BYTE;
220 break;
221 case __DRI_IMAGE_FORMAT_XRGB8888:
222 image->format = MESA_FORMAT_XRGB8888;
223 image->internal_format = GL_RGB;
224 image->data_type = GL_UNSIGNED_BYTE;
225 break;
226 case __DRI_IMAGE_FORMAT_ARGB8888:
227 image->format = MESA_FORMAT_ARGB8888;
228 image->internal_format = GL_RGBA;
229 image->data_type = GL_UNSIGNED_BYTE;
230 break;
231 default:
232 free(image);
233 return NULL;
234 }
235
236 image->data = loaderPrivate;
237 image->cpp = _mesa_get_format_bytes(image->format);
238 image->width = width;
239 image->pitch = pitch;
240 image->height = height;
241
242 image->bo = radeon_bo_open(radeonScreen->bom,
243 (uint32_t)name,
244 image->pitch * image->height * image->cpp,
245 0,
246 RADEON_GEM_DOMAIN_VRAM,
247 0);
248
249 if (image->bo == NULL) {
250 free(image);
251 return NULL;
252 }
253
254 return image;
255 }
256
257 static __DRIimage *
258 radeon_create_image_from_renderbuffer(__DRIcontext *context,
259 int renderbuffer, void *loaderPrivate)
260 {
261 __DRIimage *image;
262 radeonContextPtr radeon = context->driverPrivate;
263 struct gl_renderbuffer *rb;
264 struct radeon_renderbuffer *rrb;
265
266 rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
267 if (!rb) {
268 _mesa_error(&radeon->glCtx,
269 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
270 return NULL;
271 }
272
273 rrb = radeon_renderbuffer(rb);
274 image = calloc(1, sizeof *image);
275 if (image == NULL)
276 return NULL;
277
278 image->internal_format = rb->InternalFormat;
279 image->format = rb->Format;
280 image->cpp = rrb->cpp;
281 image->data_type = GL_UNSIGNED_BYTE;
282 image->data = loaderPrivate;
283 radeon_bo_ref(rrb->bo);
284 image->bo = rrb->bo;
285
286 image->width = rb->Width;
287 image->height = rb->Height;
288 image->pitch = rrb->pitch / image->cpp;
289
290 return image;
291 }
292
293 static void
294 radeon_destroy_image(__DRIimage *image)
295 {
296 radeon_bo_unref(image->bo);
297 free(image);
298 }
299
300 static __DRIimage *
301 radeon_create_image(__DRIscreen *screen,
302 int width, int height, int format,
303 unsigned int use,
304 void *loaderPrivate)
305 {
306 __DRIimage *image;
307 radeonScreenPtr radeonScreen = screen->driverPrivate;
308
309 image = calloc(1, sizeof *image);
310 if (image == NULL)
311 return NULL;
312
313 image->dri_format = format;
314
315 switch (format) {
316 case __DRI_IMAGE_FORMAT_RGB565:
317 image->format = MESA_FORMAT_RGB565;
318 image->internal_format = GL_RGB;
319 image->data_type = GL_UNSIGNED_BYTE;
320 break;
321 case __DRI_IMAGE_FORMAT_XRGB8888:
322 image->format = MESA_FORMAT_XRGB8888;
323 image->internal_format = GL_RGB;
324 image->data_type = GL_UNSIGNED_BYTE;
325 break;
326 case __DRI_IMAGE_FORMAT_ARGB8888:
327 image->format = MESA_FORMAT_ARGB8888;
328 image->internal_format = GL_RGBA;
329 image->data_type = GL_UNSIGNED_BYTE;
330 break;
331 default:
332 free(image);
333 return NULL;
334 }
335
336 image->data = loaderPrivate;
337 image->cpp = _mesa_get_format_bytes(image->format);
338 image->width = width;
339 image->height = height;
340 image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
341
342 image->bo = radeon_bo_open(radeonScreen->bom,
343 0,
344 image->pitch * image->height * image->cpp,
345 0,
346 RADEON_GEM_DOMAIN_VRAM,
347 0);
348
349 if (image->bo == NULL) {
350 free(image);
351 return NULL;
352 }
353
354 return image;
355 }
356
357 static GLboolean
358 radeon_query_image(__DRIimage *image, int attrib, int *value)
359 {
360 switch (attrib) {
361 case __DRI_IMAGE_ATTRIB_STRIDE:
362 *value = image->pitch * image->cpp;
363 return GL_TRUE;
364 case __DRI_IMAGE_ATTRIB_HANDLE:
365 *value = image->bo->handle;
366 return GL_TRUE;
367 case __DRI_IMAGE_ATTRIB_NAME:
368 radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
369 return GL_TRUE;
370 default:
371 return GL_FALSE;
372 }
373 }
374
375 static struct __DRIimageExtensionRec radeonImageExtension = {
376 { __DRI_IMAGE, 1 },
377 radeon_create_image_from_name,
378 radeon_create_image_from_renderbuffer,
379 radeon_destroy_image,
380 radeon_create_image,
381 radeon_query_image
382 };
383
384 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
385 {
386 screen->device_id = device_id;
387 screen->chip_flags = 0;
388 switch ( device_id ) {
389 #if defined(RADEON_R100)
390 case PCI_CHIP_RN50_515E:
391 case PCI_CHIP_RN50_5969:
392 return -1;
393
394 case PCI_CHIP_RADEON_LY:
395 case PCI_CHIP_RADEON_LZ:
396 case PCI_CHIP_RADEON_QY:
397 case PCI_CHIP_RADEON_QZ:
398 screen->chip_family = CHIP_FAMILY_RV100;
399 break;
400
401 case PCI_CHIP_RS100_4136:
402 case PCI_CHIP_RS100_4336:
403 screen->chip_family = CHIP_FAMILY_RS100;
404 break;
405
406 case PCI_CHIP_RS200_4137:
407 case PCI_CHIP_RS200_4337:
408 case PCI_CHIP_RS250_4237:
409 case PCI_CHIP_RS250_4437:
410 screen->chip_family = CHIP_FAMILY_RS200;
411 break;
412
413 case PCI_CHIP_RADEON_QD:
414 case PCI_CHIP_RADEON_QE:
415 case PCI_CHIP_RADEON_QF:
416 case PCI_CHIP_RADEON_QG:
417 /* all original radeons (7200) presumably have a stencil op bug */
418 screen->chip_family = CHIP_FAMILY_R100;
419 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
420 break;
421
422 case PCI_CHIP_RV200_QW:
423 case PCI_CHIP_RV200_QX:
424 case PCI_CHIP_RADEON_LW:
425 case PCI_CHIP_RADEON_LX:
426 screen->chip_family = CHIP_FAMILY_RV200;
427 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
428 break;
429
430 #elif defined(RADEON_R200)
431 case PCI_CHIP_R200_BB:
432 case PCI_CHIP_R200_QH:
433 case PCI_CHIP_R200_QL:
434 case PCI_CHIP_R200_QM:
435 screen->chip_family = CHIP_FAMILY_R200;
436 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
437 break;
438
439 case PCI_CHIP_RV250_If:
440 case PCI_CHIP_RV250_Ig:
441 case PCI_CHIP_RV250_Ld:
442 case PCI_CHIP_RV250_Lf:
443 case PCI_CHIP_RV250_Lg:
444 screen->chip_family = CHIP_FAMILY_RV250;
445 screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
446 break;
447
448 case PCI_CHIP_RV280_4C6E:
449 case PCI_CHIP_RV280_5960:
450 case PCI_CHIP_RV280_5961:
451 case PCI_CHIP_RV280_5962:
452 case PCI_CHIP_RV280_5964:
453 case PCI_CHIP_RV280_5965:
454 case PCI_CHIP_RV280_5C61:
455 case PCI_CHIP_RV280_5C63:
456 screen->chip_family = CHIP_FAMILY_RV280;
457 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
458 break;
459
460 case PCI_CHIP_RS300_5834:
461 case PCI_CHIP_RS300_5835:
462 case PCI_CHIP_RS350_7834:
463 case PCI_CHIP_RS350_7835:
464 screen->chip_family = CHIP_FAMILY_RS300;
465 screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
466 break;
467 #endif
468
469 default:
470 fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
471 device_id);
472 return -1;
473 }
474
475 return 0;
476 }
477
478 static radeonScreenPtr
479 radeonCreateScreen2(__DRIscreen *sPriv)
480 {
481 radeonScreenPtr screen;
482 int i;
483 int ret;
484 uint32_t device_id = 0;
485
486 /* Allocate the private area */
487 screen = calloc(1, sizeof(*screen));
488 if ( !screen ) {
489 fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
490 fprintf(stderr, "leaving here\n");
491 return NULL;
492 }
493
494 radeon_init_debug();
495
496 /* parse information in __driConfigOptions */
497 driParseOptionInfo (&screen->optionCache,
498 __driConfigOptions, __driNConfigOptions);
499
500 screen->chip_flags = 0;
501
502 screen->irq = 1;
503
504 ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
505 if (ret) {
506 free( screen );
507 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
508 return NULL;
509 }
510
511 ret = radeon_set_screen_flags(screen, device_id);
512 if (ret == -1) {
513 free(screen);
514 return NULL;
515 }
516
517 if (getenv("RADEON_NO_TCL"))
518 screen->chip_flags &= ~RADEON_CHIPSET_TCL;
519
520 i = 0;
521 screen->extensions[i++] = &dri2ConfigQueryExtension.base;
522
523 #if defined(RADEON_R100)
524 screen->extensions[i++] = &radeonTexBufferExtension.base;
525 #elif defined(RADEON_R200)
526 screen->extensions[i++] = &r200TexBufferExtension.base;
527 #endif
528
529 screen->extensions[i++] = &radeonFlushExtension.base;
530 screen->extensions[i++] = &radeonImageExtension.base;
531
532 screen->extensions[i++] = NULL;
533 sPriv->extensions = screen->extensions;
534
535 screen->driScreen = sPriv;
536 screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
537 if (screen->bom == NULL) {
538 free(screen);
539 return NULL;
540 }
541 return screen;
542 }
543
544 /* Destroy the device specific screen private data struct.
545 */
546 static void
547 radeonDestroyScreen( __DRIscreen *sPriv )
548 {
549 radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
550
551 if (!screen)
552 return;
553
554 #ifdef RADEON_BO_TRACK
555 radeon_tracker_print(&screen->bom->tracker, stderr);
556 #endif
557 radeon_bo_manager_gem_dtor(screen->bom);
558
559 /* free all option information */
560 driDestroyOptionInfo (&screen->optionCache);
561
562 free( screen );
563 sPriv->driverPrivate = NULL;
564 }
565
566
567 /* Initialize the driver specific screen private data.
568 */
569 static GLboolean
570 radeonInitDriver( __DRIscreen *sPriv )
571 {
572 sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
573 if ( !sPriv->driverPrivate ) {
574 radeonDestroyScreen( sPriv );
575 return GL_FALSE;
576 }
577
578 return GL_TRUE;
579 }
580
581
582
583 /**
584 * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
585 *
586 * \todo This function (and its interface) will need to be updated to support
587 * pbuffers.
588 */
589 static GLboolean
590 radeonCreateBuffer( __DRIscreen *driScrnPriv,
591 __DRIdrawable *driDrawPriv,
592 const struct gl_config *mesaVis,
593 GLboolean isPixmap )
594 {
595 radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
596
597 const GLboolean swDepth = GL_FALSE;
598 const GLboolean swAlpha = GL_FALSE;
599 const GLboolean swAccum = mesaVis->accumRedBits > 0;
600 const GLboolean swStencil = mesaVis->stencilBits > 0 &&
601 mesaVis->depthBits != 24;
602 gl_format rgbFormat;
603 struct radeon_framebuffer *rfb;
604
605 if (isPixmap)
606 return GL_FALSE; /* not implemented */
607
608 rfb = CALLOC_STRUCT(radeon_framebuffer);
609 if (!rfb)
610 return GL_FALSE;
611
612 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
613
614 if (mesaVis->redBits == 5)
615 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
616 else if (mesaVis->alphaBits == 0)
617 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_XRGB8888_REV;
618 else
619 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB8888_REV;
620
621 /* front color renderbuffer */
622 rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
623 _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
624 rfb->color_rb[0]->has_surface = 1;
625
626 /* back color renderbuffer */
627 if (mesaVis->doubleBufferMode) {
628 rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
629 _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
630 rfb->color_rb[1]->has_surface = 1;
631 }
632
633 if (mesaVis->depthBits == 24) {
634 if (mesaVis->stencilBits == 8) {
635 struct radeon_renderbuffer *depthStencilRb =
636 radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
637 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
638 _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
639 depthStencilRb->has_surface = screen->depthHasSurface;
640 } else {
641 /* depth renderbuffer */
642 struct radeon_renderbuffer *depth =
643 radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
644 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
645 depth->has_surface = screen->depthHasSurface;
646 }
647 } else if (mesaVis->depthBits == 16) {
648 /* just 16-bit depth buffer, no hw stencil */
649 struct radeon_renderbuffer *depth =
650 radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
651 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
652 depth->has_surface = screen->depthHasSurface;
653 }
654
655 _swrast_add_soft_renderbuffers(&rfb->base,
656 GL_FALSE, /* color */
657 swDepth,
658 swStencil,
659 swAccum,
660 swAlpha,
661 GL_FALSE /* aux */);
662 driDrawPriv->driverPrivate = (void *) rfb;
663
664 return (driDrawPriv->driverPrivate != NULL);
665 }
666
667
668 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
669 {
670 struct radeon_renderbuffer *rb;
671
672 rb = rfb->color_rb[0];
673 if (rb && rb->bo) {
674 radeon_bo_unref(rb->bo);
675 rb->bo = NULL;
676 }
677 rb = rfb->color_rb[1];
678 if (rb && rb->bo) {
679 radeon_bo_unref(rb->bo);
680 rb->bo = NULL;
681 }
682 rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
683 if (rb && rb->bo) {
684 radeon_bo_unref(rb->bo);
685 rb->bo = NULL;
686 }
687 }
688
689 void
690 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
691 {
692 struct radeon_framebuffer *rfb;
693 if (!driDrawPriv)
694 return;
695
696 rfb = (void*)driDrawPriv->driverPrivate;
697 if (!rfb)
698 return;
699 radeon_cleanup_renderbuffers(rfb);
700 _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
701 }
702
703 /**
704 * This is the driver specific part of the createNewScreen entry point.
705 * Called when using DRI2.
706 *
707 * \return the struct gl_config supported by this driver
708 */
709 static const
710 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
711 {
712 static const gl_format formats[3] = {
713 MESA_FORMAT_RGB565,
714 MESA_FORMAT_XRGB8888,
715 MESA_FORMAT_ARGB8888
716 };
717 /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
718 * support pageflipping at all.
719 */
720 static const GLenum back_buffer_modes[] = {
721 GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
722 };
723 uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
724 int color;
725 __DRIconfig **configs = NULL;
726
727 if (!radeonInitDriver(psp)) {
728 return NULL;
729 }
730 depth_bits[0] = 0;
731 stencil_bits[0] = 0;
732 depth_bits[1] = 16;
733 stencil_bits[1] = 0;
734 depth_bits[2] = 24;
735 stencil_bits[2] = 0;
736 depth_bits[3] = 24;
737 stencil_bits[3] = 8;
738
739 msaa_samples_array[0] = 0;
740
741 for (color = 0; color < ARRAY_SIZE(formats); color++) {
742 __DRIconfig **new_configs;
743
744 new_configs = driCreateConfigs(formats[color],
745 depth_bits,
746 stencil_bits,
747 ARRAY_SIZE(depth_bits),
748 back_buffer_modes,
749 ARRAY_SIZE(back_buffer_modes),
750 msaa_samples_array,
751 ARRAY_SIZE(msaa_samples_array),
752 GL_TRUE);
753 configs = driConcatConfigs(configs, new_configs);
754 }
755
756 if (configs == NULL) {
757 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
758 __LINE__);
759 return NULL;
760 }
761
762 return (const __DRIconfig **)configs;
763 }
764
765 const struct __DriverAPIRec driDriverAPI = {
766 .InitScreen = radeonInitScreen2,
767 .DestroyScreen = radeonDestroyScreen,
768 #if defined(RADEON_R200)
769 .CreateContext = r200CreateContext,
770 .DestroyContext = r200DestroyContext,
771 #else
772 .CreateContext = r100CreateContext,
773 .DestroyContext = radeonDestroyContext,
774 #endif
775 .CreateBuffer = radeonCreateBuffer,
776 .DestroyBuffer = radeonDestroyBuffer,
777 .MakeCurrent = radeonMakeCurrent,
778 .UnbindContext = radeonUnbindContext,
779 };
780
781 /* This is the table of extensions that the loader will dlsym() for. */
782 PUBLIC const __DRIextension *__driDriverExtensions[] = {
783 &driCoreExtension.base,
784 &driDRI2Extension.base,
785 NULL
786 };