1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
32 * \file radeon_screen.c
33 * Screen initialization functions for the Radeon driver.
35 * \author Kevin E. Martin <martin@valinux.com>
36 * \author Gareth Hughes <gareth@valinux.com>
42 #define STANDALONE_MMIO
43 #include "radeon_context.h"
44 #include "radeon_screen.h"
45 #include "radeon_macros.h"
51 #include "GL/internal/dri_interface.h"
53 /* Radeon configuration
57 const char __driConfigOptions
[] =
59 DRI_CONF_SECTION_PERFORMANCE
60 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN
)
61 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS
)
62 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0
)
64 DRI_CONF_SECTION_QUALITY
65 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB
)
66 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
67 DRI_CONF_NO_NEG_LOD_BIAS(false)
68 DRI_CONF_FORCE_S3TC_ENABLE(false)
69 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER
)
70 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC
)
71 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF
)
73 DRI_CONF_SECTION_DEBUG
74 DRI_CONF_NO_RAST(false)
77 static const GLuint __driNConfigOptions
= 11;
80 /* Including xf86PciInfo.h introduces a bunch of errors...
82 #define PCI_CHIP_RADEON_QD 0x5144
83 #define PCI_CHIP_RADEON_QE 0x5145
84 #define PCI_CHIP_RADEON_QF 0x5146
85 #define PCI_CHIP_RADEON_QG 0x5147
87 #define PCI_CHIP_RADEON_QY 0x5159
88 #define PCI_CHIP_RADEON_QZ 0x515A
90 #define PCI_CHIP_RADEON_LW 0x4C57 /* mobility 7 - has tcl */
91 #define PCI_CHIP_RADEON_LX 0x4C58 /* mobility FireGL 7800 m7 */
93 #define PCI_CHIP_RADEON_LY 0x4C59
94 #define PCI_CHIP_RADEON_LZ 0x4C5A
96 #define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
97 #define PCI_CHIP_RV200_QX 0x5158
100 #define PCI_CHIP_RS100_4136 0x4136
101 #define PCI_CHIP_RS200_4137 0x4137
102 #define PCI_CHIP_RS250_4237 0x4237
103 #define PCI_CHIP_RS100_4336 0x4336
104 #define PCI_CHIP_RS200_4337 0x4337
105 #define PCI_CHIP_RS250_4437 0x4437
108 #ifdef USE_NEW_INTERFACE
109 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
110 #endif /* USE_NEW_INTERFACE */
112 static int getSwapInfo( __DRIdrawablePrivate
*dPriv
, __DRIswapInfo
* sInfo
);
114 #ifdef USE_NEW_INTERFACE
115 static __GLcontextModes
*
116 radeonFillInModes( unsigned pixel_bits
, unsigned depth_bits
,
117 unsigned stencil_bits
, GLboolean have_back_buffer
)
119 __GLcontextModes
* modes
;
120 __GLcontextModes
* m
;
122 unsigned depth_buffer_factor
;
123 unsigned back_buffer_factor
;
127 /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
128 * enough to add support. Basically, if a context is created with an
129 * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
130 * will never be used.
132 static const GLenum back_buffer_modes
[] = {
133 GLX_NONE
, GLX_SWAP_UNDEFINED_OML
/*, GLX_SWAP_COPY_OML */
136 uint8_t depth_bits_array
[2];
137 uint8_t stencil_bits_array
[2];
140 depth_bits_array
[0] = depth_bits
;
141 depth_bits_array
[1] = depth_bits
;
143 /* Just like with the accumulation buffer, always provide some modes
144 * with a stencil buffer. It will be a sw fallback, but some apps won't
147 stencil_bits_array
[0] = 0;
148 stencil_bits_array
[1] = (stencil_bits
== 0) ? 8 : stencil_bits
;
150 depth_buffer_factor
= ((depth_bits
!= 0) || (stencil_bits
!= 0)) ? 2 : 1;
151 back_buffer_factor
= (have_back_buffer
) ? 2 : 1;
153 num_modes
= depth_buffer_factor
* back_buffer_factor
* 4;
155 if ( pixel_bits
== 16 ) {
157 fb_type
= GL_UNSIGNED_SHORT_5_6_5
;
161 fb_type
= GL_UNSIGNED_INT_8_8_8_8_REV
;
164 modes
= (*create_context_modes
)( num_modes
, sizeof( __GLcontextModes
) );
166 if ( ! driFillInModes( & m
, fb_format
, fb_type
,
167 depth_bits_array
, stencil_bits_array
, depth_buffer_factor
,
168 back_buffer_modes
, back_buffer_factor
,
170 fprintf( stderr
, "[%s:%u] Error creating FBConfig!\n",
171 __func__
, __LINE__
);
175 if ( ! driFillInModes( & m
, fb_format
, fb_type
,
176 depth_bits_array
, stencil_bits_array
, depth_buffer_factor
,
177 back_buffer_modes
, back_buffer_factor
,
178 GLX_DIRECT_COLOR
) ) {
179 fprintf( stderr
, "[%s:%u] Error creating FBConfig!\n",
180 __func__
, __LINE__
);
184 /* Mark the visual as slow if there are "fake" stencil bits.
186 for ( m
= modes
; m
!= NULL
; m
= m
->next
) {
187 if ( (m
->stencilBits
!= 0) && (m
->stencilBits
!= stencil_bits
) ) {
188 m
->visualRating
= GLX_SLOW_CONFIG
;
194 #endif /* USE_NEW_INTERFACE */
196 /* Create the device specific screen private data struct.
198 radeonScreenPtr
radeonCreateScreen( __DRIscreenPrivate
*sPriv
)
200 radeonScreenPtr screen
;
201 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
)sPriv
->pDevPriv
;
202 unsigned char *RADEONMMIO
;
205 /* Allocate the private area */
206 screen
= (radeonScreenPtr
) CALLOC( sizeof(*screen
) );
208 __driUtilMessage("%s: Could not allocate memory for screen structure",
213 /* parse information in __driConfigOptions */
214 driParseOptionInfo (&screen
->optionCache
,
215 __driConfigOptions
, __driNConfigOptions
);
217 /* This is first since which regions we map depends on whether or
218 * not we are using a PCI card.
220 screen
->IsPCI
= dri_priv
->IsPCI
;
224 drm_radeon_getparam_t gp
;
226 gp
.param
= RADEON_PARAM_GART_BUFFER_OFFSET
;
227 gp
.value
= &screen
->gart_buffer_offset
;
229 ret
= drmCommandWriteRead( sPriv
->fd
, DRM_RADEON_GETPARAM
,
233 fprintf(stderr
, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret
);
237 if (sPriv
->drmMinor
>= 6) {
238 gp
.param
= RADEON_PARAM_IRQ_NR
;
239 gp
.value
= &screen
->irq
;
241 ret
= drmCommandWriteRead( sPriv
->fd
, DRM_RADEON_GETPARAM
,
245 fprintf(stderr
, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret
);
251 screen
->mmio
.handle
= dri_priv
->registerHandle
;
252 screen
->mmio
.size
= dri_priv
->registerSize
;
253 if ( drmMap( sPriv
->fd
,
256 &screen
->mmio
.map
) ) {
258 __driUtilMessage("%s: drmMap failed\n", __FUNCTION__
);
262 RADEONMMIO
= screen
->mmio
.map
;
264 screen
->status
.handle
= dri_priv
->statusHandle
;
265 screen
->status
.size
= dri_priv
->statusSize
;
266 if ( drmMap( sPriv
->fd
,
267 screen
->status
.handle
,
269 &screen
->status
.map
) ) {
270 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
272 __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__
);
275 screen
->scratch
= (__volatile__
uint32_t *)
276 ((GLubyte
*)screen
->status
.map
+ RADEON_SCRATCH_REG_OFFSET
);
278 screen
->buffers
= drmMapBufs( sPriv
->fd
);
279 if ( !screen
->buffers
) {
280 drmUnmap( screen
->status
.map
, screen
->status
.size
);
281 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
283 __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__
);
287 if ( dri_priv
->gartTexHandle
&& dri_priv
->gartTexMapSize
) {
288 screen
->gartTextures
.handle
= dri_priv
->gartTexHandle
;
289 screen
->gartTextures
.size
= dri_priv
->gartTexMapSize
;
290 if ( drmMap( sPriv
->fd
,
291 screen
->gartTextures
.handle
,
292 screen
->gartTextures
.size
,
293 (drmAddressPtr
)&screen
->gartTextures
.map
) ) {
294 drmUnmapBufs( screen
->buffers
);
295 drmUnmap( screen
->status
.map
, screen
->status
.size
);
296 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
298 __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__
);
302 screen
->gart_texture_offset
= dri_priv
->gartTexOffset
+ ( screen
->IsPCI
303 ? INREG( RADEON_AIC_LO_ADDR
)
304 : ( ( INREG( RADEON_MC_AGP_LOCATION
) & 0x0ffffU
) << 16 ) );
308 switch ( dri_priv
->deviceID
) {
310 fprintf(stderr
, "unknown chip id, assuming full radeon support\n");
311 case PCI_CHIP_RADEON_QD
:
312 case PCI_CHIP_RADEON_QE
:
313 case PCI_CHIP_RADEON_QF
:
314 case PCI_CHIP_RADEON_QG
:
315 case PCI_CHIP_RV200_QW
:
316 case PCI_CHIP_RV200_QX
:
317 case PCI_CHIP_RADEON_LW
:
318 case PCI_CHIP_RADEON_LX
:
319 screen
->chipset
|= RADEON_CHIPSET_TCL
;
320 case PCI_CHIP_RADEON_QY
:
321 case PCI_CHIP_RADEON_QZ
:
322 case PCI_CHIP_RADEON_LY
:
323 case PCI_CHIP_RADEON_LZ
:
324 case PCI_CHIP_RS100_4136
: /* IGPs don't have TCL */
325 case PCI_CHIP_RS200_4137
:
326 case PCI_CHIP_RS250_4237
:
327 case PCI_CHIP_RS100_4336
:
328 case PCI_CHIP_RS200_4337
:
329 case PCI_CHIP_RS250_4437
:
333 screen
->cpp
= dri_priv
->bpp
/ 8;
334 screen
->AGPMode
= dri_priv
->AGPMode
;
336 screen
->fbLocation
= ( INREG( RADEON_MC_FB_LOCATION
) & 0xffff ) << 16;
338 if ( sPriv
->drmMinor
>= 10 ) {
339 drm_radeon_setparam_t sp
;
341 sp
.param
= RADEON_SETPARAM_FB_LOCATION
;
342 sp
.value
= screen
->fbLocation
;
344 drmCommandWrite( sPriv
->fd
, DRM_RADEON_SETPARAM
,
348 screen
->frontOffset
= dri_priv
->frontOffset
;
349 screen
->frontPitch
= dri_priv
->frontPitch
;
350 screen
->backOffset
= dri_priv
->backOffset
;
351 screen
->backPitch
= dri_priv
->backPitch
;
352 screen
->depthOffset
= dri_priv
->depthOffset
;
353 screen
->depthPitch
= dri_priv
->depthPitch
;
355 screen
->texOffset
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureOffset
356 + screen
->fbLocation
;
357 screen
->texSize
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureSize
;
358 screen
->logTexGranularity
[RADEON_LOCAL_TEX_HEAP
] =
359 dri_priv
->log2TexGran
;
361 if ( !screen
->gartTextures
.map
362 || getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
363 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
- 1;
364 screen
->texOffset
[RADEON_GART_TEX_HEAP
] = 0;
365 screen
->texSize
[RADEON_GART_TEX_HEAP
] = 0;
366 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] = 0;
368 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
;
369 screen
->texOffset
[RADEON_GART_TEX_HEAP
] = screen
->gart_texture_offset
;
370 screen
->texSize
[RADEON_GART_TEX_HEAP
] = dri_priv
->gartTexMapSize
;
371 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] =
372 dri_priv
->log2GARTTexGran
;
375 if ( driCompareGLXAPIVersion( 20030813 ) >= 0 ) {
376 PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension
=
377 (PFNGLXSCRENABLEEXTENSIONPROC
) glXGetProcAddress( (const GLubyte
*) "__glXScrEnableExtension" );
378 void * const psc
= sPriv
->psc
->screenConfigs
;
380 if ( glx_enable_extension
!= NULL
) {
381 if ( screen
->irq
!= 0 ) {
382 (*glx_enable_extension
)( psc
, "GLX_SGI_swap_control" );
383 (*glx_enable_extension
)( psc
, "GLX_SGI_video_sync" );
384 (*glx_enable_extension
)( psc
, "GLX_MESA_swap_control" );
387 (*glx_enable_extension
)( psc
, "GLX_MESA_swap_frame_usage" );
389 if ( driCompareGLXAPIVersion( 20030915 ) >= 0 ) {
390 (*glx_enable_extension
)( psc
, "GLX_SGIX_fbconfig" );
391 (*glx_enable_extension
)( psc
, "GLX_OML_swap_method" );
397 screen
->driScreen
= sPriv
;
398 screen
->sarea_priv_offset
= dri_priv
->sarea_priv_offset
;
402 /* Destroy the device specific screen private data struct.
404 void radeonDestroyScreen( __DRIscreenPrivate
*sPriv
)
406 radeonScreenPtr screen
= (radeonScreenPtr
)sPriv
->private;
411 if ( screen
->gartTextures
.map
) {
412 drmUnmap( screen
->gartTextures
.map
, screen
->gartTextures
.size
);
414 drmUnmapBufs( screen
->buffers
);
415 drmUnmap( screen
->status
.map
, screen
->status
.size
);
416 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
418 /* free all option information */
419 driDestroyOptionInfo (&screen
->optionCache
);
422 sPriv
->private = NULL
;
426 /* Initialize the driver specific screen private data.
429 radeonInitDriver( __DRIscreenPrivate
*sPriv
)
431 sPriv
->private = (void *) radeonCreateScreen( sPriv
);
432 if ( !sPriv
->private ) {
433 radeonDestroyScreen( sPriv
);
443 * Create and initialize the Mesa and driver specific pixmap buffer
446 * \todo This function (and its interface) will need to be updated to support
450 radeonCreateBuffer( __DRIscreenPrivate
*driScrnPriv
,
451 __DRIdrawablePrivate
*driDrawPriv
,
452 const __GLcontextModes
*mesaVis
,
456 return GL_FALSE
; /* not implemented */
459 const GLboolean swDepth
= GL_FALSE
;
460 const GLboolean swAlpha
= GL_FALSE
;
461 const GLboolean swAccum
= mesaVis
->accumRedBits
> 0;
462 const GLboolean swStencil
= mesaVis
->stencilBits
> 0 &&
463 mesaVis
->depthBits
!= 24;
464 driDrawPriv
->driverPrivate
= (void *)
465 _mesa_create_framebuffer( mesaVis
,
470 return (driDrawPriv
->driverPrivate
!= NULL
);
476 radeonDestroyBuffer(__DRIdrawablePrivate
*driDrawPriv
)
478 _mesa_destroy_framebuffer((GLframebuffer
*) (driDrawPriv
->driverPrivate
));
481 static struct __DriverAPIRec radeonAPI
= {
482 .InitDriver
= radeonInitDriver
,
483 .DestroyScreen
= radeonDestroyScreen
,
484 .CreateContext
= radeonCreateContext
,
485 .DestroyContext
= radeonDestroyContext
,
486 .CreateBuffer
= radeonCreateBuffer
,
487 .DestroyBuffer
= radeonDestroyBuffer
,
488 .SwapBuffers
= radeonSwapBuffers
,
489 .MakeCurrent
= radeonMakeCurrent
,
490 .UnbindContext
= radeonUnbindContext
,
491 .GetSwapInfo
= getSwapInfo
,
492 .GetMSC
= driGetMSC32
,
493 .WaitForMSC
= driWaitForMSC32
,
495 .SwapBuffersMSC
= NULL
500 * This is the bootstrap function for the driver.
501 * The __driCreateScreen name is the symbol that libGL.so fetches.
502 * Return: pointer to a __DRIscreenPrivate.
504 #if !defined(DRI_NEW_INTERFACE_ONLY)
505 void *__driCreateScreen(Display
*dpy
, int scrn
, __DRIscreen
*psc
,
506 int numConfigs
, __GLXvisualConfig
*config
)
508 __DRIscreenPrivate
*psp
;
509 psp
= __driUtilCreateScreen(dpy
, scrn
, psc
, numConfigs
, config
, &radeonAPI
);
512 #endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
515 * This is the bootstrap function for the driver. libGL supplies all of the
516 * requisite information about the system, and the driver initializes itself.
517 * This routine also fills in the linked list pointed to by \c driver_modes
518 * with the \c __GLcontextModes that the driver can support for windows or
521 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
524 #ifdef USE_NEW_INTERFACE
525 void * __driCreateNewScreen( __DRInativeDisplay
*dpy
, int scrn
, __DRIscreen
*psc
,
526 const __GLcontextModes
* modes
,
527 const __DRIversion
* ddx_version
,
528 const __DRIversion
* dri_version
,
529 const __DRIversion
* drm_version
,
530 const __DRIframebuffer
* frame_buffer
,
531 drmAddress pSAREA
, int fd
,
532 int internal_api_version
,
533 __GLcontextModes
** driver_modes
)
536 __DRIscreenPrivate
*psp
;
537 static const __DRIversion ddx_expected
= { 4, 0, 0 };
538 static const __DRIversion dri_expected
= { 4, 0, 0 };
539 static const __DRIversion drm_expected
= { 1, 3, 0 };
541 if ( ! driCheckDriDdxDrmVersions2( "Radeon",
542 dri_version
, & dri_expected
,
543 ddx_version
, & ddx_expected
,
544 drm_version
, & drm_expected
) ) {
548 psp
= __driUtilCreateNewScreen(dpy
, scrn
, psc
, NULL
,
549 ddx_version
, dri_version
, drm_version
,
550 frame_buffer
, pSAREA
, fd
,
551 internal_api_version
, &radeonAPI
);
553 create_context_modes
= (PFNGLXCREATECONTEXTMODES
)
554 glXGetProcAddress( (const GLubyte
*) "__glXCreateContextModes" );
555 if ( create_context_modes
!= NULL
) {
556 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
) psp
->pDevPriv
;
557 *driver_modes
= radeonFillInModes( dri_priv
->bpp
,
558 (dri_priv
->bpp
== 16) ? 16 : 24,
559 (dri_priv
->bpp
== 16) ? 0 : 8,
560 (dri_priv
->backOffset
!= dri_priv
->depthOffset
) );
566 #endif /* USE_NEW_INTERFACE */
569 * Get information about previous buffer swaps.
572 getSwapInfo( __DRIdrawablePrivate
*dPriv
, __DRIswapInfo
* sInfo
)
574 radeonContextPtr rmesa
;
576 if ( (dPriv
== NULL
) || (dPriv
->driContextPriv
== NULL
)
577 || (dPriv
->driContextPriv
->driverPrivate
== NULL
)
578 || (sInfo
== NULL
) ) {
582 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
583 sInfo
->swap_count
= rmesa
->swap_count
;
584 sInfo
->swap_ust
= rmesa
->swap_ust
;
585 sInfo
->swap_missed_count
= rmesa
->swap_missed_count
;
587 sInfo
->swap_missed_usage
= (sInfo
->swap_missed_count
!= 0)
588 ? driCalculateSwapUsage( dPriv
, 0, rmesa
->swap_missed_ust
)