src/mesa/drivers/dri/radeon/radeon_screen.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file radeon_screen.c
  32  * Screen initialization functions for the Radeon driver.
  33  *
  34  * \author Kevin E. Martin <martin@valinux.com>
  35  * \author  Gareth Hughes <gareth@valinux.com>
  36  */
  37
  38 #include <errno.h>
  39 #include "main/glheader.h"
  40 #include "main/imports.h"
  41 #include "main/mtypes.h"
  42 #include "main/framebuffer.h"
  43 #include "main/renderbuffer.h"
  44 #include "main/fbobject.h"
  45 #include "swrast/s_renderbuffer.h"
  46
  47 #include "radeon_chipset.h"
  48 #include "radeon_screen.h"
  49 #include "radeon_common.h"
  50 #include "radeon_common_context.h"
  51 #if defined(RADEON_R100)
  52 #include "radeon_context.h"
  53 #include "radeon_tex.h"
  54 #elif defined(RADEON_R200)
  55 #include "r200_context.h"
  56 #include "r200_tex.h"
  57 #endif
  58
  59 #include "utils.h"
  60
  61 #include "GL/internal/dri_interface.h"
  62
  63 /* Radeon configuration
  64  */
  65 #include "util/xmlpool.h"
  66
  67 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
  68 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
  69         DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
  70         DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
  71 DRI_CONF_OPT_END
  72
  73 #define DRI_CONF_MAX_TEXTURE_UNITS(def,min,max) \
  74 DRI_CONF_OPT_BEGIN_V(texture_units,int,def, # min ":" # max ) \
  75         DRI_CONF_DESC(en,"Number of texture units used") \
  76 DRI_CONF_OPT_END
  77
  78 #define DRI_CONF_HYPERZ(def) \
  79 DRI_CONF_OPT_BEGIN_B(hyperz, def) \
  80         DRI_CONF_DESC(en,"Use HyperZ to boost performance") \
  81 DRI_CONF_OPT_END
  82
  83 #if defined(RADEON_R100)        /* R100 */
  84 static const __DRIconfigOptionsExtension radeon_config_options = {
  85    .base = { __DRI_CONFIG_OPTIONS, 1 },
  86    .xml =
  87 DRI_CONF_BEGIN
  88     DRI_CONF_SECTION_PERFORMANCE
  89         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
  90         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
  91         DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
  92         DRI_CONF_HYPERZ("false")
  93         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
  94     DRI_CONF_SECTION_END
  95     DRI_CONF_SECTION_QUALITY
  96         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
  97         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
  98         DRI_CONF_NO_NEG_LOD_BIAS("false")
  99         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 100         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
 101         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
 102     DRI_CONF_SECTION_END
 103 DRI_CONF_END
 104 };
 105
 106 #elif defined(RADEON_R200)
 107
 108 #define DRI_CONF_TEXTURE_BLEND_QUALITY(def,range) \
 109 DRI_CONF_OPT_BEGIN_V(texture_blend_quality,float,def,range) \
 110        DRI_CONF_DESC(en,"Texture filtering quality vs. speed, AKA “brilinear” texture filtering") \
 111 DRI_CONF_OPT_END
 112
 113 static const __DRIconfigOptionsExtension radeon_config_options = {
 114    .base = { __DRI_CONFIG_OPTIONS, 1 },
 115    .xml =
 116 DRI_CONF_BEGIN
 117     DRI_CONF_SECTION_PERFORMANCE
 118         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
 119         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
 120         DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
 121         DRI_CONF_HYPERZ("false")
 122         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
 123     DRI_CONF_SECTION_END
 124     DRI_CONF_SECTION_QUALITY
 125         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
 126         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
 127         DRI_CONF_NO_NEG_LOD_BIAS("false")
 128         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 129         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
 130         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
 131         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
 132     DRI_CONF_SECTION_END
 133 DRI_CONF_END
 134 };
 135 #endif
 136
 137 static int
 138 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
 139 {
 140   struct drm_radeon_info info = { 0 };
 141
 142   info.value = (uint64_t)(uintptr_t)value;
 143   switch (param) {
 144   case RADEON_PARAM_DEVICE_ID:
 145     info.request = RADEON_INFO_DEVICE_ID;
 146     break;
 147   case RADEON_PARAM_NUM_GB_PIPES:
 148     info.request = RADEON_INFO_NUM_GB_PIPES;
 149     break;
 150   case RADEON_PARAM_NUM_Z_PIPES:
 151     info.request = RADEON_INFO_NUM_Z_PIPES;
 152     break;
 153   case RADEON_INFO_TILING_CONFIG:
 154     info.request = RADEON_INFO_TILING_CONFIG;
 155     break;
 156   default:
 157     return -EINVAL;
 158   }
 159   return drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
 160 }
 161
 162 #if defined(RADEON_R100)
 163 static const __DRItexBufferExtension radeonTexBufferExtension = {
 164    .base = { __DRI_TEX_BUFFER, 3 },
 165
 166    .setTexBuffer        = radeonSetTexBuffer,
 167    .setTexBuffer2       = radeonSetTexBuffer2,
 168    .releaseTexBuffer    = NULL,
 169 };
 170 #elif defined(RADEON_R200)
 171 static const __DRItexBufferExtension r200TexBufferExtension = {
 172    .base = { __DRI_TEX_BUFFER, 3 },
 173
 174    .setTexBuffer        = r200SetTexBuffer,
 175    .setTexBuffer2       = r200SetTexBuffer2,
 176    .releaseTexBuffer    = NULL,
 177 };
 178 #endif
 179
 180 static void
 181 radeonDRI2Flush(__DRIdrawable *drawable)
 182 {
 183     radeonContextPtr rmesa;
 184
 185     rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
 186     radeonFlush(&rmesa->glCtx);
 187 }
 188
 189 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
 190    .base = { __DRI2_FLUSH, 3 },
 191
 192    .flush               = radeonDRI2Flush,
 193    .invalidate          = dri2InvalidateDrawable,
 194 };
 195
 196 static __DRIimage *
 197 radeon_create_image_from_name(__DRIscreen *screen,
 198                               int width, int height, int format,
 199                               int name, int pitch, void *loaderPrivate)
 200 {
 201    __DRIimage *image;
 202    radeonScreenPtr radeonScreen = screen->driverPrivate;
 203
 204    if (name == 0)
 205       return NULL;
 206
 207    image = calloc(1, sizeof *image);
 208    if (image == NULL)
 209       return NULL;
 210
 211    switch (format) {
 212    case __DRI_IMAGE_FORMAT_RGB565:
 213       image->format = MESA_FORMAT_B5G6R5_UNORM;
 214       image->internal_format = GL_RGB;
 215       image->data_type = GL_UNSIGNED_BYTE;
 216       break;
 217    case __DRI_IMAGE_FORMAT_XRGB8888:
 218       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 219       image->internal_format = GL_RGB;
 220       image->data_type = GL_UNSIGNED_BYTE;
 221       break;
 222    case __DRI_IMAGE_FORMAT_ARGB8888:
 223       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 224       image->internal_format = GL_RGBA;
 225       image->data_type = GL_UNSIGNED_BYTE;
 226       break;
 227    default:
 228       free(image);
 229       return NULL;
 230    }
 231
 232    image->data = loaderPrivate;
 233    image->cpp = _mesa_get_format_bytes(image->format);
 234    image->width = width;
 235    image->pitch = pitch;
 236    image->height = height;
 237
 238    image->bo = radeon_bo_open(radeonScreen->bom,
 239                               (uint32_t)name,
 240                               image->pitch * image->height * image->cpp,
 241                               0,
 242                               RADEON_GEM_DOMAIN_VRAM,
 243                               0);
 244
 245    if (image->bo == NULL) {
 246       free(image);
 247       return NULL;
 248    }
 249
 250    return image;
 251 }
 252
 253 static __DRIimage *
 254 radeon_create_image_from_renderbuffer(__DRIcontext *context,
 255                                       int renderbuffer, void *loaderPrivate)
 256 {
 257    __DRIimage *image;
 258    radeonContextPtr radeon = context->driverPrivate;
 259    struct gl_renderbuffer *rb;
 260    struct radeon_renderbuffer *rrb;
 261
 262    rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
 263    if (!rb) {
 264       _mesa_error(&radeon->glCtx,
 265                   GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 266       return NULL;
 267    }
 268
 269    rrb = radeon_renderbuffer(rb);
 270    image = calloc(1, sizeof *image);
 271    if (image == NULL)
 272       return NULL;
 273
 274    image->internal_format = rb->InternalFormat;
 275    image->format = rb->Format;
 276    image->cpp = rrb->cpp;
 277    image->data_type = GL_UNSIGNED_BYTE;
 278    image->data = loaderPrivate;
 279    radeon_bo_ref(rrb->bo);
 280    image->bo = rrb->bo;
 281
 282    image->width = rb->Width;
 283    image->height = rb->Height;
 284    image->pitch = rrb->pitch / image->cpp;
 285
 286    return image;
 287 }
 288
 289 static void
 290 radeon_destroy_image(__DRIimage *image)
 291 {
 292    radeon_bo_unref(image->bo);
 293    free(image);
 294 }
 295
 296 static __DRIimage *
 297 radeon_create_image(__DRIscreen *screen,
 298                     int width, int height, int format,
 299                     unsigned int use,
 300                     void *loaderPrivate)
 301 {
 302    __DRIimage *image;
 303    radeonScreenPtr radeonScreen = screen->driverPrivate;
 304
 305    image = calloc(1, sizeof *image);
 306    if (image == NULL)
 307       return NULL;
 308
 309    image->dri_format = format;
 310
 311    switch (format) {
 312    case __DRI_IMAGE_FORMAT_RGB565:
 313       image->format = MESA_FORMAT_B5G6R5_UNORM;
 314       image->internal_format = GL_RGB;
 315       image->data_type = GL_UNSIGNED_BYTE;
 316       break;
 317    case __DRI_IMAGE_FORMAT_XRGB8888:
 318       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 319       image->internal_format = GL_RGB;
 320       image->data_type = GL_UNSIGNED_BYTE;
 321       break;
 322    case __DRI_IMAGE_FORMAT_ARGB8888:
 323       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 324       image->internal_format = GL_RGBA;
 325       image->data_type = GL_UNSIGNED_BYTE;
 326       break;
 327    default:
 328       free(image);
 329       return NULL;
 330    }
 331
 332    image->data = loaderPrivate;
 333    image->cpp = _mesa_get_format_bytes(image->format);
 334    image->width = width;
 335    image->height = height;
 336    image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
 337
 338    image->bo = radeon_bo_open(radeonScreen->bom,
 339                               0,
 340                               image->pitch * image->height * image->cpp,
 341                               0,
 342                               RADEON_GEM_DOMAIN_VRAM,
 343                               0);
 344
 345    if (image->bo == NULL) {
 346       free(image);
 347       return NULL;
 348    }
 349
 350    return image;
 351 }
 352
 353 static GLboolean
 354 radeon_query_image(__DRIimage *image, int attrib, int *value)
 355 {
 356    switch (attrib) {
 357    case __DRI_IMAGE_ATTRIB_STRIDE:
 358       *value = image->pitch * image->cpp;
 359       return GL_TRUE;
 360    case __DRI_IMAGE_ATTRIB_HANDLE:
 361       *value = image->bo->handle;
 362       return GL_TRUE;
 363    case __DRI_IMAGE_ATTRIB_NAME:
 364       radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
 365       return GL_TRUE;
 366    default:
 367       return GL_FALSE;
 368    }
 369 }
 370
 371 static const __DRIimageExtension radeonImageExtension = {
 372    .base = { __DRI_IMAGE, 1 },
 373
 374    .createImageFromName         = radeon_create_image_from_name,
 375    .createImageFromRenderbuffer = radeon_create_image_from_renderbuffer,
 376    .destroyImage                = radeon_destroy_image,
 377    .createImage                 = radeon_create_image,
 378    .queryImage                  = radeon_query_image
 379 };
 380
 381 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
 382 {
 383    screen->device_id = device_id;
 384    screen->chip_flags = 0;
 385    switch ( device_id ) {
 386 #if defined(RADEON_R100)
 387    case PCI_CHIP_RN50_515E:
 388    case PCI_CHIP_RN50_5969:
 389         return -1;
 390
 391    case PCI_CHIP_RADEON_LY:
 392    case PCI_CHIP_RADEON_LZ:
 393    case PCI_CHIP_RADEON_QY:
 394    case PCI_CHIP_RADEON_QZ:
 395       screen->chip_family = CHIP_FAMILY_RV100;
 396       break;
 397
 398    case PCI_CHIP_RS100_4136:
 399    case PCI_CHIP_RS100_4336:
 400       screen->chip_family = CHIP_FAMILY_RS100;
 401       break;
 402
 403    case PCI_CHIP_RS200_4137:
 404    case PCI_CHIP_RS200_4337:
 405    case PCI_CHIP_RS250_4237:
 406    case PCI_CHIP_RS250_4437:
 407       screen->chip_family = CHIP_FAMILY_RS200;
 408       break;
 409
 410    case PCI_CHIP_RADEON_QD:
 411    case PCI_CHIP_RADEON_QE:
 412    case PCI_CHIP_RADEON_QF:
 413    case PCI_CHIP_RADEON_QG:
 414       /* all original radeons (7200) presumably have a stencil op bug */
 415       screen->chip_family = CHIP_FAMILY_R100;
 416       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 417       break;
 418
 419    case PCI_CHIP_RV200_QW:
 420    case PCI_CHIP_RV200_QX:
 421    case PCI_CHIP_RADEON_LW:
 422    case PCI_CHIP_RADEON_LX:
 423       screen->chip_family = CHIP_FAMILY_RV200;
 424       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 425       break;
 426
 427 #elif defined(RADEON_R200)
 428    case PCI_CHIP_R200_BB:
 429    case PCI_CHIP_R200_QH:
 430    case PCI_CHIP_R200_QL:
 431    case PCI_CHIP_R200_QM:
 432       screen->chip_family = CHIP_FAMILY_R200;
 433       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 434       break;
 435
 436    case PCI_CHIP_RV250_If:
 437    case PCI_CHIP_RV250_Ig:
 438    case PCI_CHIP_RV250_Ld:
 439    case PCI_CHIP_RV250_Lf:
 440    case PCI_CHIP_RV250_Lg:
 441       screen->chip_family = CHIP_FAMILY_RV250;
 442       screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 443       break;
 444
 445    case PCI_CHIP_RV280_4C6E:
 446    case PCI_CHIP_RV280_5960:
 447    case PCI_CHIP_RV280_5961:
 448    case PCI_CHIP_RV280_5962:
 449    case PCI_CHIP_RV280_5964:
 450    case PCI_CHIP_RV280_5965:
 451    case PCI_CHIP_RV280_5C61:
 452    case PCI_CHIP_RV280_5C63:
 453       screen->chip_family = CHIP_FAMILY_RV280;
 454       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 455       break;
 456
 457    case PCI_CHIP_RS300_5834:
 458    case PCI_CHIP_RS300_5835:
 459    case PCI_CHIP_RS350_7834:
 460    case PCI_CHIP_RS350_7835:
 461       screen->chip_family = CHIP_FAMILY_RS300;
 462       screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 463       break;
 464 #endif
 465
 466    default:
 467       fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
 468               device_id);
 469       return -1;
 470    }
 471
 472    return 0;
 473 }
 474
 475 static int
 476 radeonQueryRendererInteger(__DRIscreen *psp, int param,
 477                                unsigned int *value)
 478 {
 479    radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate;
 480
 481    switch (param) {
 482    case __DRI2_RENDERER_VENDOR_ID:
 483       value[0] = 0x1002;
 484       return 0;
 485    case __DRI2_RENDERER_DEVICE_ID:
 486       value[0] = screen->device_id;
 487       return 0;
 488    case __DRI2_RENDERER_ACCELERATED:
 489       value[0] = 1;
 490       return 0;
 491    case __DRI2_RENDERER_VIDEO_MEMORY: {
 492       struct drm_radeon_gem_info gem_info;
 493       int retval;
 494       memset(&gem_info, 0, sizeof(gem_info));
 495
 496       /* Get GEM info. */
 497       retval = drmCommandWriteRead(psp->fd, DRM_RADEON_GEM_INFO, &gem_info,
 498                                    sizeof(gem_info));
 499
 500       if (retval) {
 501          fprintf(stderr, "radeon: Failed to get MM info, error number %d\n",
 502                 retval);
 503          return -1;
 504
 505       }
 506       /* XXX: Do we want to return vram_size or vram_visible ? */
 507       value[0] = gem_info.vram_size >> 20;
 508       return 0;
 509    }
 510    case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE:
 511       value[0] = 0;
 512       return 0;
 513    default:
 514       return driQueryRendererIntegerCommon(psp, param, value);
 515    }
 516 }
 517
 518 static int
 519 radeonQueryRendererString(__DRIscreen *psp, int param, const char **value)
 520 {
 521    radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate;
 522
 523    switch (param) {
 524    case __DRI2_RENDERER_VENDOR_ID:
 525       value[0] = radeonVendorString;
 526       return 0;
 527    case __DRI2_RENDERER_DEVICE_ID:
 528       value[0] = radeonGetRendererString(screen);
 529       return 0;
 530    default:
 531       return -1;
 532    }
 533 }
 534
 535 static const __DRI2rendererQueryExtension radeonRendererQueryExtension = {
 536    .base = { __DRI2_RENDERER_QUERY, 1 },
 537
 538    .queryInteger        = radeonQueryRendererInteger,
 539    .queryString         = radeonQueryRendererString
 540 };
 541
 542
 543 static const __DRIextension *radeon_screen_extensions[] = {
 544     &dri2ConfigQueryExtension.base,
 545 #if defined(RADEON_R100)
 546     &radeonTexBufferExtension.base,
 547 #elif defined(RADEON_R200)
 548     &r200TexBufferExtension.base,
 549 #endif
 550     &radeonFlushExtension.base,
 551     &radeonImageExtension.base,
 552     &radeonRendererQueryExtension.base,
 553     &dri2NoErrorExtension.base,
 554     NULL
 555 };
 556
 557 static radeonScreenPtr
 558 radeonCreateScreen2(__DRIscreen *sPriv)
 559 {
 560    radeonScreenPtr screen;
 561    int ret;
 562    uint32_t device_id = 0;
 563
 564    /* Allocate the private area */
 565    screen = calloc(1, sizeof(*screen));
 566    if ( !screen ) {
 567       fprintf(stderr, "%s: Could not allocate memory for screen structure", __func__);
 568       fprintf(stderr, "leaving here\n");
 569       return NULL;
 570    }
 571
 572    radeon_init_debug();
 573
 574    /* parse information in __driConfigOptions */
 575    driParseOptionInfo (&screen->optionCache, radeon_config_options.xml);
 576
 577    screen->chip_flags = 0;
 578
 579    screen->irq = 1;
 580
 581    ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
 582    if (ret) {
 583      free( screen );
 584      fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
 585      return NULL;
 586    }
 587
 588    ret = radeon_set_screen_flags(screen, device_id);
 589    if (ret == -1) {
 590      free(screen);
 591      return NULL;
 592    }
 593
 594    if (getenv("RADEON_NO_TCL"))
 595            screen->chip_flags &= ~RADEON_CHIPSET_TCL;
 596
 597    sPriv->extensions = radeon_screen_extensions;
 598
 599    screen->driScreen = sPriv;
 600    screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
 601    if (screen->bom == NULL) {
 602        free(screen);
 603        return NULL;
 604    }
 605    return screen;
 606 }
 607
 608 /* Destroy the device specific screen private data struct.
 609  */
 610 static void
 611 radeonDestroyScreen( __DRIscreen *sPriv )
 612 {
 613     radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
 614
 615     if (!screen)
 616         return;
 617
 618 #ifdef RADEON_BO_TRACK
 619     radeon_tracker_print(&screen->bom->tracker, stderr);
 620 #endif
 621     radeon_bo_manager_gem_dtor(screen->bom);
 622
 623     /* free all option information */
 624     driDestroyOptionInfo (&screen->optionCache);
 625
 626     free( screen );
 627     sPriv->driverPrivate = NULL;
 628 }
 629
 630
 631 /* Initialize the driver specific screen private data.
 632  */
 633 static GLboolean
 634 radeonInitDriver( __DRIscreen *sPriv )
 635 {
 636     sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
 637     if ( !sPriv->driverPrivate ) {
 638         radeonDestroyScreen( sPriv );
 639         return GL_FALSE;
 640     }
 641
 642     return GL_TRUE;
 643 }
 644
 645
 646
 647 /**
 648  * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
 649  *
 650  * \todo This function (and its interface) will need to be updated to support
 651  * pbuffers.
 652  */
 653 static GLboolean
 654 radeonCreateBuffer( __DRIscreen *driScrnPriv,
 655                     __DRIdrawable *driDrawPriv,
 656                     const struct gl_config *mesaVis,
 657                     GLboolean isPixmap )
 658 {
 659     radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
 660
 661     const GLboolean swDepth = GL_FALSE;
 662     const GLboolean swAlpha = GL_FALSE;
 663     const GLboolean swAccum = mesaVis->accumRedBits > 0;
 664     const GLboolean swStencil = mesaVis->stencilBits > 0 &&
 665         mesaVis->depthBits != 24;
 666     mesa_format rgbFormat;
 667     struct radeon_framebuffer *rfb;
 668
 669     if (isPixmap)
 670       return GL_FALSE; /* not implemented */
 671
 672     rfb = CALLOC_STRUCT(radeon_framebuffer);
 673     if (!rfb)
 674       return GL_FALSE;
 675
 676     _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 677
 678     if (mesaVis->redBits == 5)
 679         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM;
 680     else if (mesaVis->alphaBits == 0)
 681         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM;
 682     else
 683         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8A8_UNORM : MESA_FORMAT_A8R8G8B8_UNORM;
 684
 685     /* front color renderbuffer */
 686     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 687     _mesa_attach_and_own_rb(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
 688     rfb->color_rb[0]->has_surface = 1;
 689
 690     /* back color renderbuffer */
 691     if (mesaVis->doubleBufferMode) {
 692       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 693         _mesa_attach_and_own_rb(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
 694         rfb->color_rb[1]->has_surface = 1;
 695     }
 696
 697     if (mesaVis->depthBits == 24) {
 698       if (mesaVis->stencilBits == 8) {
 699         struct radeon_renderbuffer *depthStencilRb =
 700            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
 701         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 702         _mesa_attach_and_reference_rb(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 703         depthStencilRb->has_surface = screen->depthHasSurface;
 704       } else {
 705         /* depth renderbuffer */
 706         struct radeon_renderbuffer *depth =
 707            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
 708         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 709         depth->has_surface = screen->depthHasSurface;
 710       }
 711     } else if (mesaVis->depthBits == 16) {
 712         /* just 16-bit depth buffer, no hw stencil */
 713         struct radeon_renderbuffer *depth =
 714            radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv);
 715         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 716         depth->has_surface = screen->depthHasSurface;
 717     }
 718
 719     _swrast_add_soft_renderbuffers(&rfb->base,
 720             GL_FALSE, /* color */
 721             swDepth,
 722             swStencil,
 723             swAccum,
 724             swAlpha,
 725             GL_FALSE /* aux */);
 726     driDrawPriv->driverPrivate = (void *) rfb;
 727
 728     return (driDrawPriv->driverPrivate != NULL);
 729 }
 730
 731
 732 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
 733 {
 734         struct radeon_renderbuffer *rb;
 735
 736         rb = rfb->color_rb[0];
 737         if (rb && rb->bo) {
 738                 radeon_bo_unref(rb->bo);
 739                 rb->bo = NULL;
 740         }
 741         rb = rfb->color_rb[1];
 742         if (rb && rb->bo) {
 743                 radeon_bo_unref(rb->bo);
 744                 rb->bo = NULL;
 745         }
 746         rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
 747         if (rb && rb->bo) {
 748                 radeon_bo_unref(rb->bo);
 749                 rb->bo = NULL;
 750         }
 751 }
 752
 753 void
 754 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
 755 {
 756     struct radeon_framebuffer *rfb;
 757     if (!driDrawPriv)
 758         return;
 759
 760     rfb = (void*)driDrawPriv->driverPrivate;
 761     if (!rfb)
 762         return;
 763     radeon_cleanup_renderbuffers(rfb);
 764     _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 765 }
 766
 767 /**
 768  * This is the driver specific part of the createNewScreen entry point.
 769  * Called when using DRI2.
 770  *
 771  * \return the struct gl_config supported by this driver
 772  */
 773 static const
 774 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 775 {
 776    static const mesa_format formats[3] = {
 777       MESA_FORMAT_B5G6R5_UNORM,
 778       MESA_FORMAT_B8G8R8X8_UNORM,
 779       MESA_FORMAT_B8G8R8A8_UNORM
 780    };
 781
 782    static const GLenum back_buffer_modes[] = {
 783       __DRI_ATTRIB_SWAP_NONE, __DRI_ATTRIB_SWAP_UNDEFINED
 784    };
 785    uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
 786    int color;
 787    __DRIconfig **configs = NULL;
 788
 789    psp->max_gl_compat_version = 13;
 790    psp->max_gl_es1_version = 11;
 791
 792    if (!radeonInitDriver(psp)) {
 793        return NULL;
 794     }
 795    depth_bits[0] = 0;
 796    stencil_bits[0] = 0;
 797    depth_bits[1] = 16;
 798    stencil_bits[1] = 0;
 799    depth_bits[2] = 24;
 800    stencil_bits[2] = 0;
 801    depth_bits[3] = 24;
 802    stencil_bits[3] = 8;
 803
 804    msaa_samples_array[0] = 0;
 805
 806    for (color = 0; color < ARRAY_SIZE(formats); color++) {
 807       __DRIconfig **new_configs;
 808
 809       new_configs = driCreateConfigs(formats[color],
 810                                      depth_bits,
 811                                      stencil_bits,
 812                                      ARRAY_SIZE(depth_bits),
 813                                      back_buffer_modes,
 814                                      ARRAY_SIZE(back_buffer_modes),
 815                                      msaa_samples_array,
 816                                      ARRAY_SIZE(msaa_samples_array),
 817                                      GL_TRUE, GL_FALSE, GL_FALSE);
 818       configs = driConcatConfigs(configs, new_configs);
 819    }
 820
 821    if (configs == NULL) {
 822       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
 823               __LINE__);
 824       return NULL;
 825    }
 826
 827    return (const __DRIconfig **)configs;
 828 }
 829
 830 static const struct __DriverAPIRec radeon_driver_api = {
 831    .InitScreen      = radeonInitScreen2,
 832    .DestroyScreen   = radeonDestroyScreen,
 833 #if defined(RADEON_R200)
 834    .CreateContext   = r200CreateContext,
 835    .DestroyContext  = r200DestroyContext,
 836 #else
 837    .CreateContext   = r100CreateContext,
 838    .DestroyContext  = radeonDestroyContext,
 839 #endif
 840    .CreateBuffer    = radeonCreateBuffer,
 841    .DestroyBuffer   = radeonDestroyBuffer,
 842    .MakeCurrent     = radeonMakeCurrent,
 843    .UnbindContext   = radeonUnbindContext,
 844 };
 845
 846 static const struct __DRIDriverVtableExtensionRec radeon_vtable = {
 847    .base = { __DRI_DRIVER_VTABLE, 1 },
 848    .vtable = &radeon_driver_api,
 849 };
 850
 851 /* This is the table of extensions that the loader will dlsym() for. */
 852 static const __DRIextension *radeon_driver_extensions[] = {
 853     &driCoreExtension.base,
 854     &driDRI2Extension.base,
 855     &radeon_config_options.base,
 856     &radeon_vtable.base,
 857     NULL
 858 };
 859
 860 #ifdef RADEON_R200
 861 PUBLIC const __DRIextension **__driDriverGetExtensions_r200(void)
 862 {
 863    globalDriverAPI = &radeon_driver_api;
 864
 865    return radeon_driver_extensions;
 866 }
 867 #else
 868 PUBLIC const __DRIextension **__driDriverGetExtensions_radeon(void)
 869 {
 870    globalDriverAPI = &radeon_driver_api;
 871
 872    return radeon_driver_extensions;
 873 }
 874 #endif